Nav 73b1328f9f RISC-V general purpose register descriptors

2023-11-24 15:19:52 +00:00

..

Microchip/AVR

Added TargetFamily to TargetDescriptor and comparability check in AVR GDB debug server

2023-11-22 00:37:29 +00:00

RiscV

RISC-V general purpose register descriptors

2023-11-24 15:19:52 +00:00

TargetDescription

Updated TDF documentation

2023-08-20 15:48:39 +01:00

TargetDescriptionFiles/AVR8

Added initial (untested) support for AVR16DD and AVR32DD targets

2023-08-13 16:24:43 +01:00

CMakeLists.txt

Made a start with RISC-V target implementation

2023-11-22 00:38:40 +00:00

Target.hpp

Removed TargetProgramCounter type alias

2023-09-21 00:40:30 +01:00

TargetBreakpoint.hpp

Support for reserved hardware breakpoint (for stepping on AVR8 targets)

2023-09-23 21:50:04 +01:00

TargetDescriptor.hpp

Added TargetFamily to TargetDescriptor and comparability check in AVR GDB debug server

2023-11-22 00:37:29 +00:00

TargetMemory.hpp

Removed TargetProgramCounter type alias

2023-09-21 00:40:30 +01:00

TargetMemoryCache.cpp

Program memory cache

2023-09-22 17:52:28 +01:00

TargetMemoryCache.hpp

Program memory cache

2023-09-22 17:52:28 +01:00

TargetPinDescriptor.hpp

Removed redundant 'Bloom' namespace from entire codebase

2023-08-13 15:47:51 +01:00

TargetRegister.cpp

Removed redundant 'Bloom' namespace from entire codebase

2023-08-13 15:47:51 +01:00

TargetRegister.hpp

Corrected member initialisation order (addressing -Wreorder warnings)

2023-08-19 21:53:00 +01:00

Targets.hpp

Made a start with RISC-V target implementation

2023-11-22 00:38:40 +00:00

TargetState.hpp

Removed redundant 'Bloom' namespace from entire codebase

2023-08-13 15:47:51 +01:00

TargetVariant.hpp

Removed redundant 'Bloom' namespace from entire codebase

2023-08-13 15:47:51 +01:00