Commit Graph

206 Commits

Author SHA1 Message Date
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00d6f5fb71 Corrected bug in RISC-V debug translator where a reset wasn't always keeping the target halted 2024-10-19 14:22:12 +01:00
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348ec19c1b Tidying RISC-V register structs
- Removed unnecessary bit fields
- Added default values to members
- Removed all user-defined constructors to make the structs aggregate, replacing the from-value constructor with a `fromValue()` status member function.
- Made use of designated initialisation
- Changed unscoped enums to scoped
- Other small bits of tidying
2024-10-16 21:22:16 +01:00
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17b90e3c08 Tidying 2024-10-12 23:37:13 +01:00
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9e4d10ae91 Tidying 2024-10-07 20:03:19 +01:00
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248c51acc8 Renamed RiscVDebugInterface::clearAllBreakpoints() in preparation for separating HW breakpoints from SW breakpoints. 2024-10-07 20:02:39 +01:00
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418db1df99 Added config struct for RISC-V debug translator implementation, and WCH debug tools.
Also some tidying in the `DebugToolConfig` struct
2024-10-06 23:32:36 +01:00
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d71083c3f9 Tidying 2024-10-06 18:10:02 +01:00
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6c67424af9 On RISC-V activation, clear any triggers that were left over from a previous debug session 2024-10-06 18:06:58 +01:00
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ecd0f5b054 First pass at RISC-V hardware breakpoints (Trigger module) 2024-10-06 17:54:08 +01:00
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ecf0bd8919 Added try member functions for RISC-V abstract commands and register access 2024-09-04 00:15:46 +01:00
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2a01f727bf Tidying RISC-V register structs 2024-09-04 00:13:55 +01:00
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914153077e Corrected memory address/size alignment in EDBG and RISC-V drivers 2024-08-30 19:59:59 +01:00
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6cdbfbe950 Massive refactor to accommodate RISC-V targets
- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here
2024-07-23 21:14:22 +01:00
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55d3fe76e0 Moved EDBG protocol code to more appropriate directory.
Updated necessary namespaces.
Other bits of tidying.
2023-11-17 22:20:39 +00:00
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46bbf9cb31 Fixed seg fault bug when clearing HW breakpoints in EDBG driver 2023-09-22 20:52:17 +01:00
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9698d83cb4 Clear HW breakpoints upon entering programming mode in EDBG driver 2023-09-22 20:51:59 +01:00
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b3d03f73ac Clear hardware breakpoints in clearAllBreakpoints() (EDBG AVR8 driver) 2023-09-21 01:10:35 +01:00
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b5df37ae9b Removed TargetProgramCounter type alias 2023-09-21 00:40:30 +01:00
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d7b59cac59 Support for hardware breakpoints 2023-09-20 23:43:29 +01:00
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9a6e22e6c7 Corrected member initialisation order (addressing -Wreorder warnings) 2023-08-19 21:53:00 +01:00
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c622c9bd2e Fixed missing includes which were resulting in failed builds with GCC 13+. Thanks to @jpf91 for reporting 2023-08-19 17:12:40 +01:00
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5896306f1a Removed redundant 'Bloom' namespace from entire codebase 2023-08-13 15:47:51 +01:00
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216a1357b7 Moved programming mode requirement for fuse programming into EDBG driver, as it is specific to that driver 2023-07-18 23:17:13 +01:00
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1f90f21870 Refactored the preserveEeprom implementation to make use of the EESAVE fuse 2023-07-18 23:17:13 +01:00
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f3f0b504f3 Removed fuse type restriction when extracting fuse bit descriptors from AVR8 TDFs 2023-07-18 23:17:13 +01:00
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ba03833325 Lots of tidying
- Removed generic `avr8` target
- Simplified AVR8 target construction
- Introduced register descriptor IDs
- Simplified GDB register mappings
- Simplified target interface contract
- Other bits of tidying
2023-07-18 23:16:06 +01:00
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ab8693b1e0 Fixed bug where Bloom wasn't managing the DWEN fuse bit on some development boards. 2023-07-18 21:28:45 +01:00
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efeb5ad48c Corrected "Unknown target family" error for new AVR EA targets. 2023-05-12 19:08:52 +01:00
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5825b11d0b Added suggestion to check OCDEN fuse bit, in error message for DEVICE_NOT_UNDER_CONTROL error. 2023-05-08 13:24:45 +01:00
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1f57ca3f21 Corrected bug with leaving programming mode on Snap and PICkit 4 debug tools 2023-05-08 02:44:03 +01:00
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e5c78e7b3a Added preserveEeprom target param 2023-05-07 16:50:59 +01:00
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6ae1ef1be2 OCDEN fuse bit management 2023-05-07 16:49:45 +01:00
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06b6c4460b Tidying 2023-04-01 12:42:46 +01:00
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755d24da5c Tidying 2023-03-05 23:29:26 +00:00
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f37f8f301a Corrected bad rebase 2023-02-27 00:08:01 +00:00
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8fa7e82c56 Moved Paths helper functions to service class 2023-02-20 21:55:55 +00:00
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2b5756c5e2 Tidying 2023-02-20 21:54:28 +00:00
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05832839f0 Output EDBG parameter values in debug logs 2023-01-21 13:54:40 +00:00
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693abced8e Replaced overloaded casting of CMSIS-DAP Command with rawCommand member function 2023-01-20 22:53:04 +00:00
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e6f53b1afd Tidying 2023-01-14 03:03:22 +00:00
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5854b43816 Tidying 2022-12-18 19:28:57 +00:00
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09fc5b73f2 Restricted the size of all memory access commands to ensure that no more than two packets are sent to and from EDBG debug tools 2022-12-18 19:25:40 +00:00
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f64a14b04a Corrected memory type used for memory writes with the JTAG config variant, in the EDBG AVR8 driver 2022-12-18 19:23:58 +00:00
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5fe50b1997 Increase CMSIS response timeout for EDBG debug tools 2022-12-18 19:22:47 +00:00
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ad06cdcc75 Removed the requirement of the max memory access limit being greater than the target's flash page size.
It's no longer needed as we've stopped enforcing the limit for memory types that require page alignment.
2022-12-17 18:31:05 +00:00
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3b137aa539 Removed max memory access check during address alignment (it's not needed). 2022-12-17 18:10:51 +00:00
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d9d8b3f450 Tidying 2022-12-13 21:12:16 +00:00
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d0969ea0a7 Disable batching memory reads for EEPROM_PAGE memory type, in EDBG driver 2022-12-13 21:11:56 +00:00
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bf8d59644a Convert XMEGA addresses to relative form, in EDBG driver 2022-12-12 01:14:56 +00:00
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91f8cbc931 Corrected value of APPICATION_BYTES XMEGA (PDI) device parameter in EDBG driver. Also added APP section start address extraction 2022-12-12 00:52:50 +00:00