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914153077e
Corrected memory address/size alignment in EDBG and RISC-V drivers
2024-08-30 19:59:59 +01:00
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2f6238e360
Tidying
2024-08-17 12:44:01 +01:00
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6cdbfbe950
Massive refactor to accommodate RISC-V targets
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- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here
2024-07-23 21:14:22 +01:00
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4e837218e5
Corrected use of destroyed objects in EDBG param constructors
2024-06-02 21:33:54 +01:00
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ee20507c2e
Corrected debugWire and JTAG HIGH byte parameter values
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Additional checks in TDF validation to ensure that the IO memory segment offset has been applied to the relevant registers
2024-06-02 21:29:57 +01:00
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ed54b0e726
Tidying
2024-03-29 16:31:14 +00:00
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779a5ad151
Corrected EEARL/H register address extraction from AVR8 TDFs.
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Some other bits of tidying
2024-03-29 16:16:35 +00:00
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b9d537e924
Created EdbgAvr8Session struct and moved EDBG target info to it
2024-03-28 21:10:08 +00:00
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3c8efa60a6
Added EDBG parameter structs with TDF-based initialisation
2024-03-25 18:59:15 +00:00
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75d5124265
Moved TargetRegisterDescriptor struct to separate file
2024-03-09 17:16:29 +00:00
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7e9e28286f
Made physical interface enum more generic (moved out of AVR8-specific context)
2024-02-15 21:25:12 +00:00
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55d3fe76e0
Moved EDBG protocol code to more appropriate directory.
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Updated necessary namespaces.
Other bits of tidying.
2023-11-17 22:20:39 +00:00
