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4147af618b
Move away from using const references of std::vector<unsigned char> for target memory buffers. Replaced with std::span<const unsigned char> (via TargetMemoryBufferSpan alias)
2024-11-16 21:49:49 +00:00
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eebba986b5
RISC-V GDB server
2024-11-16 20:43:22 +00:00
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26f4f8f90e
Tidying
2024-11-16 20:06:55 +00:00
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07283a2dc7
Flash programming support for WCH-LinkE tool
2024-11-16 20:05:26 +00:00
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0118306e30
Refactored UsbInterface::writeBulk member function to use std::span instead of std::vector
2024-11-16 19:58:07 +00:00
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a7ee6cbae2
Refactored page alignment code in EDBG and RISC-V debug translator driver
2024-11-16 19:55:34 +00:00
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8f61c5a839
Handled flash erase without subsequent flash write commands, in AVR GDB server
2024-11-16 18:54:28 +00:00
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de02bf318c
Corrected HW breakpoint count bug in WchRiscV target
2024-11-06 20:06:55 +00:00
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7662dec100
Tidying
2024-11-06 20:05:59 +00:00
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285fc41c23
Corrected bug in EDBG driver memory access routines. It was incorrectly using the FUSES memory type when in debug mode (that memory type isn't available in debug mode, only program mode. Was causing a target reset).
2024-11-06 19:46:27 +00:00
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24b41ca420
Added access property to Target
2024-11-02 22:34:42 +00:00
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f0b7f3193c
Corrected string->int conversion bug in TargetPinDescriptor.
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The `numericPosition` member should really be removed. Will revisit later.
2024-10-27 00:28:41 +01:00
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4f166cc7d7
Tidying
2024-10-27 00:27:16 +01:00
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e7b270a30c
Corrected bug in GDB server config (IP address param wasn't being validated properly)
2024-10-27 00:27:04 +01:00
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623743995b
Made the EDBG CMSIS-DAP command delay optional for all debug tools, and disabled it by default.
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The command delay was really choking Bloom's EDBG driver, causing a very noticeable drag on Bloom's performance. It's much faster with the command delay disabled.
There was a good reason for why I introduced this some time ago. Without it, some EDBG debug tools were misbehaving - I remember that for certain. But now, I cannot seem to reproduce these issues. Very odd.
If the issues do reappear, I may have to enable the command delay by default, again, for some debug tools.
For now, if any users experience issues, I'll just suggest they manually enable the command delay via their project config.
Also, I'm not going to document this new config option, as I would prefer the user to approach me if they experience issues as a result of this, so that I'll know if it needs revisiting.
2024-10-27 00:26:06 +01:00
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4160d4259a
Corrected bug in EDBG driver, where we weren't waiting for a stopped event when we should have been
2024-10-27 00:02:00 +01:00
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e82d59d190
Tidying
2024-10-26 19:27:16 +01:00
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08af052ba9
Corrected bug in AVR GDB memory access command handlers, which allowed GDB to perform out-of-bounds accesses
2024-10-26 19:26:56 +01:00
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cb8e5f1d24
Confirmed that GPR and IO memory segments to not come after the SRAM segment, on AVR8 targets
2024-10-26 19:24:08 +01:00
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8cf96ba5df
Tidying
2024-10-26 17:19:00 +01:00
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1db70be31e
Move AVR-specific GDB memory address translation to AvrGdbTargetDescriptor
2024-10-26 17:18:42 +01:00
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b6cbdf5a0d
Changed AVR-GDB command packet class to a bare interface class
2024-10-26 16:19:05 +01:00
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5be3ab4503
Tidying
2024-10-25 23:12:31 +01:00
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9df41ccfc5
Made VCont step/continue command handlers generic (non-target-specific)
2024-10-25 23:12:04 +01:00
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8be311cbc0
Refactored GDB server base class, making it a template class, allowing for much more flexibility for derived target-specific implementations
2024-10-25 22:22:25 +01:00
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72d0c28d08
Fixed bug in assertion in RISC-V debug translator
2024-10-20 00:44:09 +01:00
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4e28d3c488
Present register width as opposed to register byte size in new register access GDB monitor commands
2024-10-20 00:23:00 +01:00
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a65be393be
Tidying
2024-10-19 23:11:22 +01:00
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7a54632966
Implemented disabling of GDB packet acknowledgement, and disabled it by default. The new packetAcknowledgement debug server config param can be used to keep it enabled.
2024-10-19 23:10:34 +01:00
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9b1489fbf2
Removed WchLinkVariant::UNKNOWN
2024-10-19 14:22:51 +01:00
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00d6f5fb71
Corrected bug in RISC-V debug translator where a reset wasn't always keeping the target halted
2024-10-19 14:22:12 +01:00
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1bb2214721
Tidying
2024-10-18 00:02:00 +01:00
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9c1385a048
Deleted TDF documentation (don't have the capacity to maintain it ATM)
2024-10-18 00:01:21 +01:00
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662e53e3e1
Tweaks to TC docs
2024-10-17 23:58:16 +01:00
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348ec19c1b
Tidying RISC-V register structs
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- Removed unnecessary bit fields
- Added default values to members
- Removed all user-defined constructors to make the structs aggregate, replacing the from-value constructor with a `fromValue()` status member function.
- Made use of designated initialisation
- Changed unscoped enums to scoped
- Other small bits of tidying
2024-10-16 21:22:16 +01:00
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17b90e3c08
Tidying
2024-10-12 23:37:13 +01:00
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52171734d8
New WchRiscV target class
2024-10-12 23:16:16 +01:00
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5c896bb2ca
Support for property groups in variant elements, in TDFs
2024-10-12 16:25:11 +01:00
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22cca07242
Made property-group elements optional in TDFs
2024-10-12 16:05:11 +01:00
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8b5f626e4f
Sort pads by key when converting ATDFs to TDFs
2024-10-12 00:05:37 +01:00
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4eeeaf7fa6
Reordered pads in AVR8 TDFs
2024-10-12 00:03:49 +01:00
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9cfc171255
Added description member to TargetPeripheralDescriptor
2024-10-08 21:26:03 +01:00
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9e4d10ae91
Tidying
2024-10-07 20:03:19 +01:00
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248c51acc8
Renamed RiscVDebugInterface::clearAllBreakpoints() in preparation for separating HW breakpoints from SW breakpoints.
2024-10-07 20:02:39 +01:00
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607a344107
Made TargetMemoryCache use TargetMemorySegmentDescriptor, as the base memory descriptor (instead of TargetMemoryAddressSpaceDescriptor).
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Basing the memory cache on address spaces will result in large amounts of memory being unnecessarily reserved for large address spaces.
2024-10-07 00:14:39 +01:00
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418db1df99
Added config struct for RISC-V debug translator implementation, and WCH debug tools.
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Also some tidying in the `DebugToolConfig` struct
2024-10-06 23:32:36 +01:00
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a1dfa56913
New StringService::toHex() overload for std::uint16_t
2024-10-06 18:10:38 +01:00
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d71083c3f9
Tidying
2024-10-06 18:10:02 +01:00
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23056bcac5
New Expected template (should have been included in a previous commit)
2024-10-06 18:08:29 +01:00
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6c67424af9
On RISC-V activation, clear any triggers that were left over from a previous debug session
2024-10-06 18:06:58 +01:00
