Memory access commands should be LSB
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@@ -341,10 +341,10 @@ namespace Targets::RiscV
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this->executeAbstractCommand(command);
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const auto data = this->riscVDebugInterface->readDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_0);
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output.emplace_back(static_cast<unsigned char>(data >> 24));
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output.emplace_back(static_cast<unsigned char>(data >> 16));
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output.emplace_back(static_cast<unsigned char>(data >> 8));
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output.emplace_back(static_cast<unsigned char>(data));
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output.emplace_back(static_cast<unsigned char>(data >> 8));
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output.emplace_back(static_cast<unsigned char>(data >> 16));
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output.emplace_back(static_cast<unsigned char>(data >> 24));
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}
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return output;
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@@ -410,10 +410,10 @@ namespace Targets::RiscV
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this->riscVDebugInterface->writeDebugModuleRegister(
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RegisterAddress::ABSTRACT_DATA_0,
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static_cast<RegisterValue>(
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(buffer[offset] << 24)
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| (buffer[offset + 1] << 16)
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| (buffer[offset + 2] << 8)
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| (buffer[offset + 3])
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(buffer[offset + 3] << 24)
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| (buffer[offset + 2] << 16)
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| (buffer[offset + 1] << 8)
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| (buffer[offset])
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)
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);
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