From eab1688b1a3541301402045464f3ad284fa9de78 Mon Sep 17 00:00:00 2001
From: Nav <nav@navnav.me>
Date: Sat, 2 Dec 2023 14:00:06 +0000
Subject: [PATCH] Memory access commands should be LSB

---
 src/Targets/RiscV/RiscV.cpp | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/Targets/RiscV/RiscV.cpp b/src/Targets/RiscV/RiscV.cpp
index fcb1f747..c5b94c45 100644
--- a/src/Targets/RiscV/RiscV.cpp
+++ b/src/Targets/RiscV/RiscV.cpp
@@ -341,10 +341,10 @@ namespace Targets::RiscV
             this->executeAbstractCommand(command);
 
             const auto data = this->riscVDebugInterface->readDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_0);
-            output.emplace_back(static_cast<unsigned char>(data >> 24));
-            output.emplace_back(static_cast<unsigned char>(data >> 16));
-            output.emplace_back(static_cast<unsigned char>(data >> 8));
             output.emplace_back(static_cast<unsigned char>(data));
+            output.emplace_back(static_cast<unsigned char>(data >> 8));
+            output.emplace_back(static_cast<unsigned char>(data >> 16));
+            output.emplace_back(static_cast<unsigned char>(data >> 24));
         }
 
         return output;
@@ -410,10 +410,10 @@ namespace Targets::RiscV
             this->riscVDebugInterface->writeDebugModuleRegister(
                 RegisterAddress::ABSTRACT_DATA_0,
                 static_cast<RegisterValue>(
-                    (buffer[offset] << 24)
-                    | (buffer[offset + 1] << 16)
-                    | (buffer[offset + 2] << 8)
-                    | (buffer[offset + 3])
+                    (buffer[offset + 3] << 24)
+                    | (buffer[offset + 2] << 16)
+                    | (buffer[offset + 1] << 8)
+                    | (buffer[offset])
                 )
             );