More TDF reformatting
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@@ -12,8 +12,7 @@
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<device name="ATtiny861A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
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<address-spaces>
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<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
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<memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
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pagesize="0x40"/>
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<memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
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</address-space>
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<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
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<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
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@@ -30,8 +29,7 @@
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<memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
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</address-space>
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<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
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<memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
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pagesize="0x04"/>
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<memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
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</address-space>
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<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
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<address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
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@@ -41,8 +39,7 @@
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<peripherals>
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<module name="PORT">
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<instance name="PORTA" caption="I/O Port">
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<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PA0" index="0"/>
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<signal group="P" function="default" pad="PA1" index="1"/>
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@@ -55,8 +52,7 @@
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</signals>
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</instance>
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<instance name="PORTB" caption="I/O Port">
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PB0" index="0"/>
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<signal group="P" function="default" pad="PB1" index="1"/>
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@@ -71,62 +67,52 @@
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</module>
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<module name="ADC">
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<instance name="ADC" caption="Analog-to-Digital Converter">
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
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caption="Analog-to-Digital Converter"/>
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
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</instance>
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</module>
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<module name="AC">
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<instance name="AC" caption="Analog Comparator">
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<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
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caption="Analog Comparator"/>
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<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
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</instance>
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</module>
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<module name="USI">
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<instance name="USI" caption="Universal Serial Interface">
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<register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
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caption="Universal Serial Interface"/>
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<register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
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</instance>
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</module>
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<module name="EEPROM">
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<instance name="EEPROM" caption="EEPROM">
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
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caption="EEPROM"/>
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
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</instance>
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</module>
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<module name="WDT">
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<instance name="WDT" caption="Watchdog Timer">
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
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caption="Watchdog Timer"/>
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
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</instance>
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</module>
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<module name="TC8">
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<instance name="TC0" caption="Timer/Counter, 8-bit">
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
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caption="Timer/Counter, 8-bit"/>
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
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</instance>
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</module>
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<module name="TC16">
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<instance name="TC1" caption="Timer/Counter, 16-bit">
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<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
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caption="Timer/Counter, 16-bit"/>
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<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
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</instance>
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</module>
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<module name="BOOT_LOAD">
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<instance name="BOOT_LOAD" caption="Bootloader">
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<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
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caption="Bootloader"/>
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<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
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</instance>
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</module>
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<module name="EXINT">
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<instance name="EXINT" caption="External Interrupts">
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
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caption="External Interrupts"/>
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
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</instance>
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</module>
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<module name="CPU">
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<instance name="CPU" caption="CPU Registers">
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
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caption="CPU Registers"/>
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
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<parameters>
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<param name="CORE_VERSION" value="V2"/>
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<param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
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@@ -140,8 +126,7 @@
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</module>
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<module name="LOCKBIT">
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<instance name="LOCKBIT" caption="Lockbits">
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
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caption="Lockbits"/>
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
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</instance>
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</module>
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</peripherals>
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@@ -222,8 +207,7 @@
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="PP_INTERFACE">
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<property name="PpControlStack"
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value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
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<property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="5"/>
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@@ -284,8 +268,7 @@
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="PP_INTERFACE_STK600">
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<property name="PpControlStack"
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value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="5"/>
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@@ -311,8 +294,7 @@
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<property name="PpProgramLock_pollTimeout" value="5"/>
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</property-group>
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<property-group name="PP_INTERFACE_AVRDRAGON">
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<property name="PpControlStack"
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value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
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<property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="5"/>
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@@ -351,8 +333,7 @@
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<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
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<bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
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<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
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<bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
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values="ENUM_BODLEVEL"/>
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<bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
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</register>
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<register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
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<bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
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@@ -361,102 +342,54 @@
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</register>
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</register-group>
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<value-group caption="" name="ENUM_SUT_CKSEL">
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
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value="0x00"/>
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
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value="0x10"/>
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
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value="0x20"/>
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<value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS"
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value="0x01"/>
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<value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS"
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value="0x11"/>
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<value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS"
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value="0x21"/>
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<value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms"
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name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
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<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
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name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
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<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
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name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
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<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
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name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS"
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value="0x04"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms"
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name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms"
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name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
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name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
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name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
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name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
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name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
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name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
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name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
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name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
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name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
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name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
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name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
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name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
|
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
|
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
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name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
|
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<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
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name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
|
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<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
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name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
|
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<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
|
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name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
|
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<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
|
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name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
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name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
|
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<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
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name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
|
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<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
|
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<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
|
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<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
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name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
|
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<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
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name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
|
||||
name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
|
||||
name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
|
||||
name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
||||
name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
||||
name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
||||
name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
|
||||
<value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
|
||||
<value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
|
||||
<value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
|
||||
<value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
|
||||
<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
|
||||
<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
|
||||
<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BODLEVEL">
|
||||
<value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
|
||||
@@ -506,8 +439,7 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
|
||||
@@ -516,8 +448,7 @@
|
||||
<bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
|
||||
<bitfield caption="" mask="0x10" name="REFS2"/>
|
||||
<bitfield caption="" mask="0x08" name="MUX5"/>
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
|
||||
values="ANALOG_ADC_AUTO_TRIGGER3"/>
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
|
||||
</register>
|
||||
<register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
|
||||
<bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
|
||||
@@ -571,8 +502,7 @@
|
||||
<bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
|
||||
<bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ANALOG_COMP_INTERRUPT">
|
||||
@@ -633,8 +563,7 @@
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
@@ -655,15 +584,12 @@
|
||||
<module caption="Timer/Counter, 8-bit" name="TC8">
|
||||
<register-group caption="Timer/Counter, 8-bit" name="TC0">
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10"
|
||||
name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
|
||||
name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
|
||||
<bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
|
||||
@@ -684,10 +610,8 @@
|
||||
</register>
|
||||
<register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
||||
@@ -732,8 +656,7 @@
|
||||
<bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
|
||||
<bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
|
||||
<bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
|
||||
<bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1"
|
||||
values="PULSE_WIDTH_MODU2"/>
|
||||
<bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
|
||||
<bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
|
||||
@@ -745,12 +668,9 @@
|
||||
<register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
|
||||
<register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
|
||||
<bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80"
|
||||
name="OCIE1D"/>
|
||||
<bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40"
|
||||
name="OCIE1A"/>
|
||||
<bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20"
|
||||
name="OCIE1B"/>
|
||||
<bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
|
||||
<bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
|
||||
<bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
|
||||
@@ -797,8 +717,7 @@
|
||||
</module>
|
||||
<module caption="Bootloader" name="BOOT_LOAD">
|
||||
<register-group caption="Bootloader" name="BOOT_LOAD">
|
||||
<register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
|
||||
<bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
@@ -811,8 +730,7 @@
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
||||
<bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
|
||||
<bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
|
||||
<bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
|
||||
@@ -857,8 +775,7 @@
|
||||
<bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
|
||||
<bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
|
||||
<bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
|
||||
<bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL2"/>
|
||||
<bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
|
||||
</register>
|
||||
<register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
@@ -866,14 +783,12 @@
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF"
|
||||
ocd-rw="R">
|
||||
<register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
|
||||
values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
||||
</register>
|
||||
<register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
|
||||
<bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
|
||||
|
||||
Reference in New Issue
Block a user