More TDF reformatting
This commit is contained in:
@@ -1,34 +1,24 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<target-description-file>
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<variants>
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<variant ordercode="ATtiny404-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125"
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tempmin="-40" vccmax="5.5" vccmin="1.8"/>
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<variant ordercode="ATtiny404-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105"
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tempmin="-40" vccmax="5.5" vccmin="1.8"/>
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<variant ordercode="ATtiny404-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
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<variant ordercode="ATtiny404-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
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</variants>
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<device name="ATtiny404" family="AVR8" architecture="AVR8X" avr-family="AVR TINY">
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<address-spaces>
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<address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
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<memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400"
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type="eeprom"/>
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<memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
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type="fuses"/>
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<memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
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<memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
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<memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
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<memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
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<memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
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type="lockbits"/>
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<memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000"
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type="other"/>
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<memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103"
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type="signatures"/>
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<memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
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type="signatures"/>
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<memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300"
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type="user_signatures"/>
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<memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
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<memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
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<memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
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<memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
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<memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
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</address-space>
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<address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
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<memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000"
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type="flash"/>
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<memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
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</address-space>
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</address-spaces>
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<peripherals>
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@@ -370,10 +360,8 @@
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</register>
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<register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
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<bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
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<bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
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values="AC_MUXNEG"/>
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<bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
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values="AC_MUXPOS"/>
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<bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
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<bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
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</register>
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<register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
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<bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
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@@ -422,10 +410,8 @@
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<bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
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</register>
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<register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
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<bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
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values="ADC_ASDV"/>
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<bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
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values="ADC_INITDLY"/>
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<bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
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<bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
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<bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
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</register>
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<register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
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@@ -446,8 +432,7 @@
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<bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
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</register>
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<register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
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<bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
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values="ADC_MUXPOS"/>
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<bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
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</register>
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<register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
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<register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
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@@ -538,23 +523,18 @@
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<register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
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<bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
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</register>
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<register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
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rw="RW" size="1">
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<register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
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<bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
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<bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
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</register>
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<register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
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rw="RW" size="1">
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<register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
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<bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
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</register>
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<register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
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size="1">
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<register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
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<bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
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</register>
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<register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
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size="1">
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<bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
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values="BOD_VLMLVL"/>
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<register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
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<bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
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</register>
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</register-group>
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<value-group caption="Operation in active mode select" name="BOD_ACTIVE">
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@@ -602,14 +582,11 @@
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<bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
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</register>
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<register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
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values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
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values="CCL_INSEL1"/>
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
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</register>
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<register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
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values="CCL_INSEL2"/>
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
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</register>
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<register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
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<bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
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@@ -619,14 +596,11 @@
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<bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
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</register>
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<register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
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values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
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values="CCL_INSEL1"/>
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
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</register>
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<register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
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values="CCL_INSEL2"/>
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
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</register>
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<register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
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<bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
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@@ -712,12 +686,10 @@
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<bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
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<bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
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</register>
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<register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
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size="1">
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<register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
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<bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
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</register>
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<register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
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size="1">
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<register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
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<bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
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<bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
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</register>
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@@ -750,8 +722,7 @@
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</module>
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<module caption="CPU" id="I2100" name="CPU">
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<register-group caption="CPU" name="CPU" size="0x10">
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<register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
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size="1">
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<register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
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<bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
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</register>
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<register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
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@@ -779,12 +750,10 @@
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<bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
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<bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
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</register>
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<register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
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size="1">
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<register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
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<bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
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</register>
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<register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
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size="1">
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<register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
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<bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
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</register>
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<register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
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@@ -824,89 +793,55 @@
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</module>
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<module caption="Event System" id="I2601" name="EVSYS">
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<register-group caption="Event System" name="EVSYS" size="0x40">
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<register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0"
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offset="0x02" rw="RW" size="1">
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<bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW"
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values="EVSYS_ASYNCCH0"/>
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<register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
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<bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
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</register>
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<register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1"
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offset="0x03" rw="RW" size="1">
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<bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW"
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values="EVSYS_ASYNCCH1"/>
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<register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
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<bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
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</register>
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<register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W"
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size="1"/>
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<register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0"
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offset="0x12" rw="RW" size="1">
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<bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0"
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rw="RW" values="EVSYS_ASYNCUSER0"/>
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||||
<register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
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||||
<register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
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<bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
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</register>
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<register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1"
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offset="0x13" rw="RW" size="1">
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<bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1"
|
||||
rw="RW" values="EVSYS_ASYNCUSER1"/>
|
||||
<register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
|
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<bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
|
||||
</register>
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||||
<register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00"
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||||
name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
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||||
<bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff"
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||||
name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
|
||||
<register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
|
||||
</register>
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<register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00"
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name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff"
|
||||
name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
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||||
<register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
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<bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
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||||
</register>
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||||
<register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00"
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||||
name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff"
|
||||
name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
|
||||
<register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
|
||||
</register>
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||||
<register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00"
|
||||
name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff"
|
||||
name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
|
||||
<register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
|
||||
</register>
|
||||
<register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00"
|
||||
name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff"
|
||||
name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
|
||||
<register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
|
||||
</register>
|
||||
<register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00"
|
||||
name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff"
|
||||
name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
|
||||
<register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
|
||||
</register>
|
||||
<register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00"
|
||||
name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff"
|
||||
name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
|
||||
<register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
|
||||
</register>
|
||||
<register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00"
|
||||
name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff"
|
||||
name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
|
||||
<register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
|
||||
</register>
|
||||
<register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00"
|
||||
name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff"
|
||||
name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
|
||||
<register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
|
||||
<bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
|
||||
</register>
|
||||
<register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0"
|
||||
offset="0x0A" rw="RW" size="1">
|
||||
<bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW"
|
||||
values="EVSYS_SYNCCH0"/>
|
||||
<register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
|
||||
<bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
|
||||
</register>
|
||||
<register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W"
|
||||
size="1"/>
|
||||
<register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0"
|
||||
offset="0x22" rw="RW" size="1">
|
||||
<bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0"
|
||||
rw="RW" values="EVSYS_SYNCUSER0"/>
|
||||
<register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
|
||||
<register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
|
||||
<bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
|
||||
</register>
|
||||
<register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1"
|
||||
offset="0x23" rw="RW" size="1">
|
||||
<bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1"
|
||||
rw="RW" values="EVSYS_SYNCUSER1"/>
|
||||
<register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
|
||||
<bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
|
||||
@@ -968,8 +903,7 @@
|
||||
<value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
|
||||
<value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
|
||||
</value-group>
|
||||
<value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select"
|
||||
name="EVSYS_ASYNCUSER2">
|
||||
<value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
|
||||
<value caption="Off" name="OFF" value="0x00"/>
|
||||
<value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
|
||||
<value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
|
||||
@@ -978,8 +912,7 @@
|
||||
<value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
|
||||
<value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
|
||||
</value-group>
|
||||
<value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select"
|
||||
name="EVSYS_ASYNCUSER3">
|
||||
<value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
|
||||
<value caption="Off" name="OFF" value="0x00"/>
|
||||
<value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
|
||||
<value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
|
||||
@@ -988,8 +921,7 @@
|
||||
<value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
|
||||
<value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
|
||||
</value-group>
|
||||
<value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select"
|
||||
name="EVSYS_ASYNCUSER4">
|
||||
<value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
|
||||
<value caption="Off" name="OFF" value="0x00"/>
|
||||
<value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
|
||||
<value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
|
||||
@@ -998,8 +930,7 @@
|
||||
<value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
|
||||
<value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
|
||||
</value-group>
|
||||
<value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select"
|
||||
name="EVSYS_ASYNCUSER5">
|
||||
<value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
|
||||
<value caption="Off" name="OFF" value="0x00"/>
|
||||
<value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
|
||||
<value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
|
||||
@@ -1044,8 +975,7 @@
|
||||
<value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
|
||||
<value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
|
||||
</value-group>
|
||||
<value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select"
|
||||
name="EVSYS_ASYNCUSER10">
|
||||
<value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
|
||||
<value caption="Off" name="OFF" value="0x00"/>
|
||||
<value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
|
||||
<value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
|
||||
@@ -1090,16 +1020,12 @@
|
||||
</module>
|
||||
<module caption="Fuses" id="I2601" name="FUSE">
|
||||
<register-group caption="Fuses" name="FUSE" size="0x09">
|
||||
<register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
|
||||
size="1"/>
|
||||
<register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
|
||||
<register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
|
||||
<bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
|
||||
values="FUSE_ACTIVE"/>
|
||||
<bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
|
||||
<bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
|
||||
<bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
|
||||
values="FUSE_SAMPFREQ"/>
|
||||
<bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
|
||||
values="FUSE_SLEEP"/>
|
||||
<bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
|
||||
<bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
|
||||
</register>
|
||||
<register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
|
||||
<register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
|
||||
@@ -1109,8 +1035,7 @@
|
||||
<register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
|
||||
<bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
|
||||
<bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
|
||||
<bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW"
|
||||
values="FUSE_RSTPINCFG"/>
|
||||
<bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
|
||||
</register>
|
||||
<register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
|
||||
<bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
|
||||
@@ -1127,8 +1052,7 @@
|
||||
</register>
|
||||
<register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
|
||||
<bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
|
||||
<bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
|
||||
values="FUSE_WINDOW"/>
|
||||
<bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
|
||||
@@ -1156,11 +1080,9 @@
|
||||
<value caption="20 MHz" name="20MHZ" value="0x2"/>
|
||||
</value-group>
|
||||
<value-group caption="CRC Source select" name="FUSE_CRCSRC">
|
||||
<value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
|
||||
name="FLASH" value="0x0"/>
|
||||
<value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
|
||||
<value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
|
||||
<value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
|
||||
value="0x2"/>
|
||||
<value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
|
||||
<value caption="Disable CRC." name="NOCRC" value="0x3"/>
|
||||
</value-group>
|
||||
<value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
|
||||
@@ -1326,40 +1248,27 @@
|
||||
</module>
|
||||
<module caption="Port Multiplexer" id="I2601" name="PORTMUX">
|
||||
<register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
|
||||
<register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW"
|
||||
size="1">
|
||||
<register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
|
||||
<bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
|
||||
<bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
|
||||
<bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
|
||||
<bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW"
|
||||
values="PORTMUX_LUT0"/>
|
||||
<bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW"
|
||||
values="PORTMUX_LUT1"/>
|
||||
<bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
|
||||
<bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
|
||||
</register>
|
||||
<register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW"
|
||||
size="1">
|
||||
<register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
|
||||
<bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
|
||||
<bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
|
||||
<bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW"
|
||||
values="PORTMUX_USART0"/>
|
||||
<bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
|
||||
</register>
|
||||
<register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW"
|
||||
size="1">
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW"
|
||||
values="PORTMUX_TCA00"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW"
|
||||
values="PORTMUX_TCA01"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW"
|
||||
values="PORTMUX_TCA02"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW"
|
||||
values="PORTMUX_TCA03"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW"
|
||||
values="PORTMUX_TCA04"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW"
|
||||
values="PORTMUX_TCA05"/>
|
||||
<register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
|
||||
<bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
|
||||
</register>
|
||||
<register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW"
|
||||
size="1">
|
||||
<register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
|
||||
<bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
|
||||
</register>
|
||||
</register-group>
|
||||
@@ -1458,12 +1367,10 @@
|
||||
<register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
|
||||
<bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
|
||||
</register>
|
||||
<register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
|
||||
size="1">
|
||||
<register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
|
||||
<bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
|
||||
</register>
|
||||
<register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
|
||||
size="1">
|
||||
<register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
|
||||
<bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
|
||||
</register>
|
||||
<register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
|
||||
@@ -1538,10 +1445,8 @@
|
||||
<register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
|
||||
<register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
|
||||
<register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
|
||||
<register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
|
||||
<register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Sleep Controller" id="I2112" name="SLPCTRL">
|
||||
@@ -1633,8 +1538,7 @@
|
||||
<bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
|
||||
<bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
|
||||
<bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
|
||||
<bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
|
||||
values="TCA_SINGLE_WGMODE"/>
|
||||
<bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
|
||||
</register>
|
||||
<register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
|
||||
<bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
|
||||
@@ -1747,8 +1651,7 @@
|
||||
<register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
|
||||
<register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
|
||||
</register-group>
|
||||
<register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
|
||||
union-tag="TCA.SINGLE.CTRLD.SPLITM">
|
||||
<register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
|
||||
<register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
|
||||
<register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
|
||||
</register-group>
|
||||
@@ -1784,8 +1687,7 @@
|
||||
<value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
|
||||
<value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
|
||||
<value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
|
||||
<value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
|
||||
name="UPDOWN" value="0x03"/>
|
||||
<value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
|
||||
<value caption="System Clock" name="DIV1" value="0x00"/>
|
||||
@@ -1962,15 +1864,13 @@
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
|
||||
<register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
|
||||
size="0x10">
|
||||
<register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
|
||||
<register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
|
||||
<register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
|
||||
<bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
|
||||
<bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
|
||||
<bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
|
||||
<bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
|
||||
values="USART_RS485"/>
|
||||
<bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
|
||||
<bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
|
||||
<bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
|
||||
<bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
|
||||
@@ -1985,19 +1885,15 @@
|
||||
</register>
|
||||
<register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
|
||||
<mode name="MSPI">
|
||||
<bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
|
||||
values="USART_MSPI_CMODE"/>
|
||||
<bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
|
||||
<bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
|
||||
<bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
|
||||
</mode>
|
||||
<mode name="NORMAL">
|
||||
<bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
|
||||
values="USART_NORMAL_CHSIZE"/>
|
||||
<bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
|
||||
values="USART_NORMAL_CMODE"/>
|
||||
<bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
|
||||
<bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
|
||||
<bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
|
||||
<bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
|
||||
values="USART_NORMAL_SBMODE"/>
|
||||
<bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
|
||||
</mode>
|
||||
</register>
|
||||
<register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
|
||||
@@ -2017,8 +1913,7 @@
|
||||
<register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
|
||||
<bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
|
||||
</register>
|
||||
<register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
|
||||
rw="RW" size="1">
|
||||
<register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
|
||||
<bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
|
||||
</register>
|
||||
<register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
|
||||
@@ -2036,8 +1931,7 @@
|
||||
<register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
|
||||
<bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
|
||||
</register>
|
||||
<register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
|
||||
rw="RW" size="1">
|
||||
<register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
|
||||
<bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
|
||||
</register>
|
||||
</register-group>
|
||||
@@ -2131,10 +2025,8 @@
|
||||
<module caption="Voltage reference" id="I2601" name="VREF">
|
||||
<register-group caption="Voltage reference" name="VREF" size="0x2">
|
||||
<register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
|
||||
<bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
|
||||
values="VREF_ADC0REFSEL"/>
|
||||
<bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW"
|
||||
values="VREF_DAC0REFSEL"/>
|
||||
<bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
|
||||
<bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
|
||||
</register>
|
||||
<register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
|
||||
<bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
|
||||
|
||||
Reference in New Issue
Block a user