More TDF reformatting
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@@ -8,8 +8,7 @@
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<device name="ATtiny167" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
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<address-spaces>
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<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
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<memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
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pagesize="0x80"/>
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<memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
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</address-space>
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<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
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<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
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@@ -26,8 +25,7 @@
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<memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
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</address-space>
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<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
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<memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
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pagesize="0x04"/>
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<memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
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</address-space>
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<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
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<address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
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@@ -37,8 +35,7 @@
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<peripherals>
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<module name="PORT">
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<instance name="PORTA" caption="I/O Port">
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<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PA0" index="0"/>
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<signal group="P" function="default" pad="PA1" index="1"/>
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@@ -51,8 +48,7 @@
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</signals>
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</instance>
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<instance name="PORTB" caption="I/O Port">
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PB0" index="0"/>
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<signal group="P" function="default" pad="PB1" index="1"/>
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@@ -67,80 +63,67 @@
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</module>
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<module name="LINUART">
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<instance name="LINUART" caption="Local Interconnect Network">
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<register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
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caption="Local Interconnect Network"/>
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<register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
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</instance>
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</module>
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<module name="USI">
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<instance name="USI" caption="Universal Serial Interface">
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<register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
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caption="Universal Serial Interface"/>
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<register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
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</instance>
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</module>
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<module name="TC8_ASYNC">
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<instance name="TC0" caption="Timer/Counter, 8-bit Async">
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
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caption="Timer/Counter, 8-bit Async"/>
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
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</instance>
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</module>
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<module name="TC16">
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<instance name="TC1" caption="Timer/Counter, 16-bit">
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<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
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caption="Timer/Counter, 16-bit"/>
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<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
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</instance>
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</module>
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<module name="WDT">
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<instance name="WDT" caption="Watchdog Timer">
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
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caption="Watchdog Timer"/>
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
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</instance>
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</module>
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<module name="EEPROM">
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<instance name="EEPROM" caption="EEPROM">
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
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caption="EEPROM"/>
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
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</instance>
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</module>
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<module name="SPI">
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<instance name="SPI" caption="Serial Peripheral Interface">
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<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
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caption="Serial Peripheral Interface"/>
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<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
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</instance>
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</module>
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<module name="ADC">
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<instance name="ADC" caption="Analog-to-Digital Converter">
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
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caption="Analog-to-Digital Converter"/>
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
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</instance>
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</module>
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<module name="CURRENT_SOURCE">
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<instance name="CURRENT_SOURCE" caption="Current Source">
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<register-group name="CURRENT_SOURCE" name-in-module="CURRENT_SOURCE" offset="0x00"
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address-space="data" caption="Current Source"/>
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<register-group name="CURRENT_SOURCE" name-in-module="CURRENT_SOURCE" offset="0x00" address-space="data" caption="Current Source"/>
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</instance>
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</module>
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<module name="AC">
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<instance name="AC" caption="Analog Comparator">
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<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
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caption="Analog Comparator"/>
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<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
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</instance>
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</module>
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<module name="EXINT">
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<instance name="EXINT" caption="External Interrupts">
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
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caption="External Interrupts"/>
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
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</instance>
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</module>
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<module name="BOOT_LOAD">
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<instance name="BOOT_LOAD" caption="Bootloader">
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<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
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caption="Bootloader"/>
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<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
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</instance>
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</module>
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<module name="CPU">
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<instance name="CPU" caption="CPU Registers">
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
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caption="CPU Registers"/>
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
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<parameters>
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<param name="CORE_VERSION" value="V2"/>
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<param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
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@@ -154,8 +137,7 @@
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</module>
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<module name="LOCKBIT">
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<instance name="LOCKBIT" caption="Lockbits">
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
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caption="Lockbits"/>
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
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</instance>
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</module>
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</peripherals>
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@@ -237,8 +219,7 @@
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="PP_INTERFACE_STK600">
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<property name="PpControlStack"
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value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="5"/>
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@@ -299,8 +280,7 @@
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="PP_INTERFACE">
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<property name="PpControlStack"
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value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="5"/>
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@@ -339,8 +319,7 @@
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<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
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<bitfield caption="Watch-dog Timer always ON" mask="0x10" name="WDTON"/>
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<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
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<bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
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values="ENUM_BODLEVEL"/>
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<bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
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</register>
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<register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
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<bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
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@@ -349,94 +328,50 @@
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</register>
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</register-group>
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<value-group caption="" name="ENUM_SUT_CKSEL">
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
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value="0x00"/>
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS"
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value="0x10"/>
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS"
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value="0x20"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
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<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
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name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
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<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms"
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name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
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<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms"
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name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms"
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name="EXTLOFXTAL_1KCK_4MS" value="0x04"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms"
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name="EXTLOFXTAL_1KCK_64MS" value="0x14"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms"
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name="EXTLOFXTAL_32KCK_64MS" value="0x24"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
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name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
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name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
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name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
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name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
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<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
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name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
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name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
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name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
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name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
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name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
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<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
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name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
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name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
|
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
|
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name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
||||
name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
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name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
|
||||
name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
|
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name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
|
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name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
|
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<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
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name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
||||
name="EXTCRES_8MHZ_16MHZ_258CK_14CK_4MS1" value="0x0E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
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name="EXTCRES_8MHZ_16MHZ_258CK_14CK_65MS" value="0x1E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms"
|
||||
name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_0MS" value="0x2E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms"
|
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name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_4MS1" value="0x3E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms"
|
||||
name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_65MS" value="0x0F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms"
|
||||
name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_0MS" value="0x1F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms"
|
||||
name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_4MS1" value="0x2F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms"
|
||||
name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_65MS" value="0x3F"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
|
||||
<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
|
||||
<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
|
||||
<value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x04"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x14"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x24"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
|
||||
<value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
|
||||
<value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
|
||||
<value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_4MS1" value="0x0E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_65MS" value="0x1E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_0MS" value="0x2E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_4MS1" value="0x3E"/>
|
||||
<value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_65MS" value="0x0F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_0MS" value="0x1F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_4MS1" value="0x2F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_65MS" value="0x3F"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BODLEVEL">
|
||||
<value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
|
||||
@@ -564,12 +499,10 @@
|
||||
<module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
|
||||
<register-group caption="Timer/Counter, 8-bit Async" name="TC0">
|
||||
<register caption="Timer/Counter0 Interrupt Mask register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
|
||||
name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
|
||||
<bitfield caption="Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
@@ -582,8 +515,7 @@
|
||||
<bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0" name="TCNT0" offset="0x47" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x48" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
|
||||
<register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
|
||||
<bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
|
||||
<bitfield caption="Asynchronous Timer/Counter0" mask="0x20" name="AS0"/>
|
||||
@@ -613,14 +545,11 @@
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
|
||||
name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
|
||||
name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
|
||||
@@ -635,38 +564,26 @@
|
||||
<bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
|
||||
<bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
|
||||
<bitfield caption="Timer/Counter1 Clock Select bits" mask="0x07" name="CS1"
|
||||
values="CLK_SEL_3BIT_EXT"/>
|
||||
<bitfield caption="Timer/Counter1 Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
|
||||
<bitfield caption="Timer/Counter1 Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Timer/Counter1 Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Control Register D" name="TCCR1D" offset="0x83" size="1">
|
||||
<bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel B" mask="0x80"
|
||||
name="OC1BX"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel B" mask="0x40"
|
||||
name="OC1BW"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel B" mask="0x20"
|
||||
name="OC1BV"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel B" mask="0x10"
|
||||
name="OC1BU"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel A" mask="0x08"
|
||||
name="OC1AX"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel A" mask="0x04"
|
||||
name="OC1AW"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel A" mask="0x02"
|
||||
name="OC1AV"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01"
|
||||
name="OC1AU"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel B" mask="0x80" name="OC1BX"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel B" mask="0x40" name="OC1BW"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel B" mask="0x20" name="OC1BV"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel B" mask="0x10" name="OC1BU"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel A" mask="0x08" name="OC1AX"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel A" mask="0x04" name="OC1AW"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel A" mask="0x02" name="OC1AV"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01" name="OC1AU"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
||||
@@ -684,8 +601,7 @@
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
@@ -758,24 +674,19 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)"
|
||||
name="ADCSRB" offset="0x7B" size="1">
|
||||
<register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
|
||||
<bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
|
||||
values="ANALOG_ADC_AUTO_TRIGGER4"/>
|
||||
<bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER4"/>
|
||||
</register>
|
||||
<register caption="Analog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)"
|
||||
name="AMISCR" offset="0x77" size="1">
|
||||
<register caption="Analog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)" name="AMISCR" offset="0x77" size="1">
|
||||
<bitfield caption="External Voltage Reference Input Enable" mask="0x04" name="AREFEN"/>
|
||||
<bitfield caption="Internal Voltage Reference Output Enable" mask="0x02" name="XREFEN"/>
|
||||
</register>
|
||||
@@ -796,14 +707,10 @@
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ANALOG_ADC_V_REF8">
|
||||
<value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference. "
|
||||
name="VAL_0x00" value="0x00"/>
|
||||
<value caption="If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin."
|
||||
name="VAL_0x01" value="0x01"/>
|
||||
<value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference. "
|
||||
name="VAL_0x02" value="0x02"/>
|
||||
<value caption="If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin."
|
||||
name="VAL_0x03" value="0x03"/>
|
||||
<value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference. " name="VAL_0x00" value="0x00"/>
|
||||
<value caption="If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x01" value="0x01"/>
|
||||
<value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference. " name="VAL_0x02" value="0x02"/>
|
||||
<value caption="If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ANALOG_ADC_PRESCALER">
|
||||
<value caption="2" name="VAL_0x00" value="0x00"/>
|
||||
@@ -828,31 +735,25 @@
|
||||
</module>
|
||||
<module caption="Current Source" name="CURRENT_SOURCE">
|
||||
<register-group caption="Current Source" name="CURRENT_SOURCE">
|
||||
<register caption="Analog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)"
|
||||
name="AMISCR" offset="0x77" size="1">
|
||||
<register caption="Analog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)" name="AMISCR" offset="0x77" size="1">
|
||||
<bitfield caption="Current Source Enable" mask="0x01" name="ISRCEN"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Analog Comparator" name="AC">
|
||||
<register-group caption="Analog Comparator" name="AC">
|
||||
<register
|
||||
caption="Analog Comparator & ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)"
|
||||
name="ADCSRB" offset="0x7B" size="1">
|
||||
<register caption="Analog Comparator & ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
|
||||
<bitfield caption="Analog Comparator Internal Voltage Reference Select Bits" mask="0x30"
|
||||
name="ACIR"/>
|
||||
<bitfield caption="Analog Comparator Internal Voltage Reference Select Bits" mask="0x30" name="ACIR"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
|
||||
<bitfield caption="Analog Comparator Internal Reference Select" mask="0x40" name="ACIRS"/>
|
||||
<bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
|
||||
<bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ANALOG_COMP_INTERRUPT">
|
||||
@@ -865,10 +766,8 @@
|
||||
<module caption="External Interrupts" name="EXINT">
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
||||
values="INTERRUPT_SENSE_CONTROL2"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL2"/>
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
|
||||
@@ -945,14 +844,12 @@
|
||||
<bitfield caption="Sleep Mode Select Bits" mask="0x06" name="SM" values="CPU_SLEEP_MODE2"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
||||
</register>
|
||||
<register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
|
||||
ocd-rw="R">
|
||||
<register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
|
||||
values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
||||
</register>
|
||||
<register caption="Clock Selection Register" name="CLKSELR" offset="0x63" size="1">
|
||||
<bitfield caption="Clock Out - CKOUT fuse substitution" mask="0x40" name="COUT"/>
|
||||
@@ -962,8 +859,7 @@
|
||||
<register caption="Clock Control & Status Register" name="CLKCSR" offset="0x62" size="1">
|
||||
<bitfield caption="Clock Control Change Enable" mask="0x80" name="CLKCCE"/>
|
||||
<bitfield caption="Clock Ready Flag" mask="0x10" name="CLKRDY"/>
|
||||
<bitfield caption="Clock Control bits" mask="0x0F" name="CLKC"
|
||||
values="CPU_CLK_COMMAND_LIST_4_BITS"/>
|
||||
<bitfield caption="Clock Control bits" mask="0x0F" name="CLKC" values="CPU_CLK_COMMAND_LIST_4_BITS"/>
|
||||
</register>
|
||||
<register caption="DebugWire data register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
|
||||
<register caption="General Purpose IO register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
|
||||
|
||||
Reference in New Issue
Block a user