More TDF reformatting
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@@ -1,34 +1,22 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<target-description-file>
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<variants>
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<variant ordercode="ATtiny13A-PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
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package="PDIP8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
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package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SSH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
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package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
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package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
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package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
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package="MLF10" pinout="MLF10"/>
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<variant ordercode="ATtiny13A-MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
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package="MLF20" pinout="MLF20"/>
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<variant ordercode="ATtiny13A-SN" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5"
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package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SS7" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5"
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package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5"
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package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-MMF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5"
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package="MLF10" pinout="MLF10"/>
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<variant ordercode="ATtiny13A-PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SSH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
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<variant ordercode="ATtiny13A-MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF20" pinout="MLF20"/>
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<variant ordercode="ATtiny13A-SN" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SS7" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-SF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP_SOIC_8"/>
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<variant ordercode="ATtiny13A-MMF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
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</variants>
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<device name="ATtiny13A" family="AVR8" architecture="AVR8" avr-family="tinyAVR">
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<address-spaces>
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<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
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<memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH"
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pagesize="0x20"/>
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<memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
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</address-space>
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<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
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<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
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@@ -45,8 +33,7 @@
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<memory-segment name="IRAM" start="0x0060" size="0x0040" type="ram" external="false"/>
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</address-space>
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<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
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<memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM"
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pagesize="0x04"/>
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<memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
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</address-space>
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<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
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<address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
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@@ -56,8 +43,7 @@
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<peripherals>
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<module name="ADC">
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<instance name="ADC" caption="Analog-to-Digital Converter">
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
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caption="Analog-to-Digital Converter"/>
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
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<signals>
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<signal group="ADC" index="0" function="default" pad="PA0"/>
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<signal group="ADC" index="1" function="default" pad="PA1"/>
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@@ -68,8 +54,7 @@
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</module>
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<module name="AC">
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<instance name="AC" caption="Analog Comparator">
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<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
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caption="Analog Comparator"/>
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<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
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<signals>
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<signal group="AIN" index="1" pad="PB1" function="default"/>
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<signal group="AIN" index="0" pad="PB0" function="default"/>
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@@ -78,14 +63,12 @@
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</module>
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<module name="EEPROM">
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<instance name="EEPROM" caption="EEPROM">
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
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caption="EEPROM"/>
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
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</instance>
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</module>
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<module name="CPU">
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<instance name="CPU" caption="CPU Registers">
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
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caption="CPU Registers"/>
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
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<parameters>
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<param name="CORE_VERSION" value="V2"/>
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<param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
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@@ -94,8 +77,7 @@
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</module>
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<module name="PORT">
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<instance name="PORTB" caption="I/O Port">
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PB0" index="0"/>
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<signal group="P" function="default" pad="PB1" index="1"/>
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@@ -108,8 +90,7 @@
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</module>
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<module name="EXINT">
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<instance name="EXINT" caption="External Interrupts">
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
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caption="External Interrupts"/>
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
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<signals>
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<signal group="PCINT5" pad="PB5" function="default"/>
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<signal group="PCINT4" pad="PB4" function="default"/>
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@@ -123,8 +104,7 @@
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</module>
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<module name="TC8">
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<instance name="TC0" caption="Timer/Counter, 8-bit">
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
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caption="Timer/Counter, 8-bit"/>
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
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<signals>
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<signal group="T" pad="PB2" function="default"/>
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<signal group="OCB" pad="PB1" function="default"/>
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@@ -134,8 +114,7 @@
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</module>
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<module name="WDT">
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<instance name="WDT" caption="Watchdog Timer">
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
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caption="Watchdog Timer"/>
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
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</instance>
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</module>
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<module name="FUSE">
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@@ -145,8 +124,7 @@
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</module>
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<module name="LOCKBIT">
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<instance name="LOCKBIT" caption="Lockbits">
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
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caption="Lockbits"/>
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
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</instance>
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</module>
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</peripherals>
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@@ -218,8 +196,7 @@
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="HVSP_INTERFACE">
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<property name="HvspControlStack"
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value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
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<property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
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<property name="HvspEnterProgMode_stabDelay" value="100"/>
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<property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
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<property name="HvspEnterProgMode_synchCycles" value="6"/>
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@@ -279,8 +256,7 @@
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="HVSP_INTERFACE_STK600">
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<property name="HvspControlStack"
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value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
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<property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
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<property name="HvspEnterProgMode_stabDelay" value="100"/>
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<property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
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<property name="HvspEnterProgMode_synchCycles" value="6"/>
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@@ -327,24 +303,15 @@
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<value caption="Ext. Clock; Start-up time: 14 CK + 0 ms" name="EXTCLK_14CK_0MS" value="0x00"/>
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<value caption="Ext. Clock; Start-up time: 14 CK + 4 ms" name="EXTCLK_14CK_4MS" value="0x04"/>
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<value caption="Ext. Clock; Start-up time: 14 CK + 64 ms" name="EXTCLK_14CK_64MS" value="0x08"/>
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<value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_4MHZ8_14CK_0MS"
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value="0x01"/>
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<value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_4MHZ8_14CK_4MS"
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value="0x05"/>
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<value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_4MHZ8_14CK_64MS"
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value="0x09"/>
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<value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_9MHZ6_14CK_0MS"
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value="0x02"/>
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<value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_9MHZ6_14CK_4MS"
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value="0x06"/>
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<value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_9MHZ6_14CK_64MS"
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value="0x0A"/>
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<value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS"
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value="0x03"/>
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<value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS"
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value="0x07"/>
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<value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS"
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value="0x0B"/>
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<value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_4MHZ8_14CK_0MS" value="0x01"/>
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<value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_4MHZ8_14CK_4MS" value="0x05"/>
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<value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_4MHZ8_14CK_64MS" value="0x09"/>
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<value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_9MHZ6_14CK_0MS" value="0x02"/>
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<value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_9MHZ6_14CK_4MS" value="0x06"/>
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<value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_9MHZ6_14CK_64MS" value="0x0A"/>
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<value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x03"/>
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<value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x07"/>
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<value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x0B"/>
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</value-group>
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<value-group caption="" name="ENUM_BODLEVEL">
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<value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
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@@ -378,13 +345,11 @@
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<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
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<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
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<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
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values="ANALOG_ADC_PRESCALER"/>
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
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</register>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
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<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
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<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
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values="ANALOG_ADC_AUTO_TRIGGER2"/>
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<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
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</register>
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<register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
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<bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
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@@ -419,15 +384,13 @@
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<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
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<bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
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</register>
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<register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
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ocd-rw="R">
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<register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
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<bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
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<bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
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<bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
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<bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
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<bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
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<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
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values="ANALOG_COMP_INTERRUPT"/>
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<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
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</register>
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<register caption="" name="DIDR0" offset="0x34" size="1">
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<bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
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@@ -470,8 +433,7 @@
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<register-group caption="External Interrupts" name="EXINT">
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<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
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<bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
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<bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
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values="INTERRUPT_SENSE_CONTROL"/>
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<bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
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</register>
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<register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
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<bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
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@@ -493,20 +455,16 @@
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<module caption="Timer/Counter, 8-bit" name="TC8">
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<register-group caption="Timer/Counter, 8-bit" name="TC0">
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<register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
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<bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08"
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name="OCIE0B"/>
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<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x04"
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name="OCIE0A"/>
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<bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
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<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x04" name="OCIE0A"/>
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<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
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</register>
|
||||
<register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x58" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x04" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x4F" size="1">
|
||||
<bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
|
||||
@@ -519,8 +477,7 @@
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x49" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
|
||||
<register caption="General Timer Conuter Register" name="GTCCR" offset="0x48" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset Timer/Counter0" mask="0x01" name="PSR10"/>
|
||||
@@ -542,8 +499,7 @@
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDTIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDTIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
@@ -578,8 +534,7 @@
|
||||
<bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
|
||||
<bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
|
||||
<bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL2"/>
|
||||
<bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
|
||||
</register>
|
||||
<register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
@@ -587,18 +542,15 @@
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F"
|
||||
ocd-rw="R">
|
||||
<register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
|
||||
values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
||||
</register>
|
||||
<register caption="Debug Wire Data Register" name="DWDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1" ocd-rw="R">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
|
||||
<bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
|
||||
Reference in New Issue
Block a user