More TDF reformatting
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@@ -1,36 +1,25 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<target-description-file>
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<variants>
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<variant ordercode="ATmega4808-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
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tempmin="-40" vccmax="5.0" vccmin="1.8"/>
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<variant ordercode="ATmega4808-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
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tempmin="-40" vccmax="5.0" vccmin="1.8"/>
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<variant ordercode="ATmega4808-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
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tempmin="-40" vccmax="5.0" vccmin="1.8"/>
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<variant ordercode="ATmega4808-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
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<variant ordercode="ATmega4808-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
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<variant ordercode="ATmega4808-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.0" vccmin="1.8"/>
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</variants>
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<device name="ATmega4808" family="AVR8" architecture="AVR8X" avr-family="AVR MEGA">
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<address-spaces>
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<address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
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<memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
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type="eeprom"/>
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<memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
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type="fuses"/>
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<memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
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<memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
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<memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1800" start="0x2800" type="ram"/>
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<memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
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<memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
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type="lockbits"/>
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<memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0xC000"
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start="0x00004000" type="other"/>
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<memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
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start="0x00001103" type="signatures"/>
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<memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
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type="signatures"/>
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<memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
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start="0x00001300" type="user_signatures"/>
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<memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
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<memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00004000" type="other"/>
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<memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D" start="0x00001103" type="signatures"/>
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<memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
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<memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
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</address-space>
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<address-space endianness="little" id="prog" name="prog" size="0xC000" start="0x0000">
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<memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00000000"
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type="flash"/>
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<memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00000000" type="flash"/>
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</address-space>
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</address-spaces>
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<peripherals>
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@@ -80,8 +69,7 @@
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<signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
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<signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
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<signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
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<signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
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pad="PA6"/>
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<signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PA6"/>
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<signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
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<signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
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<signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
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@@ -91,13 +79,11 @@
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<signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
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<signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
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<signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
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<signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
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pad="PD6"/>
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<signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1" pad="PD6"/>
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<signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
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<signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
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<signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
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<signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
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pad="PF6"/>
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<signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1" pad="PF6"/>
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<signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
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</signals>
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</instance>
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@@ -135,18 +121,12 @@
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<instance name="EVSYS">
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<register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
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<signals>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
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pad="PA7"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
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pad="PA2"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
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pad="PC2"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
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pad="PD7"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
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pad="PD2"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
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pad="PF2"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3" pad="PD7"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3" pad="PD2"/>
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<signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5" pad="PF2"/>
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</signals>
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</instance>
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</module>
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@@ -491,10 +471,8 @@
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</register>
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<register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
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<bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
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<bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
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values="AC_MUXNEG"/>
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<bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
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values="AC_MUXPOS"/>
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<bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
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<bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
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</register>
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<register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
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<bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
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@@ -552,10 +530,8 @@
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<bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
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</register>
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<register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
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<bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
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values="ADC_ASDV"/>
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<bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
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values="ADC_INITDLY"/>
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<bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
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<bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
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<bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
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</register>
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<register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
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@@ -576,8 +552,7 @@
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<bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
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</register>
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<register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
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<bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
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values="ADC_MUXPOS"/>
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<bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
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</register>
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<register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
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<register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
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@@ -672,23 +647,18 @@
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<register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
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<bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
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</register>
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<register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
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rw="RW" size="1">
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<register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
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<bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
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<bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
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</register>
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<register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
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rw="RW" size="1">
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<register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
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<bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
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</register>
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<register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
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size="1">
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<register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
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<bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
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</register>
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<register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
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size="1">
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<bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
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values="BOD_VLMLVL"/>
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<register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
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<bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
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</register>
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</register-group>
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<value-group caption="Operation in active mode select" name="BOD_ACTIVE">
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@@ -729,14 +699,10 @@
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<bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
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</register>
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<register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
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<bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
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values="CCL_INTMODE0"/>
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<bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
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values="CCL_INTMODE1"/>
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<bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
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values="CCL_INTMODE2"/>
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<bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
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values="CCL_INTMODE3"/>
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<bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
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<bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
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<bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
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<bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
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</register>
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<register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
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<bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
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@@ -749,14 +715,11 @@
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<bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
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</register>
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<register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
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values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
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values="CCL_INSEL1"/>
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
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</register>
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<register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
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values="CCL_INSEL2"/>
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
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</register>
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<register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
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<bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
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@@ -766,14 +729,11 @@
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<bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
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</register>
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<register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
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values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
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values="CCL_INSEL1"/>
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
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</register>
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<register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
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values="CCL_INSEL2"/>
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
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</register>
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<register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
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<bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
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@@ -783,14 +743,11 @@
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<bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
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</register>
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<register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
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values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
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values="CCL_INSEL1"/>
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
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</register>
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<register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
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values="CCL_INSEL2"/>
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
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</register>
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<register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
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<bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
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@@ -800,14 +757,11 @@
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<bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
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</register>
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<register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
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values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
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values="CCL_INSEL1"/>
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<bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
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<bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
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</register>
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<register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
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<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
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values="CCL_INSEL2"/>
|
||||
<bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
|
||||
</register>
|
||||
<register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
|
||||
<bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
|
||||
@@ -934,8 +888,7 @@
|
||||
<bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
|
||||
<bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
|
||||
</register>
|
||||
<register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
|
||||
size="1">
|
||||
<register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
|
||||
<bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
|
||||
</register>
|
||||
<register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
|
||||
@@ -983,8 +936,7 @@
|
||||
</module>
|
||||
<module caption="CPU" id="I2100" name="CPU">
|
||||
<register-group caption="CPU" name="CPU" size="0x10">
|
||||
<register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
|
||||
size="1">
|
||||
<register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
|
||||
<bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
|
||||
@@ -1012,12 +964,10 @@
|
||||
<bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
|
||||
<bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
|
||||
</register>
|
||||
<register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
|
||||
size="1">
|
||||
<register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
|
||||
<bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
|
||||
</register>
|
||||
<register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
|
||||
size="1">
|
||||
<register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
|
||||
<bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
|
||||
</register>
|
||||
<register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
|
||||
@@ -1051,66 +1001,51 @@
|
||||
<module caption="Event System" id="I2600" name="EVSYS">
|
||||
<register-group caption="Event System" name="EVSYS" size="0x40">
|
||||
<register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
|
||||
values="EVSYS_GENERATOR"/>
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
|
||||
</register>
|
||||
<register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
|
||||
values="EVSYS_GENERATOR"/>
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
|
||||
</register>
|
||||
<register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
|
||||
values="EVSYS_GENERATOR"/>
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
|
||||
</register>
|
||||
<register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
|
||||
values="EVSYS_GENERATOR"/>
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
|
||||
</register>
|
||||
<register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
|
||||
values="EVSYS_GENERATOR"/>
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
|
||||
</register>
|
||||
<register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
|
||||
values="EVSYS_GENERATOR"/>
|
||||
<bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW" values="EVSYS_GENERATOR"/>
|
||||
</register>
|
||||
<register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
|
||||
<bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
|
||||
values="EVSYS_STROBE0"/>
|
||||
<bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W" values="EVSYS_STROBE0"/>
|
||||
</register>
|
||||
<register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
|
||||
size="1">
|
||||
<register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
|
||||
size="1">
|
||||
<register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
|
||||
size="1">
|
||||
<register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
|
||||
size="1">
|
||||
<register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
|
||||
size="1">
|
||||
<register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
|
||||
size="1">
|
||||
<register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
|
||||
size="1">
|
||||
<register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
|
||||
size="1">
|
||||
<register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
|
||||
<bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
|
||||
</register>
|
||||
<register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
|
||||
@@ -1227,16 +1162,12 @@
|
||||
</module>
|
||||
<module caption="Fuses" id="I2600" name="FUSE">
|
||||
<register-group caption="Fuses" name="FUSE" size="0x09">
|
||||
<register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
|
||||
size="1"/>
|
||||
<register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
|
||||
<register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
|
||||
<bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
|
||||
values="FUSE_ACTIVE"/>
|
||||
<bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
|
||||
<bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
|
||||
<bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
|
||||
values="FUSE_SAMPFREQ"/>
|
||||
<bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
|
||||
values="FUSE_SLEEP"/>
|
||||
<bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
|
||||
<bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
|
||||
</register>
|
||||
<register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
|
||||
<register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
|
||||
@@ -1246,16 +1177,14 @@
|
||||
<register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
|
||||
<bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
|
||||
<bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
|
||||
<bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
|
||||
values="FUSE_RSTPINCFG"/>
|
||||
<bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
|
||||
</register>
|
||||
<register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
|
||||
<bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
|
||||
</register>
|
||||
<register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
|
||||
<bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
|
||||
<bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
|
||||
values="FUSE_WINDOW"/>
|
||||
<bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
|
||||
@@ -1283,11 +1212,9 @@
|
||||
<value caption="20 MHz" name="20MHZ" value="0x2"/>
|
||||
</value-group>
|
||||
<value-group caption="CRC Source select" name="FUSE_CRCSRC">
|
||||
<value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
|
||||
name="FLASH" value="0x0"/>
|
||||
<value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
|
||||
<value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
|
||||
<value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
|
||||
value="0x2"/>
|
||||
<value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
|
||||
<value caption="Disable CRC." name="NOCRC" value="0x3"/>
|
||||
</value-group>
|
||||
<value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
|
||||
@@ -1461,8 +1388,7 @@
|
||||
<bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
|
||||
<bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
|
||||
</register>
|
||||
<register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
|
||||
size="1">
|
||||
<register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
|
||||
<bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
|
||||
<bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
|
||||
<bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
|
||||
@@ -1479,21 +1405,15 @@
|
||||
<bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
|
||||
<bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
|
||||
</register>
|
||||
<register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
|
||||
size="1">
|
||||
<register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW" size="1">
|
||||
<bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
|
||||
<bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
|
||||
</register>
|
||||
<register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
|
||||
rw="RW" size="1">
|
||||
<bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
|
||||
values="PORTMUX_USART0"/>
|
||||
<bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
|
||||
values="PORTMUX_USART1"/>
|
||||
<bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
|
||||
values="PORTMUX_USART2"/>
|
||||
<bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
|
||||
values="PORTMUX_USART3"/>
|
||||
<register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
|
||||
<bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
|
||||
<bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
|
||||
<bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW" values="PORTMUX_USART2"/>
|
||||
<bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW" values="PORTMUX_USART3"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
|
||||
@@ -1618,12 +1538,10 @@
|
||||
<register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
|
||||
<bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
|
||||
</register>
|
||||
<register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
|
||||
size="1">
|
||||
<register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
|
||||
<bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
|
||||
</register>
|
||||
<register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
|
||||
size="1">
|
||||
<register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
|
||||
<bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
|
||||
</register>
|
||||
<register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
|
||||
@@ -1685,16 +1603,11 @@
|
||||
<register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
|
||||
<register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
|
||||
<register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
|
||||
<register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
|
||||
<register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
|
||||
<register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
|
||||
<register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
|
||||
<register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
|
||||
<register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
|
||||
<register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
|
||||
<register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
|
||||
@@ -1709,10 +1622,8 @@
|
||||
<register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
|
||||
<register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
|
||||
<register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
|
||||
<register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
|
||||
size="1"/>
|
||||
<register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
|
||||
<register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Sleep Controller" id="I2112" name="SLPCTRL">
|
||||
@@ -1808,8 +1719,7 @@
|
||||
<bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
|
||||
<bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
|
||||
<bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
|
||||
<bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
|
||||
values="TCA_SINGLE_WGMODE"/>
|
||||
<bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
|
||||
</register>
|
||||
<register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
|
||||
<bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
|
||||
@@ -1922,8 +1832,7 @@
|
||||
<register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
|
||||
<register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
|
||||
</register-group>
|
||||
<register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
|
||||
union-tag="TCA.SINGLE.CTRLD.SPLITM">
|
||||
<register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
|
||||
<register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
|
||||
<register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
|
||||
</register-group>
|
||||
@@ -1959,8 +1868,7 @@
|
||||
<value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
|
||||
<value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
|
||||
<value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
|
||||
<value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
|
||||
name="UPDOWN" value="0x03"/>
|
||||
<value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
|
||||
<value caption="System Clock" name="DIV1" value="0x00"/>
|
||||
@@ -2035,10 +1943,8 @@
|
||||
<register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
|
||||
<mode name="DEFAULT">
|
||||
<bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
|
||||
<bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
|
||||
values="TWI_DEFAULT_SDAHOLD"/>
|
||||
<bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
|
||||
values="TWI_DEFAULT_SDASETUP"/>
|
||||
<bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
|
||||
<bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
|
||||
</mode>
|
||||
</register>
|
||||
<register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
|
||||
@@ -2050,8 +1956,7 @@
|
||||
<mode name="DEFAULT">
|
||||
<bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
|
||||
<bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
|
||||
<bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
|
||||
values="TWI_DEFAULT_SDAHOLD"/>
|
||||
<bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
|
||||
</mode>
|
||||
</register>
|
||||
<register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
|
||||
@@ -2151,15 +2056,13 @@
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
|
||||
<register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
|
||||
size="0x10">
|
||||
<register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
|
||||
<register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
|
||||
<register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
|
||||
<bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
|
||||
<bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
|
||||
<bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
|
||||
<bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
|
||||
values="USART_RS485"/>
|
||||
<bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
|
||||
<bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
|
||||
<bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
|
||||
<bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
|
||||
@@ -2174,19 +2077,15 @@
|
||||
</register>
|
||||
<register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
|
||||
<mode name="MSPI">
|
||||
<bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
|
||||
values="USART_MSPI_CMODE"/>
|
||||
<bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
|
||||
<bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
|
||||
<bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
|
||||
</mode>
|
||||
<mode name="NORMAL">
|
||||
<bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
|
||||
values="USART_NORMAL_CHSIZE"/>
|
||||
<bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
|
||||
values="USART_NORMAL_CMODE"/>
|
||||
<bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
|
||||
<bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
|
||||
<bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
|
||||
<bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
|
||||
values="USART_NORMAL_SBMODE"/>
|
||||
<bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
|
||||
</mode>
|
||||
</register>
|
||||
<register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
|
||||
@@ -2209,8 +2108,7 @@
|
||||
<register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
|
||||
<bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
|
||||
</register>
|
||||
<register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
|
||||
rw="RW" size="1">
|
||||
<register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
|
||||
<bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
|
||||
</register>
|
||||
<register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
|
||||
@@ -2228,8 +2126,7 @@
|
||||
<register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
|
||||
<bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
|
||||
</register>
|
||||
<register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
|
||||
rw="RW" size="1">
|
||||
<register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
|
||||
<bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
|
||||
</register>
|
||||
</register-group>
|
||||
@@ -2361,10 +2258,8 @@
|
||||
<module caption="Voltage reference" id="I2600" name="VREF">
|
||||
<register-group caption="Voltage reference" name="VREF" size="0x2">
|
||||
<register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
|
||||
<bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
|
||||
values="VREF_AC0REFSEL"/>
|
||||
<bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
|
||||
values="VREF_ADC0REFSEL"/>
|
||||
<bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
|
||||
<bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
|
||||
</register>
|
||||
<register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
|
||||
<bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
|
||||
|
||||
Reference in New Issue
Block a user