More TDF reformatting
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@@ -1,28 +1,19 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<target-description-file>
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<variants>
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<variant ordercode="ATmega328PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
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package="TQFP32" vccmin="1.8" vccmax="5.5"/>
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<variant ordercode="ATmega328PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
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package="VQFN32" vccmin="1.8" vccmax="5.5"/>
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<variant ordercode="ATmega328PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
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package="TQFP32" vccmin="1.8" vccmax="5.5"/>
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<variant ordercode="ATmega328PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
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package="VQFN32" vccmin="1.8" vccmax="5.5"/>
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<variant ordercode="ATmega328PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
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<variant ordercode="ATmega328PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
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<variant ordercode="ATmega328PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32" package="TQFP32" vccmin="1.8" vccmax="5.5"/>
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<variant ordercode="ATmega328PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32" package="VQFN32" vccmin="1.8" vccmax="5.5"/>
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</variants>
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<device name="ATmega328PB" family="AVR8" architecture="AVR8" avr-family="megaAVR">
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<address-spaces>
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<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
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<memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
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pagesize="0x80"/>
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<memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
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pagesize="0x80"/>
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<memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
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pagesize="0x80"/>
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<memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
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pagesize="0x80"/>
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<memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
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pagesize="0x80"/>
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<memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
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<memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
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<memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
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<memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
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<memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
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</address-space>
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<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
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<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
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@@ -39,8 +30,7 @@
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<memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
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</address-space>
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<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
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<memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
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pagesize="0x04"/>
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<memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
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</address-space>
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<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
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<address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
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@@ -147,8 +137,7 @@
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</module>
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<module name="PORT">
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<instance name="PORTB" caption="I/O Port">
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PB0" index="0"/>
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<signal group="P" function="default" pad="PB1" index="1"/>
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@@ -161,8 +150,7 @@
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</signals>
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</instance>
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<instance name="PORTC" caption="I/O Port">
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<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PC0" index="0"/>
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<signal group="P" function="default" pad="PC1" index="1"/>
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@@ -174,8 +162,7 @@
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</signals>
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</instance>
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<instance name="PORTD" caption="I/O Port">
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<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PD0" index="0"/>
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<signal group="P" function="default" pad="PD1" index="1"/>
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@@ -188,8 +175,7 @@
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</signals>
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</instance>
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<instance name="PORTE" caption="I/O Port">
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<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
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<signals>
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<signal group="P" function="default" pad="PE0" index="0"/>
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<signal group="P" function="default" pad="PE1" index="1"/>
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@@ -347,8 +333,7 @@
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</module>
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</peripherals>
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<interrupts>
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<interrupt index="0" name="RESET"
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caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
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<interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
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<interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
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<interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
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<interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
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@@ -447,8 +432,7 @@
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="PP_INTERFACE">
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<property name="PpControlStack"
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value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="5"/>
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@@ -509,8 +493,7 @@
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="PP_INTERFACE_STK600">
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<property name="PpControlStack"
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value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="5"/>
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@@ -536,8 +519,7 @@
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<property name="PpProgramLock_pollTimeout" value="5"/>
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</property-group>
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<property-group name="PP_INTERFACE_AVRDRAGON">
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<property name="PpControlStack"
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value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="5"/>
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@@ -569,8 +551,7 @@
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<register-group caption="" name="FUSE">
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<register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF7">
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<bitfield caption="Clock Failure Detection" mask="0x08" name="CFD" values="ENUM_CFD"/>
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<bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
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values="ENUM_BODLEVEL"/>
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<bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
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</register>
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<register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
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<bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
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@@ -592,100 +573,53 @@
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<value caption="Enabled" name="CFD_ENABLED" value="0x01"/>
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</value-group>
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<value-group caption="" name="ENUM_SUT_CKSEL">
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
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value="0x00"/>
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
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value="0x10"/>
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<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
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value="0x20"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
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<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
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name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
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<value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
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name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
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<value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
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name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
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<value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
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name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
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name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
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name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
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name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
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name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
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name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
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<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
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name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
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<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
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name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
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name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
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name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
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name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
|
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
|
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name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
|
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<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
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name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
||||
name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
||||
name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
|
||||
name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
||||
name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
||||
name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
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name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
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name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
||||
name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
|
||||
name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
|
||||
name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
|
||||
name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
||||
name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
||||
name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
||||
name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
|
||||
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
|
||||
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
|
||||
<value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
|
||||
<value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
|
||||
<value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms" name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms" name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms" name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
|
||||
<value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms" name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
|
||||
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
|
||||
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
|
||||
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
|
||||
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BODLEVEL">
|
||||
<value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
|
||||
@@ -859,8 +793,7 @@
|
||||
<bitfield caption="TWI Prescaler" mask="0x03" name="TWPS1" values="COMM_TWI_PRESACLE"/>
|
||||
</register>
|
||||
<register caption="TWI Data register" name="TWDR1" offset="0xDB" size="1" mask="0xFF"/>
|
||||
<register caption="TWI (Slave) Address register" name="TWAR1" offset="0xDA" size="1">
|
||||
</register>
|
||||
<register caption="TWI (Slave) Address register" name="TWAR1" offset="0xDA" size="1"></register>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_TWI_PRESACLE">
|
||||
<value caption="1" name="VAL_0x00" value="0x00"/>
|
||||
@@ -873,14 +806,11 @@
|
||||
<register-group caption="" name="TC1">
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
|
||||
name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
|
||||
name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
|
||||
<bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
|
||||
<bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
|
||||
@@ -895,20 +825,16 @@
|
||||
<bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
|
||||
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
|
||||
values="CLK_SEL_3BIT_EXT"/>
|
||||
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
|
||||
@@ -917,14 +843,11 @@
|
||||
<register-group caption="" name="TC3">
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
<bitfield caption="Timer/Counter3 Output Compare Match B Interrupt Enable" mask="0x04"
|
||||
name="OCIE3B"/>
|
||||
<bitfield caption="Timer/Counter3 Output Compare Match A Interrupt Enable" mask="0x02"
|
||||
name="OCIE3A"/>
|
||||
<bitfield caption="Timer/Counter3 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE3B"/>
|
||||
<bitfield caption="Timer/Counter3 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE3A"/>
|
||||
<bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
|
||||
<bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
|
||||
<bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
|
||||
@@ -947,24 +870,18 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="" name="TC4">
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
<bitfield caption="Timer/Counter4 Output Compare Match B Interrupt Enable" mask="0x04"
|
||||
name="OCIE4B"/>
|
||||
<bitfield caption="Timer/Counter4 Output Compare Match A Interrupt Enable" mask="0x02"
|
||||
name="OCIE4A"/>
|
||||
<bitfield caption="Timer/Counter4 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE4B"/>
|
||||
<bitfield caption="Timer/Counter4 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE4A"/>
|
||||
<bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
|
||||
<bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
|
||||
<bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
|
||||
@@ -987,12 +904,9 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1018,14 +932,11 @@
|
||||
<module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
|
||||
<register-group caption="Timer/Counter, 8-bit Async" name="TC2">
|
||||
<register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
|
||||
<bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
|
||||
name="OCIE2B"/>
|
||||
<bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
|
||||
name="OCIE2A"/>
|
||||
<bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
|
||||
<bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
|
||||
<bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
|
||||
<bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
|
||||
<bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
|
||||
<bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
|
||||
@@ -1042,10 +953,8 @@
|
||||
<bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
|
||||
<register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
|
||||
<bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
|
||||
<bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
|
||||
@@ -1079,20 +988,17 @@
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
|
||||
<bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
|
||||
values="ANALOG_ADC_AUTO_TRIGGER"/>
|
||||
<bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
|
||||
</register>
|
||||
<register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
|
||||
<bitfield caption="ADC Digital Input Disable" mask="0x80" name="ADC7D"/>
|
||||
@@ -1109,8 +1015,7 @@
|
||||
<value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
|
||||
value="0x03"/>
|
||||
<value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="Input Channel Selection" name="ADC_MUX_SINGLE">
|
||||
<value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
|
||||
@@ -1148,19 +1053,15 @@
|
||||
</module>
|
||||
<module caption="" name="AC">
|
||||
<register-group caption="" name="AC">
|
||||
<register caption="Analog Comparator Control And Status Register-A" name="ACSRA" offset="0x50" size="1"
|
||||
ocd-rw="R">
|
||||
</register>
|
||||
<register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Analog Comparator Control And Status Register-A" name="ACSRA" offset="0x50" size="1" ocd-rw="R"></register>
|
||||
<register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
|
||||
<bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
|
||||
<bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
|
||||
<bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Control And Status Register-B" name="ACSRB" offset="0x4F" size="1">
|
||||
<bitfield caption="Analog Comparator Output Enable" mask="0x01" name="ACOE"/>
|
||||
@@ -1201,10 +1102,8 @@
|
||||
</module>
|
||||
<module caption="" name="TC8">
|
||||
<register-group caption="" name="TC0">
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
|
||||
<bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
|
||||
@@ -1218,14 +1117,11 @@
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
|
||||
name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
|
||||
name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
@@ -1249,10 +1145,8 @@
|
||||
<module caption="" name="EXINT">
|
||||
<register-group caption="" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
|
||||
@@ -1333,8 +1227,7 @@
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
@@ -1354,8 +1247,7 @@
|
||||
</module>
|
||||
<module caption="" name="CFD">
|
||||
<register-group caption="" name="CFD">
|
||||
<register caption="XOSC Failure Detection Control and Status Register" name="XFDCSR" offset="0x62"
|
||||
size="1">
|
||||
<register caption="XOSC Failure Detection Control and Status Register" name="XFDCSR" offset="0x62" size="1">
|
||||
<bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XFDIF"/>
|
||||
<bitfield caption="Failure Detection Interrupt Enable" mask="0x01" name="XFDIE"/>
|
||||
</register>
|
||||
@@ -1381,14 +1273,12 @@
|
||||
<bitfield caption="Power Reduction Serial Peripheral Interface 1" mask="0x04" name="PRSPI1"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter3" mask="0x01" name="PRTIM3"/>
|
||||
</register>
|
||||
<register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
|
||||
ocd-rw="R">
|
||||
<register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Calibration" mask="0xFF" name="OSCCAL"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
|
||||
values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
||||
</register>
|
||||
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
||||
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
||||
@@ -1401,8 +1291,7 @@
|
||||
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer" name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
|
||||
<bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
|
||||
<bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
|
||||
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
||||
|
||||
Reference in New Issue
Block a user