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2023-12-13 20:40:14 +00:00
parent 0ed72979b8
commit e2ed0002bd
260 changed files with 39840 additions and 110851 deletions
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297
src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM161.xml
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@@ -7,16 +7,11 @@
<device name="AT90PWM161" family="AVR8" architecture="AVR8" avr-family="megaAVR">
<address-spaces>
<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
<memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
pagesize="0x80"/>
<memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
pagesize="0x80"/>
<memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
pagesize="0x80"/>
<memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
pagesize="0x80"/>
<memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
pagesize="0x80"/>
<memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
<memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
<memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
<memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
<memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
</address-space>
<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
@@ -33,8 +28,7 @@
<memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
</address-space>
<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
<memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
pagesize="0x04"/>
<memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
</address-space>
<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
<address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
@@ -44,8 +38,7 @@
<peripherals>
<module name="PORT">
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
@@ -58,8 +51,7 @@
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
@@ -72,8 +64,7 @@
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
@@ -84,44 +75,37 @@
</module>
<module name="DAC">
<instance name="DAC" caption="Digital-to-Analog Converter">
<register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
caption="Digital-to-Analog Converter"/>
<register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
</instance>
</module>
<module name="SPI">
<instance name="SPI" caption="Serial Peripheral Interface">
<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
caption="Serial Peripheral Interface"/>
<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
</instance>
</module>
<module name="WDT">
<instance name="WDT" caption="Watchdog Timer">
<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
caption="Watchdog Timer"/>
<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
</instance>
</module>
<module name="EXINT">
<instance name="EXINT" caption="External Interrupts">
<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
caption="External Interrupts"/>
<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
</instance>
</module>
<module name="ADC">
<instance name="ADC" caption="Analog-to-Digital Converter">
<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
caption="Analog-to-Digital Converter"/>
<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
</instance>
</module>
<module name="AC">
<instance name="AC" caption="Analog Comparator">
<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
caption="Analog Comparator"/>
<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
</instance>
</module>
<module name="CPU">
<instance name="CPU" caption="CPU Registers">
<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
caption="CPU Registers"/>
<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
<parameters>
<param name="CORE_VERSION" value="V2E"/>
</parameters>
@@ -129,48 +113,40 @@
</module>
<module name="EEPROM">
<instance name="EEPROM" caption="EEPROM">
<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
caption="EEPROM"/>
<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
</instance>
</module>
<module name="PSC">
<instance name="PSC0" caption="Power Stage Controller">
<register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
caption="Power Stage Controller"/>
<register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
</instance>
<instance name="PSC2" caption="Power Stage Controller">
<register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
caption="Power Stage Controller"/>
<register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
</instance>
</module>
<module name="TC16">
<instance name="TC1" caption="Timer/Counter, 16-bit">
<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
caption="Timer/Counter, 16-bit"/>
<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
</instance>
</module>
<module name="BOOT_LOAD">
<instance name="BOOT_LOAD" caption="Bootloader">
<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
caption="Bootloader"/>
<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
</instance>
</module>
<module name="FUSE">
<instance name="FUSE" caption="Fuses">
<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
caption="Fuses"/>
<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
</instance>
</module>
<module name="LOCKBIT">
<instance name="LOCKBIT" caption="Lockbits">
<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
caption="Lockbits"/>
<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
</instance>
</module>
</peripherals>
<interrupts>
<interrupt index="0" name="RESET"
caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
<interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
<interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
<interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
<interrupt index="3" name="PSC2_EEC" caption="PSC2 End Of Enhanced Cycle"/>
@@ -247,8 +223,7 @@
<property name="IspReadOsccal_pollIndex" value="4"/>
</property-group>
<property-group name="PP_INTERFACE">
<property name="PpControlStack"
value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
<property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
<property name="PpEnterProgMode_stabDelay" value="100"/>
<property name="PpEnterProgMode_progModeDelay" value="0"/>
<property name="PpEnterProgMode_latchCycles" value="5"/>
@@ -309,8 +284,7 @@
<property name="IspReadOsccal_pollIndex" value="4"/>
</property-group>
<property-group name="PP_INTERFACE_STK600">
<property name="PpControlStack"
value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
<property name="PpControlStack" value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
<property name="PpEnterProgMode_stabDelay" value="100"/>
<property name="PpEnterProgMode_progModeDelay" value="0"/>
<property name="PpEnterProgMode_latchCycles" value="6"/>
@@ -346,8 +320,7 @@
<bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
<bitfield caption="PSC Reset Value" mask="0x10" name="PSCRV"/>
<bitfield caption="PSC2 and PSC0 input Reset Behavior" mask="0x08" name="PSCINRB"/>
<bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
values="ENUM_BODLEVEL"/>
<bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
</register>
<register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
<bitfield caption="Reset Disabled (Enable PE0 as I/O pin)" mask="0x80" name="RSTDISBL"/>
@@ -365,118 +338,62 @@
</register>
</register-group>
<value-group caption="" name="ENUM_SUT_CKSEL">
<value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]"
name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
<value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]"
name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
<value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]"
name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
<value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]"
name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
<value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]"
name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
<value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms; [CKSEL=0010 SUT=10]"
name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]"
name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]"
name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]"
name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]"
name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]"
name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]"
name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]"
name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms; [CKSEL=1001 SUT=11]"
name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]"
name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]"
name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]"
name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]"
name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1011 SUT=00]"
name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]"
name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]"
name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms; [CKSEL=1011 SUT=11]"
name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]"
name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms; [CKSEL=1100 SUT=01]"
name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]"
name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]"
name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms; [CKSEL=1101 SUT=00"
name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]"
name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]"
name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms; [CKSEL=1101 SUT=11]"
name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]"
name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1110 SUT=01]"
name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]"
name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]"
name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]"
name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]"
name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]"
name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms; [CKSEL=1111 SUT=11]"
name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
<value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS"
value="0x03"/>
<value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]"
name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
<value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS"
value="0x23"/>
<value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS"
value="0x33"/>
<value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]"
name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
<value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms; [CKSEL=0001 SUT=01]"
name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
<value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms; [CKSEL=0001 SUT=10]"
name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
<value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]"
name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
<value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]"
name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
<value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]"
name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
<value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]"
name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
<value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]"
name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
<value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]"
name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
<value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]"
name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
<value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]"
name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
<value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS"
value="0x06"/>
<value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1"
value="0x16"/>
<value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS"
value="0x26"/>
<value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
<value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
<value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
<value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
<value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
<value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms; [CKSEL=0010 SUT=10]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]" name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]" name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
<value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms; [CKSEL=1001 SUT=11]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1011 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
<value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms; [CKSEL=1011 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms; [CKSEL=1100 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms; [CKSEL=1101 SUT=00" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
<value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms; [CKSEL=1101 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1110 SUT=01]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
<value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms; [CKSEL=1111 SUT=11]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
<value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS" value="0x03"/>
<value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]" name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
<value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS" value="0x23"/>
<value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS" value="0x33"/>
<value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
<value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms; [CKSEL=0001 SUT=01]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
<value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms; [CKSEL=0001 SUT=10]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
<value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
<value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
<value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
<value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
<value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
<value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
<value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
<value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]" name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
<value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS" value="0x06"/>
<value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1" value="0x16"/>
<value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS" value="0x26"/>
</value-group>
<value-group caption="" name="ENUM_BOOTSZ">
<value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
@@ -548,8 +465,7 @@
</register>
<register caption="DAC Control Register" name="DACON" offset="0x76" size="1">
<bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
<bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
values="ANALOG_DAC_AUTO_TRIGGER"/>
<bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
<bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
<bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
</register>
@@ -599,8 +515,7 @@
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x82" size="1" ocd-rw="R">
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
values="WDOG_TIMER_PRESCALE_4BITS"/>
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
</register>
@@ -621,12 +536,9 @@
<module caption="External Interrupts" name="EXINT">
<register-group caption="External Interrupts" name="EXINT">
<register caption="External Interrupt Control Register A" name="EICRA" offset="0x89" size="1">
<bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
values="INTERRUPT_SENSE_CONTROL"/>
<bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
values="INTERRUPT_SENSE_CONTROL"/>
<bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
values="INTERRUPT_SENSE_CONTROL"/>
<bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
<bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
<bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
</register>
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x41" size="1">
<bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
@@ -661,10 +573,8 @@
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x27" size="1">
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
<bitfield caption="ADC Noise Canceller Disable" mask="0x40" name="ADNCDIS"/>
<bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10"
name="ADSSEN"/>
<bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
<bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10" name="ADSSEN"/>
<bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
</register>
<register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x77" size="1">
<bitfield caption="" mask="0x80" name="ADC7D"/>
@@ -694,8 +604,7 @@
<value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
<value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
<value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
value="0x03"/>
<value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
</value-group>
<value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
<value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
@@ -725,15 +634,13 @@
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x7D" size="1">
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
values="ANALOG_COMP_INTERRUPT"/>
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
</register>
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x7E" size="1">
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
values="ANALOG_COMP_INTERRUPT"/>
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
</register>
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x20" size="1" ocd-rw="R">
@@ -794,8 +701,7 @@
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
</register>
<register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF"
ocd-rw="R">
<register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF" ocd-rw="R">
<bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
</register>
<register caption="" name="CLKPR" offset="0x83" size="1" ocd-rw="R">
@@ -957,8 +863,7 @@
<bitfield caption="" mask="0x0C" name="PICR21"/>
<bitfield caption="" mask="0x03" name="PICR2" lsb="8"/>
</register>
<register caption="PSC 2 Input Capture Register Low" name="PICR2L" offset="0x6C" size="1" mask="0xFF"
ocd-rw="R"/>
<register caption="PSC 2 Input Capture Register Low" name="PICR2L" offset="0x6C" size="1" mask="0xFF" ocd-rw="R"/>
<register caption="PSC 2 Input B Control" name="PFRC2B" offset="0x67" size="1">
<bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
<bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
@@ -1031,8 +936,7 @@
<bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
<bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
</register>
<register caption="Analog Synchronization Delay Register" name="PASDLY2" offset="0x71" size="1"
mask="0xFF"/>
<register caption="Analog Synchronization Delay Register" name="PASDLY2" offset="0x71" size="1" mask="0xFF"/>
</register-group>
</module>
<module caption="Timer/Counter, 16-bit" name="TC16">
@@ -1041,8 +945,7 @@
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
</register>
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1"
ocd-rw="R">
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1" ocd-rw="R">
<bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
</register>
@@ -1050,12 +953,10 @@
<bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
<bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
<bitfield caption="Waveform Generation Mode" mask="0x10" name="WGM13"/>
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
values="CLK_SEL_3BIT_EXT"/>
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
</register>
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x5A" size="2" mask="0xFFFF"/>
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x8C" size="2"
mask="0xFFFF"/>
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x8C" size="2" mask="0xFFFF"/>
</register-group>
<value-group caption="" name="CLK_SEL_3BIT_EXT">
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>