Initial commit

src/Targets/Microchip/AVR/AVR8/Avr8.cpp

@@ -0,0 +1,851 @@
+#include <cstdint>
+#include <QtCore>
+#include <QJsonDocument>
+#include <cassert>
+#include <algorithm>
+#include <iterator>
+#include <bitset>
+#include <limits>
+
+#include "Avr8.hpp"
+#include "PadDescriptor.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+#include "src/Targets/TargetRegister.hpp"
+#include "src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.hpp"
+
+// Derived AVR8 targets
+#include "XMega/XMega.hpp"
+#include "Mega/Mega.hpp"
+#include "Tiny/Tiny.hpp"
+
+using namespace Bloom;
+using namespace Targets;
+using namespace Targets::Microchip::Avr;
+using namespace Avr8Bit;
+using namespace Exceptions;
+using Avr8Bit::Avr8;
+
+/**
+ * Initialises the target from config parameters extracted from user's config file.
+ *
+ * @see Application::extractConfig(); for more on config extraction.
+ *
+ * @param targetConfig
+ */
+void Avr8::preActivationConfigure(const TargetConfig& targetConfig) {
+    Target::preActivationConfigure(targetConfig);
+
+    this->avr8Interface->configure(targetConfig);
+}
+
+void Avr8::postActivationConfigure() {
+    auto targetSignature = this->getId();
+    auto partDescription = PartDescriptionFile(
+        targetSignature.toHex(),
+        (!this->name.empty()) ? std::optional(this->name) : std::nullopt
+    );
+    auto pdSignature = partDescription.getTargetSignature();
+
+    if (targetSignature != pdSignature) {
+        // This should never happen. If it does, someone has screwed up the part description mapping file.
+        throw Exception("Failed to activate target - target signature mismatch.\nThe target signature (\""
+            + targetSignature.toHex() + "\") does not match the AVR8 part description signature (\""
+            + pdSignature.toHex() + "\"). Please review your target configuration in bloom.json");
+    }
+
+    this->partDescription = partDescription;
+    this->id = partDescription.getTargetSignature();
+    this->name = partDescription.getTargetName();
+    this->family = partDescription.getFamily();
+}
+
+void Avr8::postPromotionConfigure() {
+    this->avr8Interface->setTargetParameters(this->getTargetParameters());
+    this->loadPadDescriptors();
+    this->loadTargetVariants();
+}
+
+void Avr8::loadPadDescriptors() {
+    auto& targetParameters = this->getTargetParameters();
+
+    /*
+     * Every port address we extract from the part description will be stored in portAddresses, so that
+     * we can extract the start (min) and end (max) for the target's IO port address
+     * range (TargetParameters::ioPortAddressRangeStart & TargetParameters::ioPortAddressRangeEnd)
+     */
+    std::vector<std::uint32_t> portAddresses;
+
+    auto& modules = this->partDescription->getModulesMappedByName();
+    auto portModule = (modules.contains("port")) ? std::optional(modules.find("port")->second) : std::nullopt;
+    auto& peripheralModules = this->partDescription->getPeripheralModulesMappedByName();
+
+    if (peripheralModules.contains("port")) {
+        auto portPeripheralModule = peripheralModules.find("port")->second;
+
+        for (const auto& [instanceName, instance] : portPeripheralModule.instancesMappedByName) {
+            if (instanceName.find("port") == 0) {
+                auto portPeripheralRegisterGroup = (portPeripheralModule.registerGroupsMappedByName.contains(instanceName)) ?
+                    std::optional(portPeripheralModule.registerGroupsMappedByName.find(instanceName)->second) :
+                    std::nullopt;
+
+                for (const auto& signal : instance.instanceSignals) {
+                    if (!signal.index.has_value()) {
+                        continue;
+                    }
+
+                    auto padDescriptor = PadDescriptor();
+                    padDescriptor.name = signal.padName;
+                    padDescriptor.gpioPinNumber = signal.index.value();
+
+                    if (portModule.has_value() && portModule->registerGroupsMappedByName.contains(instanceName)) {
+                        // We have register information for this port
+                        auto registerGroup = portModule->registerGroupsMappedByName.find(instanceName)->second;
+
+                        for (const auto& [registerName, portRegister] : registerGroup.registersMappedByName) {
+                            if (registerName.find("port") == 0) {
+                                // This is the data register for the port
+                                padDescriptor.gpioPortSetAddress = portRegister.offset;
+                                padDescriptor.gpioPortClearAddress = portRegister.offset;
+
+                            } else if (registerName.find("pin") == 0) {
+                                // This is the input data register for the port
+                                padDescriptor.gpioPortInputAddress = portRegister.offset;
+
+                            } else if (registerName.find("ddr") == 0) {
+                                // This is the data direction register for the port
+                                padDescriptor.ddrSetAddress = portRegister.offset;
+                                padDescriptor.ddrClearAddress = portRegister.offset;
+                            }
+                        }
+
+                    } else if (portModule.has_value() && portModule->registerGroupsMappedByName.contains("port")) {
+                        // We have generic register information for all ports on the target
+                        auto registerGroup = portModule->registerGroupsMappedByName.find("port")->second;
+
+                        for (const auto& [registerName, portRegister] : registerGroup.registersMappedByName) {
+                            if (registerName.find("outset") == 0) {
+                                // Include the port register offset
+                                padDescriptor.gpioPortSetAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.gpioPortSetAddress = padDescriptor.gpioPortSetAddress.value() + portRegister.offset;
+
+                            } else if (registerName.find("outclr") == 0) {
+                                padDescriptor.gpioPortClearAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.gpioPortClearAddress = padDescriptor.gpioPortClearAddress.value() + portRegister.offset;
+
+                            } else if (registerName.find("dirset") == 0) {
+                                padDescriptor.ddrSetAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.ddrSetAddress = padDescriptor.ddrSetAddress.value() + portRegister.offset;
+
+                            } else if (registerName.find("dirclr") == 0) {
+                                padDescriptor.ddrClearAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.ddrClearAddress = padDescriptor.ddrClearAddress.value() + portRegister.offset;
+
+                            } else if (registerName == "in") {
+                                padDescriptor.gpioPortInputAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.gpioPortInputAddress = padDescriptor.gpioPortInputAddress.value() + portRegister.offset;
+                            }
+                        }
+                    }
+
+                    if (padDescriptor.gpioPortSetAddress.has_value()) {
+                        portAddresses.push_back(padDescriptor.gpioPortSetAddress.value());
+                    }
+
+                    if (padDescriptor.gpioPortClearAddress.has_value()) {
+                        portAddresses.push_back(padDescriptor.gpioPortClearAddress.value());
+                    }
+
+                    if (padDescriptor.ddrSetAddress.has_value()) {
+                        portAddresses.push_back(padDescriptor.ddrSetAddress.value());
+                    }
+
+                    if (padDescriptor.ddrClearAddress.has_value()) {
+                        portAddresses.push_back(padDescriptor.ddrClearAddress.value());
+                    }
+
+                    this->padDescriptorsByName.insert(std::pair(padDescriptor.name, padDescriptor));
+                }
+            }
+        }
+    }
+
+    if (!portAddresses.empty()) {
+        targetParameters.ioPortAddressRangeStart = *std::min_element(portAddresses.begin(), portAddresses.end());
+        targetParameters.ioPortAddressRangeEnd = *std::max_element(portAddresses.begin(), portAddresses.end());
+    }
+}
+
+void Avr8::loadTargetVariants() {
+    auto variants = this->generateVariantsFromPartDescription();
+
+    for (auto& targetVariant : variants) {
+        for (auto& [pinNumber, pinDescriptor] : targetVariant.pinDescriptorsByNumber) {
+            if (this->padDescriptorsByName.contains(pinDescriptor.padName)) {
+                auto& pad = this->padDescriptorsByName.at(pinDescriptor.padName);
+                if (pad.gpioPortSetAddress.has_value() && pad.ddrSetAddress.has_value()) {
+                    pinDescriptor.type = TargetPinType::GPIO;
+                }
+            }
+        }
+
+        this->targetVariantsById.insert(std::pair(targetVariant.id, targetVariant));
+    }
+}
+
+TargetParameters& Avr8::getTargetParameters() {
+    if (!this->targetParameters.has_value()) {
+        assert(this->partDescription.has_value());
+        this->targetParameters = TargetParameters();
+        this->targetParameters->family = this->family;
+        auto& propertyGroups = this->partDescription->getPropertyGroupsMappedByName();
+
+        auto flashMemorySegment = this->partDescription->getFlashMemorySegment();
+        if (flashMemorySegment.has_value()) {
+            this->targetParameters->flashSize = flashMemorySegment->size;
+            this->targetParameters->flashStartAddress = flashMemorySegment->startAddress;
+
+            if (flashMemorySegment->pageSize.has_value()) {
+                this->targetParameters->flashPageSize = flashMemorySegment->pageSize.value();
+            }
+        }
+
+        auto ramMemorySegment = this->partDescription->getRamMemorySegment();
+        if (ramMemorySegment.has_value()) {
+            this->targetParameters->ramSize = ramMemorySegment->size;
+            this->targetParameters->ramStartAddress = ramMemorySegment->startAddress;
+        }
+
+        auto registerMemorySegment = this->partDescription->getRegisterMemorySegment();
+        if (registerMemorySegment.has_value()) {
+            this->targetParameters->gpRegisterSize = registerMemorySegment->size;
+            this->targetParameters->gpRegisterStartAddress = registerMemorySegment->startAddress;
+        }
+
+        auto eepromMemorySegment = this->partDescription->getEepromMemorySegment();
+        if (eepromMemorySegment.has_value()) {
+            this->targetParameters->eepromSize = eepromMemorySegment->size;
+
+            if (eepromMemorySegment->pageSize.has_value()) {
+                this->targetParameters->eepromPageSize = eepromMemorySegment->pageSize.value();
+            }
+        }
+
+        auto firstBootSectionMemorySegment = this->partDescription->getFirstBootSectionMemorySegment();
+        if (firstBootSectionMemorySegment.has_value()) {
+            this->targetParameters->bootSectionStartAddress = firstBootSectionMemorySegment->startAddress / 2;
+            this->targetParameters->bootSectionSize = firstBootSectionMemorySegment->size;
+        }
+
+        // OCD attributes can be found in property groups
+        if (propertyGroups.contains("ocd")) {
+            auto& ocdProperties = propertyGroups.at("ocd").propertiesMappedByName;
+
+            if (ocdProperties.find("ocd_revision") != ocdProperties.end()) {
+                this->targetParameters->ocdRevision = ocdProperties.find("ocd_revision")->second.value.toUShort(nullptr, 10);
+            }
+
+            if (ocdProperties.find("ocd_datareg") != ocdProperties.end()) {
+                this->targetParameters->ocdDataRegister = ocdProperties.find("ocd_datareg")->second.value.toUShort(nullptr, 16);
+            }
+        }
+
+        auto statusRegister = this->partDescription->getStatusRegister();
+        if (statusRegister.has_value()) {
+            this->targetParameters->statusRegisterStartAddress = statusRegister->offset;
+            this->targetParameters->statusRegisterSize = statusRegister->size;
+        }
+
+        auto stackPointerRegister = this->partDescription->getStackPointerRegister();
+        if (stackPointerRegister.has_value()) {
+            this->targetParameters->stackPointerRegisterStartAddress = stackPointerRegister->offset;
+            this->targetParameters->stackPointerRegisterSize = stackPointerRegister->size;
+
+        } else {
+            // Sometimes the SP register is split into two register nodes, one for low, the other for high
+            auto stackPointerLowRegister = this->partDescription->getStackPointerLowRegister();
+            auto stackPointerHighRegister = this->partDescription->getStackPointerHighRegister();
+
+            if (stackPointerLowRegister.has_value()) {
+                this->targetParameters->stackPointerRegisterStartAddress = stackPointerLowRegister->offset;
+                this->targetParameters->stackPointerRegisterSize = stackPointerLowRegister->size;
+            }
+
+            if (stackPointerHighRegister.has_value()) {
+                this->targetParameters->stackPointerRegisterSize = (this->targetParameters->stackPointerRegisterSize.has_value()) ?
+                   this->targetParameters->stackPointerRegisterSize.value() + stackPointerHighRegister->size :
+                   stackPointerHighRegister->size;
+            }
+        }
+
+        auto spmcsrRegister = this->partDescription->getSpmcsrRegister();
+        if (spmcsrRegister.has_value()) {
+            this->targetParameters->spmcsRegisterStartAddress = spmcsrRegister->offset;
+        }
+
+        auto osccalRegister = this->partDescription->getOscillatorCalibrationRegister();
+        if (osccalRegister.has_value()) {
+            this->targetParameters->osccalAddress = osccalRegister->offset;
+        }
+
+        auto eepromAddressRegister = this->partDescription->getEepromAddressRegister();
+        if (eepromAddressRegister.has_value()) {
+            this->targetParameters->eepromAddressRegisterLow = eepromAddressRegister->offset;
+            this->targetParameters->eepromAddressRegisterHigh = (eepromAddressRegister->size == 2)
+                ? eepromAddressRegister->offset + 1 : eepromAddressRegister->offset;
+        }
+
+        auto eepromDataRegister = this->partDescription->getEepromDataRegister();
+        if (eepromDataRegister.has_value()) {
+            this->targetParameters->eepromDataRegisterAddress = eepromDataRegister->offset;
+        }
+
+        auto eepromControlRegister = this->partDescription->getEepromControlRegister();
+        if (eepromControlRegister.has_value()) {
+            this->targetParameters->eepromControlRegisterAddress = eepromControlRegister->offset;
+        }
+
+        if (propertyGroups.contains("pdi_interface")) {
+            auto& pdiInterfaceProperties = propertyGroups.at("pdi_interface").propertiesMappedByName;
+
+            if (pdiInterfaceProperties.contains("app_section_offset")) {
+                this->targetParameters->appSectionPdiOffset = pdiInterfaceProperties
+                    .at("app_section_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("boot_section_offset")) {
+                this->targetParameters->bootSectionPdiOffset = pdiInterfaceProperties
+                    .at("boot_section_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("datamem_offset")) {
+                this->targetParameters->ramPdiOffset = pdiInterfaceProperties
+                    .at("datamem_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("eeprom_offset")) {
+                this->targetParameters->eepromPdiOffset = pdiInterfaceProperties
+                    .at("eeprom_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("user_signatures_offset")) {
+                this->targetParameters->userSignaturesPdiOffset = pdiInterfaceProperties
+                    .at("user_signatures_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("prod_signatures_offset")) {
+                this->targetParameters->productSignaturesPdiOffset = pdiInterfaceProperties
+                    .at("prod_signatures_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("fuse_registers_offset")) {
+                this->targetParameters->fuseRegistersPdiOffset = pdiInterfaceProperties
+                    .at("fuse_registers_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("lock_registers_offset")) {
+                this->targetParameters->lockRegistersPdiOffset = pdiInterfaceProperties
+                    .at("lock_registers_offset").value.toInt(nullptr, 16);
+            }
+        }
+    }
+
+    return this->targetParameters.value();
+}
+
+std::unique_ptr<Targets::Target> Avr8::promote() {
+    std::unique_ptr<Targets::Target> promoted = nullptr;
+
+    if (this->family.has_value()) {
+        // Promote generic AVR8 target to correct family.
+        switch (this->family.value()) {
+            case Family::XMEGA: {
+                Logger::info("AVR8 target promoted to XMega target");
+                promoted = std::make_unique<XMega>(*this);
+                break;
+            }
+            case Family::MEGA: {
+                Logger::info("AVR8 target promoted to megaAVR target");
+                promoted = std::make_unique<Mega>(*this);
+                break;
+            }
+            case Family::TINY: {
+                Logger::info("AVR8 target promoted to tinyAVR target");
+                promoted = std::make_unique<Tiny>(*this);
+                break;
+            }
+            default: {
+                break;
+            }
+        }
+    }
+
+    return promoted;
+}
+
+void Avr8::activate() {
+    if (this->getActivated()) {
+        return;
+    }
+
+    this->avr8Interface->init();
+    this->avr8Interface->activate();
+    this->activated = true;
+}
+
+void Avr8::deactivate() {
+    try {
+        this->avr8Interface->deactivate();
+        this->activated = false;
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to deactivate AVR8 target - " + exception.getMessage());
+    }
+}
+
+TargetSignature Avr8::getId() {
+    if (!this->id.has_value()) {
+        this->id = this->avr8Interface->getDeviceId();
+    }
+
+    return this->id.value();
+}
+
+std::vector<TargetVariant> Avr8::generateVariantsFromPartDescription() {
+    std::vector<TargetVariant> output;
+    auto pdVariants = this->partDescription->getVariants();
+    auto pdPinoutsByName = this->partDescription->getPinoutsMappedByName();
+    auto& modules = this->partDescription->getModulesMappedByName();
+
+    for (const auto& pdVariant : pdVariants) {
+        if (pdVariant.disabled) {
+            continue;
+        }
+
+        auto targetVariant = TargetVariant();
+        targetVariant.id = static_cast<int>(output.size());
+        targetVariant.name = pdVariant.orderCode;
+        targetVariant.packageName = pdVariant.package;
+
+        if (pdVariant.package.find("QFP") == 0 || pdVariant.package.find("TQFP") == 0) {
+            targetVariant.package = TargetPackage::QFP;
+
+        } else if (pdVariant.package.find("PDIP") == 0 || pdVariant.package.find("DIP") == 0) {
+            targetVariant.package = TargetPackage::DIP;
+
+        } else if (pdVariant.package.find("QFN") == 0 || pdVariant.package.find("VQFN") == 0) {
+            targetVariant.package = TargetPackage::QFN;
+
+        } else if (pdVariant.package.find("SOIC") == 0) {
+            targetVariant.package = TargetPackage::SOIC;
+        }
+
+        if (!pdPinoutsByName.contains(pdVariant.pinoutName)) {
+            // Missing pinouts in the part description file
+            continue;
+        }
+
+        auto pdPinout = pdPinoutsByName.find(pdVariant.pinoutName)->second;
+        for (const auto& pdPin : pdPinout.pins) {
+            auto targetPin = TargetPinDescriptor();
+            targetPin.name = pdPin.pad;
+            targetPin.padName = pdPin.pad;
+            targetPin.number = pdPin.position;
+
+            // TODO: REMOVE THIS:
+            if (pdPin.pad.find("vcc") == 0 || pdPin.pad.find("avcc") == 0 || pdPin.pad.find("aref") == 0) {
+                targetPin.type = TargetPinType::VCC;
+
+            } else if (pdPin.pad.find("gnd") == 0) {
+                targetPin.type = TargetPinType::GND;
+            }
+
+            targetVariant.pinDescriptorsByNumber.insert(std::pair(targetPin.number, targetPin));
+        }
+
+        output.push_back(targetVariant);
+    }
+
+    return output;
+}
+
+TargetDescriptor Avr8Bit::Avr8::getDescriptor() {
+    auto parameters = this->getTargetParameters();
+
+    auto descriptor = TargetDescriptor();
+    descriptor.id = this->getHumanReadableId();
+    descriptor.name = this->getName();
+    descriptor.ramSize = parameters.ramSize.value_or(0);
+
+    std::transform(
+        this->targetVariantsById.begin(),
+        this->targetVariantsById.end(),
+        std::back_inserter(descriptor.variants),
+        [](auto& variantToIdPair) {
+            return variantToIdPair.second;
+        }
+    );
+
+    return descriptor;
+}
+
+void Avr8::run() {
+    this->avr8Interface->run();
+}
+
+void Avr8::stop() {
+    this->avr8Interface->stop();
+}
+
+void Avr8::step() {
+    this->avr8Interface->step();
+}
+
+void Avr8::reset() {
+    this->avr8Interface->reset();
+}
+
+void Avr8::setBreakpoint(std::uint32_t address) {
+    this->avr8Interface->setBreakpoint(address);
+}
+
+void Avr8::removeBreakpoint(std::uint32_t address) {
+    this->avr8Interface->clearBreakpoint(address);
+}
+
+void Avr8::clearAllBreakpoints() {
+    this->avr8Interface->clearAllBreakpoints();
+}
+
+TargetRegisters Avr8::readGeneralPurposeRegisters(std::set<std::size_t> registerIds) {
+    return this->avr8Interface->readGeneralPurposeRegisters(registerIds);
+}
+
+void Avr8::writeRegisters(const TargetRegisters& registers) {
+    TargetRegisters gpRegisters;
+
+    for (const auto& targetRegister : registers) {
+        if (targetRegister.descriptor.type == TargetRegisterType::GENERAL_PURPOSE_REGISTER
+            && targetRegister.descriptor.id.has_value()) {
+            gpRegisters.push_back(targetRegister);
+
+        } else if (targetRegister.descriptor.type == TargetRegisterType::PROGRAM_COUNTER) {
+            Logger::debug("Setting PC register");
+
+            auto programCounterBytes = targetRegister.value;
+
+            if (programCounterBytes.size() < 4) {
+                // All PC register values should be at least 4 bytes in size
+                programCounterBytes.insert(programCounterBytes.begin(), 4 - programCounterBytes.size(), 0x00);
+            }
+
+            this->setProgramCounter(static_cast<std::uint32_t>(
+                programCounterBytes[0] << 24
+                | programCounterBytes[1] << 16
+                | programCounterBytes[2] << 8
+                | programCounterBytes[3]
+            ));
+
+        } else if (targetRegister.descriptor.type == TargetRegisterType::STATUS_REGISTER) {
+            Logger::error("Setting status register");
+            this->avr8Interface->setStatusRegister(targetRegister);
+
+        } else if (targetRegister.descriptor.type == TargetRegisterType::STACK_POINTER) {
+            Logger::error("Setting stack pointer register");
+            this->avr8Interface->setStackPointerRegister(targetRegister);
+        }
+    }
+
+    if (!gpRegisters.empty()) {
+        this->avr8Interface->writeGeneralPurposeRegisters(gpRegisters);
+    }
+}
+
+TargetRegisters Avr8::readRegisters(const TargetRegisterDescriptors& descriptors) {
+    TargetRegisters registers;
+    std::set<std::size_t> gpRegisterIds;
+
+    for (const auto& descriptor : descriptors) {
+        if (descriptor.type == TargetRegisterType::GENERAL_PURPOSE_REGISTER && descriptor.id.has_value()) {
+            gpRegisterIds.insert(descriptor.id.value());
+
+        } else if (descriptor.type == TargetRegisterType::PROGRAM_COUNTER) {
+            registers.push_back(this->getProgramCounterRegister());
+
+        } else if (descriptor.type == TargetRegisterType::STATUS_REGISTER) {
+            registers.push_back(this->getStatusRegister());
+
+        } else if (descriptor.type == TargetRegisterType::STACK_POINTER) {
+            registers.push_back(this->getStackPointerRegister());
+        }
+    }
+
+    if (!gpRegisterIds.empty()) {
+        auto gpRegisters = this->readGeneralPurposeRegisters(gpRegisterIds);
+        registers.insert(registers.end(), gpRegisters.begin(), gpRegisters.end());
+    }
+
+    return registers;
+}
+
+TargetMemoryBuffer Avr8::readMemory(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) {
+    return this->avr8Interface->readMemory(memoryType, startAddress, bytes);
+}
+
+void Avr8::writeMemory(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer) {
+    this->avr8Interface->writeMemory(memoryType, startAddress, buffer);
+}
+
+TargetState Avr8::getState() {
+    return this->avr8Interface->getTargetState();
+}
+
+std::uint32_t Avr8::getProgramCounter() {
+    return this->avr8Interface->getProgramCounter();
+}
+
+TargetRegister Avr8::getProgramCounterRegister() {
+    auto programCounter = this->getProgramCounter();
+
+    return TargetRegister(TargetRegisterType::PROGRAM_COUNTER, {
+        static_cast<unsigned char>(programCounter),
+        static_cast<unsigned char>(programCounter >> 8),
+        static_cast<unsigned char>(programCounter >> 16),
+        static_cast<unsigned char>(programCounter >> 24),
+    });
+}
+
+TargetRegister Avr8::getStackPointerRegister() {
+    return this->avr8Interface->getStackPointerRegister();
+}
+
+TargetRegister Avr8::getStatusRegister() {
+    return this->avr8Interface->getStatusRegister();
+}
+
+void Avr8::setProgramCounter(std::uint32_t programCounter) {
+    this->avr8Interface->setProgramCounter(programCounter);
+}
+
+std::map<int, TargetPinState> Avr8::getPinStates(int variantId) {
+    if (!this->targetVariantsById.contains(variantId)) {
+        throw Exception("Invalid target variant ID");
+    }
+
+    std::map<int, TargetPinState> output;
+    auto& variant = this->targetVariantsById.at(variantId);
+
+    /*
+     * To prevent the number of memory reads we perform here, we cache the data and map it by start address.
+     *
+     * This way, we only perform 3 memory reads for a target variant with 3 ports - one per port (instead of one
+     * per pin).
+     *
+     * We may be able to make this more efficient by combining reads for ports with aligned memory addresses. This will
+     * be considered when the need for it becomes apparent.
+     */
+    std::map<std::uint16_t, TargetMemoryBuffer> cachedMemoryByStartAddress;
+    auto readMemoryBitset = [this, &cachedMemoryByStartAddress](std::uint16_t startAddress) {
+        if (!cachedMemoryByStartAddress.contains(startAddress)) {
+            cachedMemoryByStartAddress.insert(
+                std::pair(
+                    startAddress,
+                    this->readMemory(TargetMemoryType::RAM, startAddress, 1)
+                )
+            );
+        }
+
+        return std::bitset<std::numeric_limits<unsigned char>::digits>(
+            cachedMemoryByStartAddress.at(startAddress).at(0)
+        );
+    };
+
+    for (const auto& [pinNumber, pinDescriptor] : variant.pinDescriptorsByNumber) {
+        if (this->padDescriptorsByName.contains(pinDescriptor.padName)) {
+            auto& pad = this->padDescriptorsByName.at(pinDescriptor.padName);
+
+            if (!pad.gpioPinNumber.has_value()) {
+                continue;
+            }
+
+            auto pinState = TargetPinState();
+
+            if (pad.ddrSetAddress.has_value()) {
+                auto dataDirectionRegisterValue = readMemoryBitset(pad.ddrSetAddress.value());
+                pinState.ioDirection = dataDirectionRegisterValue.test(pad.gpioPinNumber.value()) ?
+                                       TargetPinState::IoDirection::OUTPUT : TargetPinState::IoDirection::INPUT;
+
+                if (pinState.ioDirection == TargetPinState::IoDirection::OUTPUT
+                    && pad.gpioPortSetAddress.has_value()
+                ) {
+                    auto portRegisterValue = readMemoryBitset(pad.gpioPortSetAddress.value());
+                    pinState.ioState = portRegisterValue.test(pad.gpioPinNumber.value()) ?
+                        TargetPinState::IoState::HIGH : TargetPinState::IoState::LOW;
+
+                } else if (pinState.ioDirection == TargetPinState::IoDirection::INPUT
+                    && pad.gpioPortInputAddress.has_value()
+                    ) {
+                    auto portInputRegisterValue = readMemoryBitset(pad.gpioPortInputAddress.value());
+                    auto h = portInputRegisterValue.to_string();
+                    pinState.ioState = portInputRegisterValue.test(pad.gpioPinNumber.value()) ?
+                        TargetPinState::IoState::HIGH : TargetPinState::IoState::LOW;
+                }
+            }
+
+            output.insert(std::pair(pinNumber, pinState));
+        }
+    }
+
+    return output;
+}
+
+void Avr8::setPinState(int variantId, const TargetPinDescriptor& pinDescriptor, const TargetPinState& state) {
+    if (!this->targetVariantsById.contains(variantId)) {
+        throw Exception("Invalid target variant ID");
+    }
+
+    if (!this->padDescriptorsByName.contains(pinDescriptor.padName)) {
+        throw Exception("Unknown pad");
+    }
+
+    if (!state.ioDirection.has_value()) {
+        throw Exception("Missing IO direction state");
+    }
+
+    auto& variant = this->targetVariantsById.at(variantId);
+    auto& padDescriptor = this->padDescriptorsByName.at(pinDescriptor.padName);
+    auto ioState = state.ioState;
+
+    if (state.ioDirection == TargetPinState::IoDirection::INPUT) {
+        // When setting the direction to INPUT, we must always set the IO pinstate to LOW
+        ioState = TargetPinState::IoState::LOW;
+    }
+
+    if (!padDescriptor.ddrSetAddress.has_value()
+        || !padDescriptor.gpioPortSetAddress.has_value()
+        || !padDescriptor.gpioPinNumber.has_value()
+    ) {
+        throw Exception("Inadequate pad descriptor");
+    }
+
+    auto pinNumber = padDescriptor.gpioPinNumber.value();
+    auto ddrSetAddress = padDescriptor.ddrSetAddress.value();
+    auto ddrSetValue = this->readMemory(TargetMemoryType::RAM, ddrSetAddress, 1);
+
+    if (ddrSetValue.empty()) {
+        throw Exception("Failed to read DDSR value");
+    }
+
+    auto ddrSetBitset = std::bitset<std::numeric_limits<unsigned char>::digits>(ddrSetValue.front());
+    if (ddrSetBitset.test(pinNumber) != (state.ioDirection == TargetPinState::IoDirection::OUTPUT)) {
+        // DDR needs updating
+        ddrSetBitset.set(pinNumber, (state.ioDirection == TargetPinState::IoDirection::OUTPUT));
+
+        this->writeMemory(
+            TargetMemoryType::RAM,
+            ddrSetAddress,
+            {static_cast<unsigned char>(ddrSetBitset.to_ulong())}
+        );
+    }
+
+    if (padDescriptor.ddrClearAddress.has_value() && padDescriptor.ddrClearAddress != ddrSetAddress) {
+        // We also need to ensure the data direction clear register value is correct
+        auto ddrClearAddress = padDescriptor.ddrClearAddress.value();
+        auto ddrClearValue = this->readMemory(TargetMemoryType::RAM, ddrClearAddress, 1);
+
+        if (ddrClearValue.empty()) {
+            throw Exception("Failed to read DDCR value");
+        }
+
+        auto ddrClearBitset = std::bitset<std::numeric_limits<unsigned char>::digits>(ddrClearValue.front());
+        if (ddrClearBitset.test(pinNumber) == (state.ioDirection == TargetPinState::IoDirection::INPUT)) {
+            ddrClearBitset.set(pinNumber, (state.ioDirection == TargetPinState::IoDirection::INPUT));
+
+            this->writeMemory(
+                TargetMemoryType::RAM,
+                ddrClearAddress,
+                {static_cast<unsigned char>(ddrClearBitset.to_ulong())}
+            );
+        }
+    }
+
+    if (ioState.has_value()) {
+        auto portSetAddress = padDescriptor.gpioPortSetAddress.value();
+        auto portSetRegisterValue = this->readMemory(TargetMemoryType::RAM, portSetAddress, 1);
+
+        if (portSetRegisterValue.empty()) {
+            throw Exception("Failed to read PORT register value");
+        }
+
+        auto portSetBitset = std::bitset<std::numeric_limits<unsigned char>::digits>(portSetRegisterValue.front());
+        if (portSetBitset.test(pinNumber) != (ioState == TargetPinState::IoState::HIGH)) {
+            // PORT set register needs updating
+            portSetBitset.set(pinNumber, (ioState == TargetPinState::IoState::HIGH));
+
+            this->writeMemory(
+                TargetMemoryType::RAM,
+                portSetAddress,
+                {static_cast<unsigned char>(portSetBitset.to_ulong())}
+            );
+        }
+
+        if (padDescriptor.gpioPortClearAddress.has_value() && padDescriptor.gpioPortClearAddress != portSetAddress) {
+            // We also need to ensure the PORT clear register value is correct
+            auto portClearAddress = padDescriptor.gpioPortClearAddress.value();
+            auto portClearRegisterValue = this->readMemory(TargetMemoryType::RAM, portClearAddress, 1);
+
+            if (portClearRegisterValue.empty()) {
+                throw Exception("Failed to read PORT (OUTSET) register value");
+            }
+
+            auto portClearBitset = std::bitset<std::numeric_limits<unsigned char>::digits>(portClearRegisterValue.front());
+            if (portClearBitset.test(pinNumber) == (ioState == TargetPinState::IoState::LOW)) {
+                // PORT clear register needs updating
+                portClearBitset.set(pinNumber, (ioState == TargetPinState::IoState::LOW));
+
+                this->writeMemory(
+                    TargetMemoryType::RAM,
+                    portClearAddress,
+                    {static_cast<unsigned char>(portClearBitset.to_ulong())}
+                );
+            }
+        }
+    }
+}
+
+bool Avr8::willMemoryWriteAffectIoPorts(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) {
+    auto& targetParameters = this->getTargetParameters();
+
+    /*
+     * We're making an assumption here; that all IO port addresses for all AVR8 targets are aligned. I have no idea
+     * how well this will hold.
+     *
+     * If they're not aligned, this function may report false positives.
+     */
+    if (targetParameters.ioPortAddressRangeStart.has_value() && targetParameters.ioPortAddressRangeEnd.has_value()) {
+        auto endAddress = startAddress + (bytes - 1);
+        return (
+            startAddress >= targetParameters.ioPortAddressRangeStart
+            && startAddress <= targetParameters.ioPortAddressRangeEnd
+        ) || (
+            endAddress >= targetParameters.ioPortAddressRangeStart
+            && endAddress <= targetParameters.ioPortAddressRangeEnd
+        ) || (
+            startAddress <= targetParameters.ioPortAddressRangeStart
+            && endAddress >= targetParameters.ioPortAddressRangeStart
+        );
+    }
+
+    return false;
+}
+

src/Targets/Microchip/AVR/AVR8/Avr8.hpp

@@ -0,0 +1,132 @@
+#pragma once
+
+#include <cstdint>
+#include <queue>
+
+#include "src/DebugToolDrivers/TargetInterfaces/Microchip/AVR/AVR8/Avr8Interface.hpp"
+#include "src/Targets/Microchip/AVR/Target.hpp"
+#include "src/Targets/TargetRegister.hpp"
+#include "src/DebugToolDrivers/DebugTool.hpp"
+#include "src/ApplicationConfig.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+#include "TargetParameters.hpp"
+#include "Family.hpp"
+#include "PadDescriptor.hpp"
+
+// Part Description
+#include "PartDescription/PartDescriptionFile.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    using namespace Exceptions;
+    using namespace PartDescription;
+
+    using PartDescription::PartDescriptionFile;
+    using DebugToolDrivers::TargetInterfaces::Microchip::Avr::Avr8::Avr8Interface;
+    using Targets::TargetRegisterMap;
+
+    class Avr8: public Target
+    {
+    protected:
+        Avr8Interface* avr8Interface;
+        std::string name = "";
+        std::optional<Family> family;
+        std::optional<PartDescriptionFile> partDescription = std::nullopt;
+        std::optional<TargetParameters> targetParameters = std::nullopt;
+        std::map<std::string, PadDescriptor> padDescriptorsByName;
+        std::map<int, TargetVariant> targetVariantsById;
+
+        virtual TargetParameters& getTargetParameters();
+
+        virtual void loadPadDescriptors();
+        virtual void loadTargetVariants();
+
+    public:
+        explicit Avr8() = default;
+        Avr8(const std::string& name): name(name) {};
+
+        [[nodiscard]] std::string getName() const override {
+            return this->name;
+        }
+
+        /**
+         * Checks if DebugTool is compatible with AVR8 targets.
+         *
+         * @param debugTool
+         * @return
+         */
+        bool isDebugToolSupported(DebugTool* debugTool) override {
+            return debugTool->getAvr8Interface() != nullptr;
+        }
+
+        void setDebugTool(DebugTool* debugTool) override {
+            this->avr8Interface = debugTool->getAvr8Interface();
+        };
+
+        void preActivationConfigure(const TargetConfig& targetConfig) override;
+        void postActivationConfigure() override;
+
+        virtual void postPromotionConfigure() override;
+
+        void activate() override;
+
+        void deactivate() override;
+
+        TargetSignature getId() override;
+
+        void run() override;
+
+        void stop() override;
+
+        void step() override;
+
+        void reset() override;
+
+        void setBreakpoint(std::uint32_t address) override;
+        void removeBreakpoint(std::uint32_t address) override;
+        void clearAllBreakpoints() override;
+
+        /**
+         * AVR8 targets are promotable. See promote() method for more.
+         *
+         * @return
+         */
+        bool supportsPromotion() override {
+            return true;
+        }
+
+        virtual std::vector<TargetVariant> generateVariantsFromPartDescription();
+
+        virtual TargetDescriptor getDescriptor() override;
+
+        virtual std::unique_ptr<Targets::Target> promote() override;
+
+        virtual TargetRegisters readGeneralPurposeRegisters(std::set<std::size_t> registerIds) override;
+        virtual void writeRegisters(const TargetRegisters& registers) override;
+        virtual TargetRegisters readRegisters(const TargetRegisterDescriptors& descriptors) override;
+        virtual TargetMemoryBuffer readMemory(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) override;
+        virtual void writeMemory(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer) override;
+
+        virtual TargetState getState() override;
+
+        virtual std::uint32_t getProgramCounter() override;
+        virtual TargetRegister getProgramCounterRegister() override;
+        virtual TargetRegister getStackPointerRegister() override;
+        virtual TargetRegister getStatusRegister() override;
+        virtual void setProgramCounter(std::uint32_t programCounter) override;
+
+        virtual std::map<int, TargetPinState> getPinStates(int variantId) override;
+        virtual void setPinState(
+            int variantId,
+            const TargetPinDescriptor& pinDescriptor,
+            const TargetPinState& state
+        ) override;
+
+        virtual bool willMemoryWriteAffectIoPorts(
+            TargetMemoryType memoryType,
+            std::uint32_t startAddress,
+            std::uint32_t bytes
+        ) override;
+    };
+}

src/Targets/Microchip/AVR/AVR8/Family.hpp

@@ -0,0 +1,11 @@
+#pragma once
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    enum class Family: int
+    {
+        MEGA,
+        XMEGA,
+        TINY,
+    };
+}

src/Targets/Microchip/AVR/AVR8/Mega/Mega.cpp

@@ -0,0 +1,7 @@
+#include <QtCore>
+#include <QJsonDocument>
+
+#include "Mega.hpp"
+#include "src/Logger/Logger.hpp"
+
+using namespace Bloom::Targets::Microchip::Avr::Avr8Bit;

src/Targets/Microchip/AVR/AVR8/Mega/Mega.hpp

@@ -0,0 +1,18 @@
+#pragma once
+
+#include "src/Targets/Microchip/AVR/AVR8/Avr8.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    class Mega: public Avr8
+    {
+    protected:
+
+    public:
+        Mega(const Avr8& avr8) : Avr8(avr8) {};
+
+        virtual bool supportsPromotion() override {
+            return false;
+        }
+    };
+}

src/Targets/Microchip/AVR/AVR8/PadDescriptor.hpp

@@ -0,0 +1,42 @@
+#pragma once
+
+#include <string>
+#include <cstdint>
+#include <optional>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    /**
+     * Pin configurations for AVR8 targets may vary across target variants. This is why we must differentiate a pin
+     * to a pad. A pin is mapped to a pad, but this mapping is variant specific. For example, pin 4 on
+     * the ATmega328P-PN (DIP variant) is mapped to a GPIO pad (PORTD/PIN2), but on the QFN variant (ATmega328P-MN),
+     * pin 4 is mapped to a GND pad.
+     *
+     * PadDescriptor describes a single pad on an AVR8 target. On target configuration, PadDescriptors are
+     * generated from the AVR8 part description file. These descriptors are mapped to pad names.
+     * See Avr8::loadPadDescriptors() for more.
+     */
+    struct PadDescriptor
+    {
+        std::string name;
+
+        std::optional<std::uint8_t> gpioPinNumber;
+
+        /**
+         * AVR8 GPIO pins can be manipulated by writing to an IO register address. The gpioPortAddress member
+         * holds this address.
+         */
+        std::optional<std::uint16_t> gpioPortSetAddress;
+        std::optional<std::uint16_t> gpioPortInputAddress;
+
+        std::optional<std::uint16_t> gpioPortClearAddress;
+
+        /**
+         * The data direction of a pin is configured via a data direction register (DDR), which, like the
+         * gpioPortSetAddress, is an IO register.
+         */
+        std::optional<std::uint16_t> ddrSetAddress;
+
+        std::optional<std::uint16_t> ddrClearAddress;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/AddressSpace.hpp

@@ -0,0 +1,16 @@
+#pragma once
+
+#include <cstdint>
+#include "MemorySegment.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct AddressSpace {
+        std::string id;
+        std::string name;
+        std::uint16_t startAddress;
+        std::uint16_t size;
+        bool littleEndian = true;
+        std::map<MemorySegmentType, std::map<std::string, MemorySegment>> memorySegmentsByTypeAndName;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/MemorySegment.hpp

@@ -0,0 +1,45 @@
+#pragma once
+
+#include <cstdint>
+#include <QDomElement>
+
+#include "src/Helpers/BiMap.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    enum MemorySegmentType {
+        REGISTERS,
+        IO,
+        EEPROM,
+        RAM,
+        FLASH,
+        SIGNATURES,
+        FUSES,
+        LOCKBITS,
+        OSCCAL,
+    };
+
+    struct MemorySegment {
+        std::string name;
+        MemorySegmentType type;
+        std::uint32_t startAddress;
+        std::uint32_t size;
+        std::optional<std::uint16_t> pageSize;
+
+        /**
+         * Mapping of all known memory segment types by their name. Any memory segments belonging to a type
+         * not defined in here should be ignored.
+         */
+        static const inline BiMap<std::string, MemorySegmentType> typesMappedByName = {
+            {"regs", MemorySegmentType::REGISTERS},
+            {"io", MemorySegmentType::IO},
+            {"eeprom", MemorySegmentType::EEPROM},
+            {"ram", MemorySegmentType::RAM},
+            {"flash", MemorySegmentType::FLASH},
+            {"signatures", MemorySegmentType::SIGNATURES},
+            {"fuses", MemorySegmentType::FUSES},
+            {"lockbits", MemorySegmentType::LOCKBITS},
+            {"osccal", MemorySegmentType::OSCCAL},
+        };
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/Module.hpp

@@ -0,0 +1,13 @@
+#pragma once
+
+#include "ModuleInstance.hpp"
+#include "RegisterGroup.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Module {
+        std::string name;
+        std::map<std::string, ModuleInstance> instancesMappedByName;
+        std::map<std::string, RegisterGroup> registerGroupsMappedByName;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/ModuleInstance.hpp

@@ -0,0 +1,16 @@
+#pragma once
+
+#include <map>
+#include <vector>
+
+#include "RegisterGroup.hpp"
+#include "Signal.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct ModuleInstance {
+        std::string name;
+        std::map<std::string, RegisterGroup> registerGroupsMappedByName;
+        std::vector<Signal> instanceSignals;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.cpp

@@ -0,0 +1,862 @@
+#include "PartDescriptionFile.hpp"
+#include "src/Targets/Microchip/AVR/Exceptions/PartDescriptionParsingFailureException.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Application.hpp"
+
+using namespace Bloom::Targets::Microchip::Avr::Avr8Bit;
+using namespace Bloom::Exceptions;
+
+// TODO: Move this into a resolvePartDescriptionFile() method.
+PartDescriptionFile::PartDescriptionFile(const std::string& targetSignatureHex, std::optional<std::string> targetName) {
+    auto mapping = this->getPartDescriptionMapping();
+    auto qTargetSignatureHex = QString::fromStdString(targetSignatureHex);
+
+    if (mapping.contains(qTargetSignatureHex)) {
+        // We have a match for the target signature.
+        auto descriptionFilesJsonArray = mapping.find(qTargetSignatureHex).value().toArray();
+        auto descriptionFiles = std::vector<QJsonValue>();
+        std::copy_if(
+            descriptionFilesJsonArray.begin(),
+            descriptionFilesJsonArray.end(),
+            std::back_inserter(descriptionFiles),
+            [&targetName] (const QJsonValue& value) {
+                auto pdTargetName = value.toObject().find("targetName")->toString().toLower().toStdString();
+                return !targetName.has_value() || (targetName.has_value() && targetName.value() == pdTargetName);
+            }
+        );
+
+        if (targetName.has_value() && descriptionFiles.empty()) {
+            throw Exception("Failed to resolve target description file for target \"" + targetName.value()
+                + "\" - target signature \"" + targetSignatureHex + "\" does not belong to target with name \"" +
+                targetName.value() + "\". Please review your bloom.json configuration.");
+        }
+
+        if (descriptionFiles.size() == 1) {
+            // Attempt to load the XML part description file
+            auto descriptionFilePath = QString::fromStdString(Application::getApplicationDirPath()) + "/"
+                + descriptionFiles.front().toObject().find("targetDescriptionFilePath")->toString();
+
+            Logger::debug("Loading AVR8 part description file: " + descriptionFilePath.toStdString());
+            this->init(descriptionFilePath);
+
+        } else if (descriptionFiles.size() > 1) {
+            /*
+             * There are numerous part description files mapped to this target signature. There's really not
+             * much we can do at this point, so we'll just instruct the user to use a more specific target name.
+             */
+            QStringList targetNames;
+            std::transform(
+                descriptionFiles.begin(),
+                descriptionFiles.end(),
+                std::back_inserter(targetNames),
+                [](const QJsonValue& descriptionFile) {
+                    return QString("\"" + descriptionFile.toObject().find("targetName")->toString().toLower() + "\"");
+                }
+            );
+
+            throw Exception("Failed to resolve part description file for target \""
+                + targetSignatureHex + "\" - ambiguous signature.\nThe signature is mapped to numerous targets: "
+                + targetNames.join(", ").toStdString() + ".\n\nPlease update the target name in your Bloom " +
+                "configuration to one of the above."
+            );
+
+        } else {
+            throw Exception("Failed to resolve part description file for target \""
+                + targetSignatureHex + "\" - invalid AVR8 target description mapping."
+            );
+        }
+
+    } else {
+        throw Exception("Failed to resolve part description file for target \""
+            + targetSignatureHex + "\" - unknown target signature.");
+    }
+}
+
+void PartDescriptionFile::init(const QString& xmlFilePath) {
+    auto file = QFile(xmlFilePath);
+    if (!file.exists()) {
+        // This can happen if someone has been messing with the Resources directory.
+        throw Exception("Failed to load part description file - file not found");
+    }
+
+    file.open(QIODevice::ReadOnly);
+    auto xml = QDomDocument();
+    xml.setContent(file.readAll());
+    this->init(xml);
+}
+
+void PartDescriptionFile::init(const QDomDocument& xml) {
+    this->xml = xml;
+
+    auto device = xml.elementsByTagName("devices").item(0)
+        .toElement().elementsByTagName("device").item(0).toElement();
+
+    if (!device.isElement()) {
+        throw PartDescriptionParsingFailureException("Device element not found.");
+    }
+
+    this->deviceElement = device;
+}
+
+QJsonObject PartDescriptionFile::getPartDescriptionMapping() {
+    auto mappingFile = QFile(
+        QString::fromStdString(Application::getResourcesDirPath() + "/TargetPartDescriptions/AVR/Mapping.json")
+    );
+
+    if (!mappingFile.exists()) {
+        throw TargetControllerStartupFailure("Failed to load AVR part description mapping - mapping file not found");
+    }
+
+    mappingFile.open(QIODevice::ReadOnly);
+    return QJsonDocument::fromJson(mappingFile.readAll()).object();
+}
+
+std::string PartDescriptionFile::getTargetName() const {
+    return this->deviceElement.attributes().namedItem("name").nodeValue().toStdString();
+}
+
+TargetSignature PartDescriptionFile::getTargetSignature() const {
+    auto propertyGroups = this->getPropertyGroupsMappedByName();
+    auto signaturePropertyGroupIt = propertyGroups.find("signatures");
+
+    if (signaturePropertyGroupIt == propertyGroups.end()) {
+        throw PartDescriptionParsingFailureException("Signature property group not found");
+    }
+
+    auto signaturePropertyGroup = signaturePropertyGroupIt->second;
+    auto& signatureProperties = signaturePropertyGroup.propertiesMappedByName;
+    std::optional<unsigned char> signatureByteZero;
+    std::optional<unsigned char> signatureByteOne;
+    std::optional<unsigned char> signatureByteTwo;
+
+    if (signatureProperties.find("signature0") != signatureProperties.end()) {
+        signatureByteZero = static_cast<unsigned char>(
+            signatureProperties.find("signature0")->second.value.toShort(nullptr, 16)
+        );
+    }
+
+    if (signatureProperties.find("signature1") != signatureProperties.end()) {
+        signatureByteOne = static_cast<unsigned char>(
+            signatureProperties.find("signature1")->second.value.toShort(nullptr, 16)
+        );
+    }
+
+    if (signatureProperties.find("signature2") != signatureProperties.end()) {
+        signatureByteTwo = static_cast<unsigned char>(
+            signatureProperties.find("signature2")->second.value.toShort(nullptr, 16)
+        );
+    }
+
+    if (signatureByteZero.has_value() && signatureByteOne.has_value() && signatureByteTwo.has_value()) {
+        return TargetSignature(signatureByteZero.value(), signatureByteOne.value(), signatureByteTwo.value());
+    }
+
+    throw PartDescriptionParsingFailureException("Failed to extract target signature from AVR8 part description.");
+}
+
+AddressSpace PartDescriptionFile::generateAddressSpaceFromXml(const QDomElement& xmlElement) const {
+    if (
+        !xmlElement.hasAttribute("id")
+            || !xmlElement.hasAttribute("name")
+            || !xmlElement.hasAttribute("size")
+            || !xmlElement.hasAttribute("start")
+    ) {
+        throw Exception("Address space element missing id/name/size/start attributes.");
+    }
+
+    auto addressSpace = AddressSpace();
+    addressSpace.name = xmlElement.attribute("name").toStdString();
+    addressSpace.id = xmlElement.attribute("id").toStdString();
+
+    bool conversionStatus;
+    addressSpace.startAddress = xmlElement.attribute("start").toUShort(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to convert start address hex value to integer.");
+    }
+
+    addressSpace.size = xmlElement.attribute("size").toUShort(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to convert size hex value to integer.");
+    }
+
+    if (xmlElement.hasAttribute("endianness")) {
+        addressSpace.littleEndian = (xmlElement.attribute("endianness").toStdString() == "little");
+    }
+
+    // Create memory segment objects and add them to the mapping.
+    auto segmentNodes = xmlElement.elementsByTagName("memory-segment");
+    auto& memorySegments = addressSpace.memorySegmentsByTypeAndName;
+    for (int segmentIndex = 0; segmentIndex < segmentNodes.count(); segmentIndex++) {
+        try {
+            auto segment = this->generateMemorySegmentFromXml(segmentNodes.item(segmentIndex).toElement());
+
+            if (memorySegments.find(segment.type) == memorySegments.end()) {
+                memorySegments.insert(
+                    std::pair<
+                        MemorySegmentType,
+                        decltype(addressSpace.memorySegmentsByTypeAndName)::mapped_type
+                    >(segment.type, {}));
+            }
+
+            memorySegments.find(segment.type)->second.insert(std::pair(segment.name, segment));
+
+        } catch (const Exception& exception) {
+            Logger::debug("Failed to extract memory segment from part description element - "
+                + exception.getMessage());
+        }
+    }
+
+    return addressSpace;
+}
+
+MemorySegment PartDescriptionFile::generateMemorySegmentFromXml(const QDomElement& xmlElement) const {
+    if (
+        !xmlElement.hasAttribute("type")
+            || !xmlElement.hasAttribute("name")
+            || !xmlElement.hasAttribute("size")
+            || !xmlElement.hasAttribute("start")
+    ) {
+        throw Exception("Missing type/name/size/start attributes");
+    }
+
+    auto segment = MemorySegment();
+    auto typeName = xmlElement.attribute("type").toStdString();
+    auto type = MemorySegment::typesMappedByName.valueAt(typeName);
+
+    if (!type.has_value()) {
+        throw Exception("Unknown type: \"" + typeName + "\"");
+    }
+
+    segment.type = type.value();
+    segment.name = xmlElement.attribute("name").toLower().toStdString();
+
+    bool conversionStatus;
+    segment.startAddress = xmlElement.attribute("start").toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        // Failed to convert startAddress hex value as string to uint16_t
+        throw Exception("Invalid start address");
+    }
+
+    segment.size = xmlElement.attribute("size").toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        // Failed to convert size hex value as string to uint16_t
+        throw Exception("Invalid size");
+    }
+
+    if (xmlElement.hasAttribute("pagesize")) {
+        // The page size can be in single byte hexadecimal form ("0x01"), or it can be in plain integer form!
+        auto pageSize = xmlElement.attribute("pagesize");
+        segment.pageSize = pageSize.toUInt(&conversionStatus, pageSize.contains("0x") ? 16 : 10);
+
+        if (!conversionStatus) {
+            // Failed to convert size hex value as string to uint16_t
+            throw Exception("Invalid size");
+        }
+    }
+
+    return segment;
+}
+
+RegisterGroup PartDescriptionFile::generateRegisterGroupFromXml(const QDomElement& xmlElement) const {
+    if (!xmlElement.hasAttribute("name")) {
+        throw Exception("Missing register group name attribute");
+    }
+
+    auto registerGroup = RegisterGroup();
+    registerGroup.name = xmlElement.attribute("name").toLower().toStdString();
+
+    if (registerGroup.name.empty()) {
+        throw Exception("Empty register group name");
+    }
+
+    if (xmlElement.hasAttribute("offset")) {
+        registerGroup.offset = xmlElement.attribute("offset").toInt(nullptr, 16);
+    }
+
+    auto& registers = registerGroup.registersMappedByName;
+    auto registerNodes = xmlElement.elementsByTagName("register");
+    for (int registerIndex = 0; registerIndex < registerNodes.count(); registerIndex++) {
+        try {
+            auto reg = this->generateRegisterFromXml(registerNodes.item(registerIndex).toElement());
+            registers.insert(std::pair(reg.name, reg));
+
+        } catch (const Exception& exception) {
+            Logger::debug("Failed to extract register from register group part description element - "
+                              + exception.getMessage());
+        }
+    }
+
+    return registerGroup;
+}
+
+Register PartDescriptionFile::generateRegisterFromXml(const QDomElement& xmlElement) const {
+    if (
+        !xmlElement.hasAttribute("name")
+        || !xmlElement.hasAttribute("offset")
+        || !xmlElement.hasAttribute("size")
+    ) {
+        throw Exception("Missing register name/offset/size attribute");
+    }
+
+    auto reg = Register();
+    reg.name = xmlElement.attribute("name").toLower().toStdString();
+
+    if (reg.name.empty()) {
+        throw Exception("Empty register name");
+    }
+
+    bool conversionStatus;
+    reg.size = xmlElement.attribute("size").toUShort(nullptr, 10);
+    reg.offset = xmlElement.attribute("offset").toUShort(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        // Failed to convert offset hex value as string to uint16_t
+        throw Exception("Invalid register offset");
+    }
+
+    return reg;
+}
+
+Family PartDescriptionFile::getFamily() const {
+    static auto familyNameToEnums = this->getFamilyNameToEnumMapping();
+    auto familyName = this->deviceElement.attributes().namedItem("family").nodeValue().toLower().toStdString();
+
+    if (familyName.empty()) {
+        throw Exception("Could not find target family name in part description file.");
+    }
+
+    if (familyNameToEnums.find(familyName) == familyNameToEnums.end()) {
+        throw Exception("Unknown family name in part description file.");
+    }
+
+    return familyNameToEnums.find(familyName)->second;
+}
+
+const std::map<std::string, PropertyGroup>& PartDescriptionFile::getPropertyGroupsMappedByName() const {
+    if (!this->cachedPropertyGroupMapping.has_value()) {
+        if (!this->deviceElement.isElement()) {
+            throw PartDescriptionParsingFailureException("Device element not found.");
+        }
+
+        std::map<std::string, PropertyGroup> output;
+        auto propertyGroupNodes = this->deviceElement.elementsByTagName("property-groups").item(0).toElement()
+            .elementsByTagName("property-group");
+
+        for (int propertyGroupIndex = 0; propertyGroupIndex < propertyGroupNodes.count(); propertyGroupIndex++) {
+            auto propertyGroupElement = propertyGroupNodes.item(propertyGroupIndex).toElement();
+            auto propertyGroupName = propertyGroupElement.attributes().namedItem("name").nodeValue().toLower().toStdString();
+            PropertyGroup propertyGroup;
+            propertyGroup.name = propertyGroupName;
+
+            auto propertyNodes = propertyGroupElement.elementsByTagName("property");
+            for (int propertyIndex = 0; propertyIndex < propertyNodes.count(); propertyIndex++) {
+                auto propertyElement = propertyNodes.item(propertyIndex).toElement();
+                auto propertyName = propertyElement.attributes().namedItem("name").nodeValue();
+
+                Property property;
+                property.name = propertyName.toStdString();
+                property.value = propertyElement.attributes().namedItem("value").nodeValue();
+
+                propertyGroup.propertiesMappedByName.insert(std::pair(propertyName.toLower().toStdString(), property));
+            }
+
+            output.insert(std::pair(propertyGroup.name, propertyGroup));
+        }
+
+        this->cachedPropertyGroupMapping.emplace(output);
+    }
+
+    return this->cachedPropertyGroupMapping.value();
+}
+
+const std::map<std::string, Module>& PartDescriptionFile::getModulesMappedByName() const {
+    if (!this->cachedModuleByNameMapping.has_value()) {
+        std::map<std::string, Module> output;
+        auto moduleNodes = this->xml.elementsByTagName("modules").item(0).toElement()
+            .elementsByTagName("module");
+
+        for (int moduleIndex = 0; moduleIndex < moduleNodes.count(); moduleIndex++) {
+            auto moduleElement = moduleNodes.item(moduleIndex).toElement();
+            auto moduleName = moduleElement.attributes().namedItem("name").nodeValue().toLower().toStdString();
+            Module module;
+            module.name = moduleName;
+
+            auto registerGroupNodes = moduleElement.elementsByTagName("register-group");
+            for (int registerGroupIndex = 0; registerGroupIndex < registerGroupNodes.count(); registerGroupIndex++) {
+                auto registerGroup = this->generateRegisterGroupFromXml(registerGroupNodes.item(registerGroupIndex).toElement());
+
+                module.registerGroupsMappedByName.insert(std::pair(registerGroup.name, registerGroup));
+            }
+
+            output.insert(std::pair(module.name, module));
+        }
+
+        this->cachedModuleByNameMapping.emplace(output);
+    }
+
+    return this->cachedModuleByNameMapping.value();
+}
+
+const std::map<std::string, Module>& PartDescriptionFile::getPeripheralModulesMappedByName() const {
+    if (!this->cachedPeripheralModuleByNameMapping.has_value()) {
+        std::map<std::string, Module> output;
+        auto moduleNodes = this->deviceElement.elementsByTagName("peripherals").item(0).toElement()
+            .elementsByTagName("module");
+
+        for (int moduleIndex = 0; moduleIndex < moduleNodes.count(); moduleIndex++) {
+            auto moduleElement = moduleNodes.item(moduleIndex).toElement();
+            auto moduleName = moduleElement.attributes().namedItem("name").nodeValue().toLower().toStdString();
+            Module module;
+            module.name = moduleName;
+
+            auto registerGroupNodes = moduleElement.elementsByTagName("register-group");
+            for (int registerGroupIndex = 0; registerGroupIndex < registerGroupNodes.count(); registerGroupIndex++) {
+                auto registerGroup = this->generateRegisterGroupFromXml(registerGroupNodes.item(registerGroupIndex).toElement());
+
+                module.registerGroupsMappedByName.insert(std::pair(registerGroup.name, registerGroup));
+            }
+
+            auto instanceNodes = moduleElement.elementsByTagName("instance");
+            for (int instanceIndex = 0; instanceIndex < instanceNodes.count(); instanceIndex++) {
+                auto instanceXml = instanceNodes.item(instanceIndex).toElement();
+                auto instance = ModuleInstance();
+                instance.name = instanceXml.attribute("name").toLower().toStdString();
+
+                auto registerGroupNodes = instanceXml.elementsByTagName("register-group");
+                for (int registerGroupIndex = 0; registerGroupIndex < registerGroupNodes.count(); registerGroupIndex++) {
+                    auto registerGroup = this->generateRegisterGroupFromXml(registerGroupNodes.item(registerGroupIndex).toElement());
+
+                    instance.registerGroupsMappedByName.insert(std::pair(registerGroup.name, registerGroup));
+                }
+
+                auto signalNodes = instanceXml.elementsByTagName("signals").item(0).toElement()
+                    .elementsByTagName("signal");
+                for (int signalIndex = 0; signalIndex < signalNodes.count(); signalIndex++) {
+                    auto signalXml = signalNodes.item(signalIndex).toElement();
+                    auto signal = Signal();
+
+                    if (!signalXml.hasAttribute("pad")) {
+                        continue;
+                    }
+
+                    signal.padName = signalXml.attribute("pad").toLower().toStdString();
+                    signal.function = signalXml.attribute("function").toStdString();
+                    signal.group = signalXml.attribute("group").toStdString();
+                    auto indexAttribute = signalXml.attribute("index");
+                    bool indexValid = false;
+                    auto indexValue = indexAttribute.toInt(&indexValid, 10);
+
+                    if (!indexAttribute.isEmpty() && indexValid) {
+                        signal.index = indexValue;
+                    }
+
+                    instance.instanceSignals.emplace_back(signal);
+                }
+
+                module.instancesMappedByName.insert(std::pair(instance.name, instance));
+            }
+
+            output.insert(std::pair(module.name, module));
+        }
+
+        this->cachedPeripheralModuleByNameMapping.emplace(output);
+    }
+
+    return this->cachedPeripheralModuleByNameMapping.value();
+}
+
+std::map<std::string, AddressSpace> PartDescriptionFile::getAddressSpacesMappedById() const {
+    std::map<std::string, AddressSpace> output;
+
+    auto addressSpaceNodes = this->deviceElement.elementsByTagName("address-spaces").item(0).toElement()
+        .elementsByTagName("address-space");
+
+    for (int addressSpaceIndex = 0; addressSpaceIndex < addressSpaceNodes.count(); addressSpaceIndex++) {
+        try {
+            auto addressSpace = this->generateAddressSpaceFromXml(addressSpaceNodes.item(addressSpaceIndex).toElement());
+            output.insert(std::pair(addressSpace.id, addressSpace));
+
+        } catch (const Exception& exception) {
+            Logger::debug("Failed to extract address space from part description element - " + exception.getMessage());
+        }
+    }
+
+    return output;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getFlashMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+    auto programAddressSpaceIt = addressMapping.find("prog");
+
+    // Flash memory attributes are typically found in memory segments within the program address space.
+    if (programAddressSpaceIt != addressMapping.end()) {
+        auto& programAddressSpace = programAddressSpaceIt->second;
+        auto& programMemorySegments = programAddressSpace.memorySegmentsByTypeAndName;
+
+        if (programMemorySegments.find(MemorySegmentType::FLASH) != programMemorySegments.end()) {
+            auto& flashMemorySegments = programMemorySegments.find(MemorySegmentType::FLASH)->second;
+
+            /*
+             * Some part descriptions describe the flash memory segments in the "APP_SECTION" segment, whereas
+             * others use the "FLASH" segment.
+             */
+            auto flashSegmentIt = flashMemorySegments.find("app_section") != flashMemorySegments.end() ?
+                                  flashMemorySegments.find("app_section") : flashMemorySegments.find("flash");
+
+            if (flashSegmentIt != flashMemorySegments.end()) {
+                return flashSegmentIt->second;
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getRamMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+
+    // Internal RAM  &register attributes are usually found in the data address space
+    auto dataAddressSpaceIt = addressMapping.find("data");
+
+    if (dataAddressSpaceIt != addressMapping.end()) {
+        auto& dataAddressSpace = dataAddressSpaceIt->second;
+        auto& dataMemorySegments = dataAddressSpace.memorySegmentsByTypeAndName;
+
+        if (dataMemorySegments.find(MemorySegmentType::RAM) != dataMemorySegments.end()) {
+            auto& ramMemorySegments = dataMemorySegments.find(MemorySegmentType::RAM)->second;
+            auto ramMemorySegmentIt = ramMemorySegments.begin();
+
+            if (ramMemorySegmentIt != ramMemorySegments.end()) {
+                return ramMemorySegmentIt->second;
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getRegisterMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+
+    // Internal RAM  &register attributes are usually found in the data address space
+    auto dataAddressSpaceIt = addressMapping.find("data");
+
+    if (dataAddressSpaceIt != addressMapping.end()) {
+        auto& dataAddressSpace = dataAddressSpaceIt->second;
+        auto& dataMemorySegments = dataAddressSpace.memorySegmentsByTypeAndName;
+
+        if (dataMemorySegments.find(MemorySegmentType::REGISTERS) != dataMemorySegments.end()) {
+            auto& registerMemorySegments = dataMemorySegments.find(MemorySegmentType::REGISTERS)->second;
+            auto registerMemorySegmentIt = registerMemorySegments.begin();
+
+            if (registerMemorySegmentIt != registerMemorySegments.end()) {
+                return registerMemorySegmentIt->second;
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getEepromMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+
+    // EEPROM attributes are usually found in the data address space
+    auto eepromAddressSpaceIt = addressMapping.find("eeprom");
+
+    if (eepromAddressSpaceIt != addressMapping.end()) {
+        auto& eepromAddressSpace = eepromAddressSpaceIt->second;
+        auto& eepromAddressSpaceSegments = eepromAddressSpace.memorySegmentsByTypeAndName;
+
+        if (eepromAddressSpaceSegments.find(MemorySegmentType::EEPROM) != eepromAddressSpaceSegments.end()) {
+            auto& eepromMemorySegments = eepromAddressSpaceSegments.find(MemorySegmentType::EEPROM)->second;
+            auto eepromMemorySegmentIt = eepromMemorySegments.begin();
+
+            if (eepromMemorySegmentIt != eepromMemorySegments.end()) {
+                return eepromMemorySegmentIt->second;
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getFirstBootSectionMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+    auto programAddressSpaceIt = addressMapping.find("prog");
+
+    if (programAddressSpaceIt != addressMapping.end()) {
+        auto& programAddressSpace = programAddressSpaceIt->second;
+        auto& programMemorySegments = programAddressSpace.memorySegmentsByTypeAndName;
+
+        if (programMemorySegments.find(MemorySegmentType::FLASH) != programMemorySegments.end()) {
+            auto& flashMemorySegments = programMemorySegments.find(MemorySegmentType::FLASH)->second;
+            auto firstBootSectionSegmentIt = flashMemorySegments.find("boot_section_1");
+
+            if (flashMemorySegments.contains("boot_section_1")) {
+                return flashMemorySegments.at("boot_section_1");
+
+            } else if (flashMemorySegments.contains("boot_section")) {
+                return flashMemorySegments.at("boot_section");
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<RegisterGroup> PartDescriptionFile::getCpuRegisterGroup() const {
+    auto& modulesByName = this->getModulesMappedByName();
+
+    if (modulesByName.find("cpu") != modulesByName.end()) {
+        auto cpuModule = modulesByName.find("cpu")->second;
+        auto cpuRegisterGroupIt = cpuModule.registerGroupsMappedByName.find("cpu");
+
+        if (cpuRegisterGroupIt != cpuModule.registerGroupsMappedByName.end()) {
+            return cpuRegisterGroupIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<RegisterGroup> PartDescriptionFile::getEepromRegisterGroup() const {
+    auto& modulesByName = this->getModulesMappedByName();
+
+    if (modulesByName.find("eeprom") != modulesByName.end()) {
+        auto eepromModule = modulesByName.find("eeprom")->second;
+        auto eepromRegisterGroupIt = eepromModule.registerGroupsMappedByName.find("eeprom");
+
+        if (eepromRegisterGroupIt != eepromModule.registerGroupsMappedByName.end()) {
+            return eepromRegisterGroupIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getStatusRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto statusRegisterIt = cpuRegisterGroup->registersMappedByName.find("sreg");
+
+        if (statusRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return statusRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getStackPointerRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto stackPointerRegisterIt = cpuRegisterGroup->registersMappedByName.find("sp");
+
+        if (stackPointerRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return stackPointerRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getStackPointerHighRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto stackPointerHighRegisterIt = cpuRegisterGroup->registersMappedByName.find("sph");
+
+        if (stackPointerHighRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return stackPointerHighRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getStackPointerLowRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto stackPointerLowRegisterIt = cpuRegisterGroup->registersMappedByName.find("spl");
+
+        if (stackPointerLowRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return stackPointerLowRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getOscillatorCalibrationRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto osccalRegisterIt = cpuRegisterGroup->registersMappedByName.find("osccal");
+
+        if (osccalRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return osccalRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getSpmcsrRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto spmcsrRegisterIt = cpuRegisterGroup->registersMappedByName.find("spmcsr");
+
+        if (spmcsrRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return spmcsrRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getEepromAddressRegister() const {
+    auto eepromRegisterGroup = this->getEepromRegisterGroup();
+
+    if (eepromRegisterGroup.has_value()) {
+        auto eepromAddressRegisterIt = eepromRegisterGroup->registersMappedByName.find("eear");
+
+        if (eepromAddressRegisterIt != eepromRegisterGroup->registersMappedByName.end()) {
+            return eepromAddressRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getEepromDataRegister() const {
+    auto eepromRegisterGroup = this->getEepromRegisterGroup();
+
+    if (eepromRegisterGroup.has_value()) {
+        auto eepromDataRegisterIt = eepromRegisterGroup->registersMappedByName.find("eedr");
+
+        if (eepromDataRegisterIt != eepromRegisterGroup->registersMappedByName.end()) {
+            return eepromDataRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getEepromControlRegister() const {
+    auto eepromRegisterGroup = this->getEepromRegisterGroup();
+
+    if (eepromRegisterGroup.has_value()) {
+        auto eepromControlRegisterIt = eepromRegisterGroup->registersMappedByName.find("eecr");
+
+        if (eepromControlRegisterIt != eepromRegisterGroup->registersMappedByName.end()) {
+            return eepromControlRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::vector<Variant> PartDescriptionFile::getVariants() const {
+    std::vector<Variant> output;
+
+    auto variantNodes = this->xml.elementsByTagName("variants").item(0).toElement()
+        .elementsByTagName("variant");
+
+    for (int variantIndex = 0; variantIndex < variantNodes.count(); variantIndex++) {
+        try {
+            auto variantXml = variantNodes.item(variantIndex).toElement();
+
+            if (!variantXml.hasAttribute("ordercode")) {
+                throw Exception("Missing ordercode attribute");
+            }
+
+            if (!variantXml.hasAttribute("package")) {
+                throw Exception("Missing package attribute");
+            }
+
+            if (!variantXml.hasAttribute("pinout")) {
+                throw Exception("Missing pinout attribute");
+            }
+
+            auto variant = Variant();
+            variant.orderCode = variantXml.attribute("ordercode").toStdString();
+            variant.pinoutName = variantXml.attribute("pinout").toLower().toStdString();
+            variant.package = variantXml.attribute("package").toUpper().toStdString();
+
+            if (variantXml.hasAttribute("disabled")) {
+                variant.disabled = (variantXml.attribute("disabled") == "1");
+            }
+
+            output.push_back(variant);
+
+        } catch (const Exception& exception) {
+            Logger::debug("Failed to extract variant from part description element - " + exception.getMessage());
+        }
+    }
+
+    return output;
+}
+
+const std::map<std::string, Pinout>& PartDescriptionFile::getPinoutsMappedByName() const {
+    if (!this->cachedPinoutByNameMapping.has_value()) {
+        this->cachedPinoutByNameMapping = std::map<std::string, Pinout>();
+
+        auto pinoutNodes = this->xml.elementsByTagName("pinouts").item(0).toElement()
+            .elementsByTagName("pinout");
+
+        for (int pinoutIndex = 0; pinoutIndex < pinoutNodes.count(); pinoutIndex++) {
+            try {
+                auto pinoutXml = pinoutNodes.item(pinoutIndex).toElement();
+
+                if (!pinoutXml.hasAttribute("name")) {
+                    throw Exception("Missing name attribute");
+                }
+
+                auto pinout = Pinout();
+                pinout.name = pinoutXml.attribute("name").toLower().toStdString();
+
+                auto pinNodes = pinoutXml.elementsByTagName("pin");
+
+                for (int pinIndex = 0; pinIndex < pinNodes.count(); pinIndex++) {
+                    auto pinXml = pinNodes.item(pinIndex).toElement();
+
+                    if (!pinXml.hasAttribute("position")) {
+                        throw Exception("Missing position attribute on pin element " + std::to_string(pinIndex));
+                    }
+
+                    if (!pinXml.hasAttribute("pad")) {
+                        throw Exception("Missing pad attribute on pin element " + std::to_string(pinIndex));
+                    }
+
+                    auto pin = Pin();
+                    bool positionConversionSucceeded = true;
+                    pin.position = pinXml.attribute("position").toInt(&positionConversionSucceeded, 10);
+                    pin.pad = pinXml.attribute("pad").toLower().toStdString();
+
+                    if (!positionConversionSucceeded) {
+                        throw Exception("Failed to convert position attribute value to integer on pin element "
+                                            + std::to_string(pinIndex));
+                    }
+
+                    pinout.pins.push_back(pin);
+                }
+
+                this->cachedPinoutByNameMapping->insert(std::pair(pinout.name, pinout));
+
+            } catch (const Exception& exception) {
+                Logger::debug("Failed to extract pinout from part description element - " + exception.getMessage());
+            }
+        }
+    }
+
+    return this->cachedPinoutByNameMapping.value();
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.hpp

@@ -0,0 +1,174 @@
+#pragma once
+
+#include <QFile>
+#include <QDomDocument>
+
+#include "AddressSpace.hpp"
+#include "MemorySegment.hpp"
+#include "PropertyGroup.hpp"
+#include "RegisterGroup.hpp"
+#include "Module.hpp"
+#include "Variant.hpp"
+#include "Pinout.hpp"
+#include "src/Targets/Microchip/AVR/TargetSignature.hpp"
+#include "src/Targets/Microchip/AVR/AVR8/Family.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    using Avr::TargetSignature;
+
+    /**
+     * An AVR8 part description file is an XML file that describes a particular AVR8 target.
+     * All supported AVR8 targets come with a part description file.
+     *
+     * Part description files are part of the Bloom codebase.
+     * For AVR8 part description files, see directory "src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8".
+     *
+     * During the build process, all part description files are copied to the distribution directory, ready
+     * to be shipped with the Bloom binary. Alongside these files is a JSON file, containing a mapping of AVR8 target
+     * signatures to part description file paths. Bloom uses this mapping to find a particular part description
+     * file, given a target signature. See directory "bin/Distribution/Resources/TargetPartDescriptions".
+     * The copying of the part description files, and the generation of the JSON mapping, is done by a PHP script:
+     * "build/scripts/CopyAvrPartFilesAndCreateMapping.php". This script is invoked via a custom command, at build time.
+     *
+     * All processing of AVR8 part description files is done in this class.
+     */
+    class PartDescriptionFile
+    {
+    private:
+        QDomDocument xml;
+        QDomElement deviceElement;
+        mutable std::optional<std::map<std::string, PropertyGroup>> cachedPropertyGroupMapping;
+        mutable std::optional<std::map<std::string, Module>> cachedModuleByNameMapping;
+        mutable std::optional<std::map<std::string, Module>> cachedPeripheralModuleByNameMapping;
+        mutable std::optional<std::map<std::string, Pinout>> cachedPinoutByNameMapping;
+
+        /**`
+         * AVR8 part description files include the target family name. This method returns a mapping of part
+         * description family name strings to Family enum values.
+         *
+         * TODO: the difference in AVR8 family variations, like "tinyAVR" and "tinyAVR 2" may require attention.
+         *
+         * @return
+         */
+        static inline auto getFamilyNameToEnumMapping() {
+            // All keys should be lower case.
+            return std::map<std::string, Family> {
+                {"megaavr", Family::MEGA},
+                {"avr mega", Family::MEGA},
+                {"avr xmega", Family::XMEGA},
+                {"avr tiny", Family::TINY},
+                {"tinyavr", Family::TINY},
+                {"tinyavr 2", Family::TINY},
+            };
+        };
+
+        void init(const QDomDocument& xml);
+        void init(const QString& xmlFilePath);
+
+        /**
+         * Constructs an AddressSpace object from an XML element (in the form of a QDomElement), taken from
+         * an AVR part description file.
+         *
+         * @param xmlElement
+         * @return
+         */
+        AddressSpace generateAddressSpaceFromXml(const QDomElement& xmlElement) const;
+
+        /**
+         * Constructs a MemorySegment from an XML element (in the form of a QDomElement) taken from
+         * an AVR part description file.
+         *
+         * @param xmlElement
+         * @return
+         */
+        MemorySegment generateMemorySegmentFromXml(const QDomElement& xmlElement) const;
+        RegisterGroup generateRegisterGroupFromXml(const QDomElement& xmlElement) const;
+
+        Register generateRegisterFromXml(const QDomElement& xmlElement) const;
+
+    public:
+        /**
+         * Will construct a PartDescription instance from the XML of a part description file, the path to which
+         * is given via xmlFilePath.
+         *
+         * @param xmlFilePath
+         */
+        PartDescriptionFile(const QString& xmlFilePath) {
+            this->init(xmlFilePath);
+        }
+
+        /**
+         * Will construct a PartDescription instance from pre-loaded XML.
+         *
+         * @param xml
+         */
+        PartDescriptionFile(const QDomDocument& xml) {
+            this->init(xml);
+        }
+
+        /**
+         * Will resolve the part description file using the part description JSON mapping and a given target signature.
+         *
+         * @param targetSignatureHex
+         * @param targetName
+         */
+        PartDescriptionFile(const std::string& targetSignatureHex, std::optional<std::string> targetName);
+
+        /**
+         * Loads the AVR8 target description JSON mapping file.
+         *
+         * @return
+         */
+        static QJsonObject getPartDescriptionMapping();
+
+        std::string getTargetName() const;
+
+
+        /**
+         * Extracts the AVR8 target signature from the part description XML.
+         *
+         * @return
+         */
+        TargetSignature getTargetSignature() const;
+
+        /**
+         * Extracts all address spaces for the AVR8 target, from the part description XML.
+         *
+         * Will return a mapping of the extracted address spaces, mapped by id.
+         *
+         * @return
+         */
+        std::map<std::string, AddressSpace> getAddressSpacesMappedById() const;
+
+        /**
+         * Extracts the AVR8 target family from the part description XML.
+         *
+         * @return
+         */
+        Family getFamily() const;
+
+        const std::map<std::string, PropertyGroup>& getPropertyGroupsMappedByName() const;
+        const std::map<std::string, Module>& getModulesMappedByName() const;
+        const std::map<std::string, Module>& getPeripheralModulesMappedByName() const;
+
+        std::optional<MemorySegment> getFlashMemorySegment() const;
+        std::optional<MemorySegment> getRamMemorySegment() const;
+        std::optional<MemorySegment> getRegisterMemorySegment() const;
+        std::optional<MemorySegment> getEepromMemorySegment() const;
+        std::optional<MemorySegment> getFirstBootSectionMemorySegment() const;
+        std::optional<RegisterGroup> getCpuRegisterGroup() const;
+        std::optional<RegisterGroup> getEepromRegisterGroup() const;
+        std::optional<Register> getStatusRegister() const;
+        std::optional<Register> getStackPointerRegister() const;
+        std::optional<Register> getStackPointerHighRegister() const;
+        std::optional<Register> getStackPointerLowRegister() const;
+        std::optional<Register> getOscillatorCalibrationRegister() const;
+        std::optional<Register> getSpmcsrRegister() const;
+        std::optional<Register> getEepromAddressRegister() const;
+        std::optional<Register> getEepromDataRegister() const;
+        std::optional<Register> getEepromControlRegister() const;
+        std::vector<Variant> getVariants() const;
+        const std::map<std::string, Pinout>& getPinoutsMappedByName() const;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/Pinout.hpp

@@ -0,0 +1,17 @@
+#pragma once
+
+#include <string>
+#include <vector>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Pin {
+        std::string pad;
+        int position;
+    };
+
+    struct Pinout {
+        std::string name;
+        std::vector<Pin> pins;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/PropertyGroup.hpp

@@ -0,0 +1,19 @@
+#pragma once
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Property {
+        std::string name;
+
+        /*
+         * We use QString here as we're dealing with arbitrary values and QString provides many helpful
+         * functions to make this easier.
+         */
+        QString value;
+    };
+
+    struct PropertyGroup {
+        std::string name;
+        std::map<std::string, Property> propertiesMappedByName;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/RegisterGroup.hpp

@@ -0,0 +1,20 @@
+#pragma once
+
+#include <cstdint>
+#include <map>
+#include <optional>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Register {
+        std::string name;
+        std::uint16_t offset;
+        std::uint16_t size;
+    };
+
+    struct RegisterGroup {
+        std::string name;
+        std::optional<std::uint16_t> offset;
+        std::map<std::string, Register> registersMappedByName;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/Signal.hpp

@@ -0,0 +1,14 @@
+#pragma once
+
+#include <string>
+#include <optional>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Signal {
+        std::string padName;
+        std::string function;
+        std::optional<int> index;
+        std::string group;
+    };
+}

src/Targets/Microchip/AVR/AVR8/PartDescription/Variant.hpp

@@ -0,0 +1,13 @@
+#pragma once
+
+#include <string>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Variant {
+        std::string orderCode;
+        std::string pinoutName;
+        std::string package;
+        bool disabled = false;
+    };
+}

src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp

@@ -0,0 +1,54 @@
+#pragma once
+
+#include <cstdint>
+#include <optional>
+
+#include "src/Targets/Microchip/AVR/AVR8/PartDescription/AddressSpace.hpp"
+#include "../TargetSignature.hpp"
+#include "Family.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    struct TargetParameters
+    {
+        std::optional<Family> family;
+
+        std::optional<std::uint32_t> bootSectionStartAddress;
+        std::optional<std::uint32_t> gpRegisterStartAddress;
+        std::optional<std::uint32_t> gpRegisterSize;
+        std::optional<std::uint16_t> flashPageSize;
+        std::optional<std::uint32_t> flashSize;
+        std::optional<std::uint32_t> flashStartAddress;
+        std::optional<std::uint16_t> ramStartAddress;
+        std::optional<std::uint32_t> ramSize;
+        std::optional<std::uint16_t> eepromSize;
+        std::optional<std::uint16_t> eepromPageSize;
+        std::optional<std::uint8_t> eepromAddressRegisterHigh;
+        std::optional<std::uint8_t> eepromAddressRegisterLow;
+        std::optional<std::uint8_t> eepromDataRegisterAddress;
+        std::optional<std::uint8_t> eepromControlRegisterAddress;
+        std::optional<std::uint8_t> ocdRevision;
+        std::optional<std::uint8_t> ocdDataRegister;
+        std::optional<std::uint16_t> statusRegisterStartAddress;
+        std::optional<std::uint16_t> statusRegisterSize;
+        std::optional<std::uint16_t> stackPointerRegisterStartAddress;
+        std::optional<std::uint16_t> stackPointerRegisterSize;
+        std::optional<std::uint8_t> spmcsRegisterStartAddress;
+        std::optional<std::uint8_t> osccalAddress;
+
+        // XMega/PDI specific target params
+        std::optional<std::uint32_t> appSectionPdiOffset;
+        std::optional<std::uint16_t> bootSectionSize;
+        std::optional<std::uint32_t> bootSectionPdiOffset;
+        std::optional<std::uint32_t> eepromPdiOffset;
+        std::optional<std::uint32_t> ramPdiOffset;
+        std::optional<std::uint32_t> fuseRegistersPdiOffset;
+        std::optional<std::uint32_t> lockRegistersPdiOffset;
+        std::optional<std::uint32_t> userSignaturesPdiOffset;
+        std::optional<std::uint32_t> productSignaturesPdiOffset;
+
+
+        std::optional<std::uint32_t> ioPortAddressRangeStart;
+        std::optional<std::uint32_t> ioPortAddressRangeEnd;
+    };
+}

src/Targets/Microchip/AVR/AVR8/Tiny/Tiny.hpp

@@ -0,0 +1,16 @@
+#pragma once
+
+#include "src/Targets/Microchip/AVR/AVR8/Avr8.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    class Tiny: public Avr8
+    {
+    public:
+        Tiny(const Avr8& avr8) : Avr8(avr8) {};
+
+        virtual bool supportsPromotion() override {
+            return false;
+        }
+    };
+}

src/Targets/Microchip/AVR/AVR8/XMega/XMega.hpp

@@ -0,0 +1,16 @@
+#pragma once
+
+#include "src/Targets/Microchip/AVR/AVR8/Avr8.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    class XMega: public Avr8
+    {
+    public:
+        XMega(const Avr8& avr8) : Avr8(avr8) {};
+
+        virtual bool supportsPromotion() override {
+            return false;
+        }
+    };
+}

src/Targets/Microchip/AVR/Exceptions/PartDescriptionParsingFailureException.hpp

@@ -0,0 +1,20 @@
+#pragma once
+
+#include "src/Exceptions/TargetControllerStartupFailure.hpp"
+
+namespace Bloom::Exceptions
+{
+    class PartDescriptionParsingFailureException: public Exception
+    {
+    public:
+        explicit PartDescriptionParsingFailureException(const std::string& message)
+        : Exception(message) {
+            this->message = "Failed to parse AVR part description file - " + message;
+        }
+
+        explicit PartDescriptionParsingFailureException(const char* message)
+        : Exception(message) {
+            this->message = "Failed to parse AVR part description file - " + std::string(message);
+        }
+    };
+}

src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVA.xml

@@ -0,0 +1,685 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16HVA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="7" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="8" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="9" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="10" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="11" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="12" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="13" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="14" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="15" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="16" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="17" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="18" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="19" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVSP" type="hvsp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940C"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0c"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="HVSP_INTERFACE">
+                    <property name="HvspControlStack"
+                              value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                    <property name="HvspEnterProgMode_stabDelay" value="100"/>
+                    <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+                    <property name="HvspEnterProgMode_synchCycles" value="6"/>
+                    <property name="HvspEnterProgMode_latchCycles" value="1"/>
+                    <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+                    <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+                    <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+                    <property name="HvspEnterProgMode_resetDelay2" value="70"/>
+                    <property name="HvspLeaveProgMode_stabDelay" value="101"/>
+                    <property name="HvspLeaveProgMode_resetDelay" value="26"/>
+                    <property name="HvspChipErase_pollTimeout" value="40"/>
+                    <property name="HvspChipErase_eraseTime" value="1"/>
+                    <property name="HvspProgramFlash_mode" value="0x0D"/>
+                    <property name="HvspProgramFlash_blockSize" value="256"/>
+                    <property name="HvspProgramFlash_pollTimeout" value="6"/>
+                    <property name="HvspReadFlash_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_mode" value="0x05"/>
+                    <property name="HvspProgramEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+                    <property name="HvspReadEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramFuse_pollTimeout" value="25"/>
+                    <property name="HvspProgramLock_pollTimeout" value="25"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDF">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Debug Wire enable" mask="0x10" name="DWEN"/>
+                    <bitfield caption="Self Programming enable" mask="0x08" name="SELFPRGEN"/>
+                    <bitfield caption="Select start-up time" mask="0x07" name="SUT" values="ENUM_SUT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 6 CK/14 CK + 4 ms" name="6CK_14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 6 CK/14 CK + 8 ms" name="6CK_14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 6 CK/14 CK + 16 ms" name="6CK_14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 6 CK/14 CK + 32 ms" name="6CK_14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 6 CK/14 CK + 64 ms" name="6CK_14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 6 CK/14 CK + 128 ms" name="6CK_14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 6 CK/14 CK + 256 ms" name="6CK_14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 6 CK/14 CK + 512 ms" name="6CK_14CK_512MS" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register  Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Bandgap calibration bits" mask="0xFF" name="BGCR"/>
+                </register>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield
+                            caption="Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared before enabling CC-ADC or V-ADC, and must remain unset while either ADC is enabled."
+                            mask="0x80" name="BGD"/>
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x01"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x01" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x03"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x03"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x03" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Data Register, Port B" name="PORTB" offset="0x25" size="1" mask="0x0F"/>
+                <register caption="Data Direction Register, Port B" name="DDRB" offset="0x24" size="1" mask="0x0F"/>
+                <register caption="Input Pins, Port B" name="PINB" offset="0x23" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+                    <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
+                          mask="0xFF"/>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group name="CPU_SLEEP_MODE_3BITS" caption="">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F"/>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F"/>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F"/>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF"/>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="1" mask="0xFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00"/>
+                </register>
+                <register caption="Timer Counter 0  Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
+                <register caption="Output compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Output compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Output Compare Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Output Compare Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter Interrupt Flag Register" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Output Compare Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Output Compare Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE4" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE5" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE8" size="2" mask="0xFFFF"/>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="CC-ADC Regular Current" name="CADRC" offset="0xE6" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>

src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVB.xml

@@ -0,0 +1,982 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16HVB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="CELL_BALANCING">
+                    <instance name="CELL_BALANCING" caption="Cell Balancing">
+                        <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
+                                        address-space="data" caption="Cell Balancing"/>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="CHARGER_DETECT">
+                    <instance name="CHARGER_DETECT" caption="Charger Detect">
+                        <register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
+                                        address-space="data" caption="Charger Detect"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
+                <interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
+                <interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
+                <interrupt index="11" name="CHDET" caption="Charger Detect"/>
+                <interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
+                <interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM" caption="SPM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940D"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0d"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="50"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
+                    <bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
+                    <bitfield caption="Clock Divide mode" mask="0x10" name="CKDIV8"/>
+                    <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_OSCSEL">
+                <value caption="Default" name="DEFAULT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF">
+                    <bitfield caption="VADC Data bits" mask="0x0FFF" name="VADC"/>
+                </register>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
+                    <bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
+                    <bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF">
+                    <bitfield caption="CC-ADC Instantaneous Current" mask="0xFFFF" name="CADIC"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="24"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="16"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFC" name="CADAC" lsb="10"/>
+                    <bitfield caption="ADC accumulate current bits" mask="0x03" name="CADAC0" lsb="8"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC0"/>
+                </register>
+                <register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Charge Current" mask="0xFF" name="CADRCC"/>
+                </register>
+                <register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Discharge Current" mask="0xFF" name="CADRDC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
+                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
+                              values="COMM_TW_BUS_TIMEOUT"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
+                </register>
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
+                    <bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
+                    <bitfield caption="TWI Data Bits" mask="0xFF" name="TWD"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TW_BUS_TIMEOUT">
+                <value caption="250ms" name="VAL_0x00" value="0x00"/>
+                <value caption="500ms" name="VAL_0x01" value="0x01"/>
+                <value caption="1000ms" name="VAL_0x02" value="0x02"/>
+                <value caption="2000ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="4"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F">
+                    <bitfield caption="Pin Change Enable Mask" mask="0x0F" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 A bits" mask="0xFF" name="OCR1A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 B bits" mask="0xFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 0 bits" mask="0xFFFF" name="TCNT0"/>
+                </register>
+                <register caption="Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Cell Balancing" name="CELL_BALANCING">
+            <register-group caption="Cell Balancing" name="CELL_BALANCING">
+                <register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
+                    <bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x3F" name="HCPT"/>
+                </register>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F">
+                    <bitfield caption="Battery Protection Over-current Timing bits" mask="0x3F" name="OCPT"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x7F" name="SCPT"/>
+                </register>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-High-current Detection Level bits" mask="0xFF"
+                              name="CHCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-High-current Detection Level bits" mask="0xFF"
+                              name="DHCDL"/>
+                </register>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-Over-current Detection Level bits" mask="0xFF"
+                              name="COCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-Over-current Detection Level bits" mask="0xFF"
+                              name="DOCDL"/>
+                </register>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Short-Circuit Detection Level Register bits" mask="0xFF"
+                              name="SCDL"/>
+                </register>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Charger Detect" name="CHARGER_DETECT">
+            <register-group caption="Charger Detect" name="CHARGER_DETECT">
+                <register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
+                    <bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
+                    <bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
+                    <bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
+                    <bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
+                    <bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
+                </register>
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Bandgap Calibration of Resistor Ladder Bits" mask="0xFF" name="BGCR"/>
+                </register>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Fast Oscillator Calibration Value" mask="0xFF" name="FCAL"/>
+                </register>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR2"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR1"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR0"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
+                          ocd-rw="R"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>

src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVBREVB.xml

@@ -0,0 +1,982 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16HVBrevB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="CELL_BALANCING">
+                    <instance name="CELL_BALANCING" caption="Cell Balancing">
+                        <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
+                                        address-space="data" caption="Cell Balancing"/>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="CHARGER_DETECT">
+                    <instance name="CHARGER_DETECT" caption="Charger Detect">
+                        <register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
+                                        address-space="data" caption="Charger Detect"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
+                <interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
+                <interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
+                <interrupt index="11" name="CHDET" caption="Charger Detect"/>
+                <interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
+                <interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM" caption="SPM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940D"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0d"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="50"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
+                    <bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
+                    <bitfield caption="DUVR mode on" mask="0x10" name="DUVRDINIT"/>
+                    <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_OSCSEL">
+                <value caption="Default" name="DEFAULT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF">
+                    <bitfield caption="VADC Data bits" mask="0x0FFF" name="VADC"/>
+                </register>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
+                    <bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
+                    <bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF">
+                    <bitfield caption="CC-ADC Instantaneous Current" mask="0xFFFF" name="CADIC"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="24"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="16"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFC" name="CADAC" lsb="10"/>
+                    <bitfield caption="ADC accumulate current bits" mask="0x03" name="CADAC0" lsb="8"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC0"/>
+                </register>
+                <register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Charge Current" mask="0xFF" name="CADRCC"/>
+                </register>
+                <register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Discharge Current" mask="0xFF" name="CADRDC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
+                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
+                              values="COMM_TW_BUS_TIMEOUT"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
+                </register>
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
+                    <bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
+                    <bitfield caption="TWI Data Bits" mask="0xFF" name="TWD"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TW_BUS_TIMEOUT">
+                <value caption="250ms" name="VAL_0x00" value="0x00"/>
+                <value caption="500ms" name="VAL_0x01" value="0x01"/>
+                <value caption="1000ms" name="VAL_0x02" value="0x02"/>
+                <value caption="2000ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="4"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F">
+                    <bitfield caption="Pin Change Enable Mask" mask="0x0F" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 A bits" mask="0xFF" name="OCR1A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 B bits" mask="0xFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 0 bits" mask="0xFFFF" name="TCNT0"/>
+                </register>
+                <register caption="Output Compare Register 0A" name="OCR0A" offset="0x48" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Cell Balancing" name="CELL_BALANCING">
+            <register-group caption="Cell Balancing" name="CELL_BALANCING">
+                <register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
+                    <bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x3F" name="HCPT"/>
+                </register>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F">
+                    <bitfield caption="Battery Protection Over-current Timing bits" mask="0x3F" name="OCPT"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x7F" name="SCPT"/>
+                </register>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-High-current Detection Level bits" mask="0xFF"
+                              name="CHCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-High-current Detection Level bits" mask="0xFF"
+                              name="DHCDL"/>
+                </register>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-Over-current Detection Level bits" mask="0xFF"
+                              name="COCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-Over-current Detection Level bits" mask="0xFF"
+                              name="DOCDL"/>
+                </register>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Short-Circuit Detection Level Register bits" mask="0xFF"
+                              name="SCDL"/>
+                </register>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Charger Detect" name="CHARGER_DETECT">
+            <register-group caption="Charger Detect" name="CHARGER_DETECT">
+                <register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
+                    <bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
+                    <bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
+                    <bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
+                    <bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
+                    <bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
+                </register>
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Bandgap Calibration of Resistor Ladder Bits" mask="0xFF" name="BGCR"/>
+                </register>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Fast Oscillator Calibration Value" mask="0xFF" name="FCAL"/>
+                </register>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR2"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR1"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR0"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
+                          ocd-rw="R"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>