doryan/BloomPatched
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Tidied caption attributes in AVR8 TDFs

Browse Source
This commit is contained in:
Nav
2021-09-17 22:44:36 +01:00
parent 671e3dd51b
commit 8b74b36842
183 changed files with 1409 additions and 1409 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY167.xml
View File

@@ -660,12 +660,12 @@
<bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01"
name="OC1AU"/>
</register>
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
mask="0xFFFF"/>
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
mask="0xFFFF"/>
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
mask="0xFFFF"/>
</register-group>
<value-group caption="" name="CLK_SEL_3BIT_EXT">
@@ -705,7 +705,7 @@
</module>
<module caption="EEPROM" name="EEPROM">
<register-group caption="EEPROM" name="EEPROM">
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
<bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
@@ -757,15 +757,15 @@
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
</register>
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
ocd-rw="R">
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
values="ANALOG_ADC_PRESCALER"/>
</register>
<register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)"
@@ -877,7 +877,7 @@
<bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
</register>
<register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
<bitfield caption="Pin Change Interrupt Enable on any PCINT14..8 pin" mask="0x03" name="PCIE"/>
<bitfield caption="Pin Change Interrupt Enable on any PCINT14..8 pin" mask="0x03" name="PCIE"/>
</register>
<register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
<bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
@@ -929,7 +929,7 @@
<bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
<bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
</register>
<register caption="Stack Pointer Bytes" name="SP" offset="0x5D" size="2" mask="0x07FF"/>
<register caption="Stack Pointer Bytes" name="SP" offset="0x5D" size="2" mask="0x07FF"/>
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
<bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
<bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>