Tidied caption attributes in AVR8 TDFs
This commit is contained in:
@@ -1118,14 +1118,14 @@
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<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
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<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
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</register>
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<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
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<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
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<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
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<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
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@@ -1165,14 +1165,14 @@
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<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
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<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
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</register>
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<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
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<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
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<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
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<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
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@@ -1286,10 +1286,10 @@
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<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
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<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
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<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
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values="ANALOG_ADC_PRESCALER"/>
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</register>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
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<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
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<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
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<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
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@@ -1094,14 +1094,14 @@
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<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
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<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
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</register>
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<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
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<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
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<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
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<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
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@@ -1141,14 +1141,14 @@
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<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
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<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
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</register>
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<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
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<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
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<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
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<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
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@@ -1262,10 +1262,10 @@
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<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
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<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
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<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
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values="ANALOG_ADC_PRESCALER"/>
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</register>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
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<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
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<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
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<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
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@@ -1096,14 +1096,14 @@
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<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
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<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
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</register>
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<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
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<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x8C" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
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<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
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<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
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@@ -1143,14 +1143,14 @@
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<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
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<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
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</register>
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<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
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<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
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<register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3C" offset="0x9C" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
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<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
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mask="0xFFFF"/>
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<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
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<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
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@@ -1267,7 +1267,7 @@
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
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values="ANALOG_ADC_PRESCALER"/>
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</register>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
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<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
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<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
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<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
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@@ -858,7 +858,7 @@
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<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
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<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
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</register>
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<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
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<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
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<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
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<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
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<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
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@@ -935,11 +935,11 @@
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mask="0xFFFF">
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<bitfield caption="Timer/Counter1 Output Compare A Register" mask="0xFFFF" name="OCR1A"/>
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</register>
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
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<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
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mask="0xFFFF">
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<bitfield caption="Timer/Counter1 Output Compare B Register" mask="0xFFFF" name="OCR1B"/>
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</register>
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<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
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<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
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mask="0xFFFF">
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<bitfield caption="Timer/Counter Input Capture" mask="0xFFFF" name="ICR1"/>
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</register>
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@@ -972,9 +972,9 @@
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<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
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<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
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<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
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</register>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
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<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1" mask="0x9F">
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<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
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<bitfield caption="ADC Start Conversion" mask="0x10" name="ADASCR"/>
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@@ -1125,20 +1125,20 @@
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<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
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<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
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<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
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<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
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<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
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<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
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</register>
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<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
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<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
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<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
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<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
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<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
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values="ANALOG_COMP_INTERRUPT"/>
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<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
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</register>
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<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
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<bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
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<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
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<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
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<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
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<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
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<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
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<bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
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@@ -655,9 +655,9 @@
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<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
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<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
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<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
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<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
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</register>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x4C" size="2" mask="0xFFFF"/>
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<register caption="ADC Data Register Bytes" name="ADC" offset="0x4C" size="2" mask="0xFFFF"/>
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<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x27" size="1">
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<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
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<bitfield caption="ADC Noise Canceller Disable" mask="0x40" name="ADNCDIS"/>
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@@ -718,28 +718,28 @@
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<register caption="Analog Comparator3 Control Register" name="AC3CON" offset="0x7F" size="1">
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<bitfield caption="Analog Comparator3 Enable Bit" mask="0x80" name="AC3EN"/>
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<bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
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<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"/>
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<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"/>
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<bitfield caption="Analog Comparator 3 Alternate Output Enable" mask="0x08" name="AC3OEA"/>
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<bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
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</register>
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<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x7D" size="1">
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<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
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<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
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<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
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<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
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values="ANALOG_COMP_INTERRUPT"/>
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<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
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</register>
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<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x7E" size="1">
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<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
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<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
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<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
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<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
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values="ANALOG_COMP_INTERRUPT"/>
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<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
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</register>
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<register caption="Analog Comparator Status Register" name="ACSR" offset="0x20" size="1" ocd-rw="R">
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<bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
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<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
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<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
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<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
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<bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
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<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
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<bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
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@@ -879,7 +879,7 @@
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</module>
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<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
|
||||
<bitfield caption="None Volatile Busy Memory Busy" mask="0x80" name="NVMBSY"/>
|
||||
@@ -1053,8 +1053,8 @@
|
||||
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
|
||||
values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x5A" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x5A" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -621,13 +621,13 @@
|
||||
<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
|
||||
<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
|
||||
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
|
||||
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
||||
@@ -635,14 +635,14 @@
|
||||
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
|
||||
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
|
||||
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
||||
<bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
|
||||
|
||||
@@ -640,13 +640,13 @@
|
||||
<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
|
||||
<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
|
||||
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
|
||||
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
||||
@@ -654,14 +654,14 @@
|
||||
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
|
||||
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
|
||||
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
||||
<bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
|
||||
|
||||
@@ -667,13 +667,13 @@
|
||||
<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
|
||||
<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
|
||||
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
|
||||
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
||||
@@ -681,14 +681,14 @@
|
||||
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
|
||||
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
|
||||
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
||||
<bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
|
||||
@@ -839,7 +839,7 @@
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -920,7 +920,7 @@
|
||||
mask="0xFFFF">
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Register" mask="0xFFFF" name="OCR1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -951,9 +951,9 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1" mask="0x8F">
|
||||
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
|
||||
<bitfield caption="ADC Auto Trigger Source Selection 3" mask="0x08" name="ADTS3"/>
|
||||
|
||||
@@ -664,13 +664,13 @@
|
||||
<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
|
||||
<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bit" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
|
||||
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
|
||||
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
||||
@@ -678,14 +678,14 @@
|
||||
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
|
||||
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
|
||||
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
||||
<bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
|
||||
@@ -836,7 +836,7 @@
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -909,10 +909,10 @@
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2">
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2">
|
||||
<bitfield caption="Timer/Counter1 Output Compare A" mask="0xFFFF" name="OCR1A"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2">
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2">
|
||||
<bitfield caption="Timer/Counter1 Output Compare B" mask="0xFFFF" name="OCR1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
@@ -948,7 +948,7 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
|
||||
<bitfield caption="ADC Data Register" mask="0xFFFF" name="ADC"/>
|
||||
|
||||
@@ -719,28 +719,28 @@
|
||||
<register caption="Analog Comparator3 Control Register" name="AC3CON" offset="0x7F" size="1">
|
||||
<bitfield caption="Analog Comparator3 Enable Bit" mask="0x80" name="AC3EN"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"/>
|
||||
<bitfield caption="Analog Comparator 3 Alternate Output Enable" mask="0x08" name="AC3OEA"/>
|
||||
<bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x7D" size="1">
|
||||
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x7E" size="1">
|
||||
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x20" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
|
||||
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
||||
<bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
|
||||
|
||||
@@ -880,7 +880,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1029,7 +1029,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1139,14 +1139,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1186,14 +1186,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1296,7 +1296,7 @@
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
|
||||
|
||||
@@ -889,7 +889,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1184,7 +1184,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1294,14 +1294,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1341,14 +1341,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1451,7 +1451,7 @@
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
|
||||
|
||||
@@ -620,7 +620,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -674,14 +674,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -996,7 +996,7 @@
|
||||
<bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
|
||||
<bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
|
||||
@@ -886,7 +886,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1181,7 +1181,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1291,14 +1291,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1338,14 +1338,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1445,10 +1445,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
|
||||
|
||||
@@ -886,7 +886,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1181,7 +1181,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1291,14 +1291,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1338,14 +1338,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1445,10 +1445,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
|
||||
|
||||
@@ -619,7 +619,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -673,14 +673,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -995,7 +995,7 @@
|
||||
<bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
|
||||
<bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
|
||||
@@ -1051,7 +1051,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x0FFF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x0FFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1191,14 +1191,14 @@
|
||||
<bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC3">
|
||||
@@ -1241,14 +1241,14 @@
|
||||
<bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
|
||||
<register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
@@ -1329,13 +1329,13 @@
|
||||
<register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Free Running Select" mask="0x20" name="ADFR"/>
|
||||
<bitfield caption="ADC Free Running Select" mask="0x20" name="ADFR"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="ANALOG_ADC_V_REF2">
|
||||
<value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -894,7 +894,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -925,7 +925,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART2">
|
||||
<register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -956,7 +956,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ2"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL2"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART3">
|
||||
<register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -988,7 +988,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ3"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL3"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR3" offset="0x134" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR3" offset="0x134" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1137,7 +1137,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1289,14 +1289,14 @@
|
||||
<bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1336,14 +1336,14 @@
|
||||
<bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1383,14 +1383,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1430,14 +1430,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1667,15 +1667,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF6"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -782,7 +782,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -813,7 +813,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -942,7 +942,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1076,14 +1076,14 @@
|
||||
<bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1123,14 +1123,14 @@
|
||||
<bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1170,14 +1170,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1217,14 +1217,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1345,15 +1345,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF6"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -749,7 +749,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -780,7 +780,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -833,7 +833,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -899,12 +899,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC3">
|
||||
@@ -938,12 +938,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
@@ -1077,15 +1077,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -710,7 +710,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -743,7 +743,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1177,14 +1177,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
|
||||
<bitfield caption="Reserved" mask="0x1F" name="Res"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1229,14 +1229,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
|
||||
<bitfield caption="Reserved" mask="0x1F" name="Res"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1281,14 +1281,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
|
||||
<bitfield caption="Reserved" mask="0x1F" name="Res"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1333,14 +1333,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
|
||||
<bitfield caption="Reserved" mask="0x1F" name="Res"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -2375,7 +2375,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="Reserved" mask="0xC0" name="Res"/>
|
||||
@@ -2487,14 +2487,14 @@
|
||||
<bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -1030,7 +1030,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x0FFF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x0FFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1170,14 +1170,14 @@
|
||||
<bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC3">
|
||||
@@ -1220,14 +1220,14 @@
|
||||
<bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
|
||||
<register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
@@ -1308,13 +1308,13 @@
|
||||
<register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Free Running Select" mask="0x20" name="ADFR"/>
|
||||
<bitfield caption="ADC Free Running Select" mask="0x20" name="ADFR"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="ANALOG_ADC_V_REF2">
|
||||
<value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -644,7 +644,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -677,7 +677,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1115,14 +1115,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
|
||||
<bitfield caption="Reserved" mask="0x1F" name="Res"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1167,14 +1167,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
|
||||
<bitfield caption="Reserved" mask="0x1F" name="Res"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1219,14 +1219,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
|
||||
<bitfield caption="Reserved" mask="0x1F" name="Res"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1271,14 +1271,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
|
||||
<bitfield caption="Reserved" mask="0x1F" name="Res"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -2064,7 +2064,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="Reserved" mask="0xC0" name="Res"/>
|
||||
@@ -2174,14 +2174,14 @@
|
||||
<bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -714,7 +714,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -747,7 +747,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1174,14 +1174,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1225,14 +1225,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1276,14 +1276,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1327,14 +1327,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -2360,7 +2360,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
|
||||
@@ -2471,14 +2471,14 @@
|
||||
<bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -704,12 +704,12 @@
|
||||
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
|
||||
values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
@@ -755,7 +755,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1021,7 +1021,7 @@
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0xE0" name="ADTS"/>
|
||||
</register>
|
||||
|
||||
@@ -599,12 +599,12 @@
|
||||
<bitfield caption="Pulse Width Modulator Select Bits" mask="0x18" name="WGM1" lsb="2"/>
|
||||
<bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x44" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC3">
|
||||
@@ -636,12 +636,12 @@
|
||||
<bitfield caption="Pulse Width Modulator Select Bits" mask="0x18" name="WGM3" lsb="2"/>
|
||||
<bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_SWAPPED"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counte3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
|
||||
<register caption="Timer/Counte3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -741,7 +741,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -772,7 +772,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -825,7 +825,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1015,15 +1015,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1159,12 +1159,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -782,7 +782,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -835,7 +835,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1025,15 +1025,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1169,12 +1169,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -747,7 +747,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -831,7 +831,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1021,15 +1021,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1165,12 +1165,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -618,12 +618,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -723,7 +723,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -878,10 +878,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -957,7 +957,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -618,12 +618,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -723,7 +723,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -907,10 +907,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -986,7 +986,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -618,12 +618,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -723,7 +723,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -878,10 +878,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -957,7 +957,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -660,7 +660,7 @@
|
||||
<bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -743,12 +743,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -830,15 +830,15 @@
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
|
||||
values="ADC_MUX_SINGLE_NO_TEMP"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -950,7 +950,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1161,7 +1161,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
|
||||
@@ -656,7 +656,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -739,12 +739,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -825,15 +825,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -946,7 +946,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1072,7 +1072,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
|
||||
@@ -660,7 +660,7 @@
|
||||
<bitfield caption="Character Size - together with UCSZ2 in UCSRnB" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -743,12 +743,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -829,15 +829,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -950,7 +950,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1076,7 +1076,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
|
||||
@@ -662,7 +662,7 @@
|
||||
<bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -745,12 +745,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -831,15 +831,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -952,7 +952,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1078,7 +1078,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
|
||||
@@ -761,12 +761,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -847,15 +847,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -976,7 +976,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1102,7 +1102,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
|
||||
@@ -737,12 +737,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -842,7 +842,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1100,10 +1100,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1179,7 +1179,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -739,12 +739,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -844,7 +844,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1131,10 +1131,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1210,7 +1210,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -741,7 +741,7 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
|
||||
@@ -817,14 +817,14 @@
|
||||
<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
|
||||
<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bits" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bits" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
|
||||
<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
|
||||
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
|
||||
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
||||
@@ -832,21 +832,21 @@
|
||||
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
|
||||
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
|
||||
<bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
|
||||
<bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
|
||||
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
||||
@@ -1005,7 +1005,7 @@
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1122,7 +1122,7 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
|
||||
<bitfield caption="ADC Data bits" mask="0xFFFF" name="ADC"/>
|
||||
|
||||
@@ -685,7 +685,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
|
||||
@@ -780,7 +780,7 @@
|
||||
<bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
|
||||
<bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -853,7 +853,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -992,7 +992,7 @@
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer/Counter3 bits" mask="0xFFFF" name="TCNT3"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF">
|
||||
<bitfield caption="Timer/Counter3 Output Compare A bits" mask="0xFFFF" name="OCR3A"/>
|
||||
</register>
|
||||
@@ -1004,7 +1004,7 @@
|
||||
mask="0xFFFF">
|
||||
<bitfield caption="Timer/Counter3 Output Compare C bits" mask="0xFFFF" name="OCR3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF">
|
||||
<bitfield caption="Timer/Counter3 Input Capture bits" mask="0xFFFF" name="ICR3"/>
|
||||
</register>
|
||||
@@ -1197,10 +1197,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
|
||||
<bitfield caption="ADC Data Bits" mask="0x03FF" name="ADC"/>
|
||||
</register>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -894,7 +894,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -925,7 +925,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART2">
|
||||
<register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -956,7 +956,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ2"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL2"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART3">
|
||||
<register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -1137,7 +1137,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1289,14 +1289,14 @@
|
||||
<bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1336,14 +1336,14 @@
|
||||
<bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1383,14 +1383,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1430,14 +1430,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1667,15 +1667,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF6"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -782,7 +782,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -813,7 +813,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -942,7 +942,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1094,14 +1094,14 @@
|
||||
<bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1141,14 +1141,14 @@
|
||||
<bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1188,14 +1188,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1235,14 +1235,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1472,15 +1472,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF6"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -717,7 +717,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -750,7 +750,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1177,14 +1177,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1228,14 +1228,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1279,14 +1279,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1330,14 +1330,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -2365,7 +2365,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
|
||||
@@ -2476,14 +2476,14 @@
|
||||
<bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -90,7 +90,7 @@
|
||||
</instance>
|
||||
</module>
|
||||
<module name="PORT">
|
||||
<instance name="MISSING_PORTA" caption="I/O Port" >
|
||||
<instance name="MISSING_PORTA" caption="I/O Port">
|
||||
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
@@ -721,7 +721,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -754,7 +754,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1181,14 +1181,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1232,14 +1232,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1283,14 +1283,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1334,14 +1334,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -2367,7 +2367,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
|
||||
@@ -2478,14 +2478,14 @@
|
||||
<bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -267,7 +267,7 @@
|
||||
</peripherals>
|
||||
<interrupts>
|
||||
<interrupt index="0" name="RESET"
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
<interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
|
||||
<interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
|
||||
<interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
|
||||
@@ -647,7 +647,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -813,12 +813,12 @@
|
||||
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
|
||||
values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
@@ -955,7 +955,7 @@
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0xE0" name="ADTS"/>
|
||||
</register>
|
||||
|
||||
@@ -739,7 +739,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -770,7 +770,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -823,7 +823,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1013,15 +1013,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1157,12 +1157,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -784,7 +784,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -837,7 +837,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1027,15 +1027,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1171,12 +1171,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -835,7 +835,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1031,17 +1031,17 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
|
||||
<bitfield caption="ADC Data bits" mask="0x03FF" name="ADC"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -886,7 +886,7 @@
|
||||
<bitfield caption="Start Frame Detect Flag" mask="0x40" name="RXS"/>
|
||||
<bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -922,7 +922,7 @@
|
||||
<bitfield caption="Start Frame Detect Flag" mask="0x40" name="RXS"/>
|
||||
<bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART2">
|
||||
<register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -958,7 +958,7 @@
|
||||
<bitfield caption="Start Frame Detect Flag" mask="0x40" name="RXS"/>
|
||||
<bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1192,14 +1192,14 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1336,12 +1336,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC3">
|
||||
|
||||
@@ -570,10 +570,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -664,7 +664,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -792,7 +792,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -900,12 +900,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -647,12 +647,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -752,7 +752,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1024,10 +1024,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1103,7 +1103,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -647,12 +647,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -752,7 +752,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1024,10 +1024,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1103,7 +1103,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -647,12 +647,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -752,7 +752,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1026,10 +1026,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1105,7 +1105,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -647,12 +647,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -752,7 +752,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -944,10 +944,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1023,7 +1023,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -570,10 +570,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -664,7 +664,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -792,7 +792,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -900,12 +900,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -570,10 +570,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -664,7 +664,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -792,7 +792,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -900,12 +900,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -570,10 +570,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -664,7 +664,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -788,7 +788,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -896,12 +896,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -855,10 +855,10 @@
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -976,7 +976,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
|
||||
@@ -745,12 +745,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -831,15 +831,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -952,7 +952,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1162,7 +1162,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
|
||||
@@ -735,12 +735,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -840,7 +840,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1176,10 +1176,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1255,7 +1255,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -653,12 +653,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -758,7 +758,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1114,10 +1114,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1193,7 +1193,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -653,12 +653,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -758,7 +758,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1114,10 +1114,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1193,7 +1193,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -653,12 +653,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -758,7 +758,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1149,10 +1149,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1228,7 +1228,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -653,12 +653,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -758,7 +758,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -950,10 +950,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1029,7 +1029,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -735,12 +735,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -840,7 +840,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1353,10 +1353,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1432,7 +1432,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -739,12 +739,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -844,7 +844,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1042,10 +1042,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1121,7 +1121,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -735,12 +735,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -840,7 +840,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1355,10 +1355,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -1434,7 +1434,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -250,7 +250,7 @@
|
||||
</peripherals>
|
||||
<interrupts>
|
||||
<interrupt index="0" name="RESET"
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
<interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
|
||||
<interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
|
||||
<interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
|
||||
@@ -618,7 +618,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -784,12 +784,12 @@
|
||||
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
|
||||
values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
@@ -926,7 +926,7 @@
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0xE0" name="ADTS"/>
|
||||
</register>
|
||||
|
||||
@@ -800,14 +800,14 @@
|
||||
<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
|
||||
<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bits" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bits" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
|
||||
<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
|
||||
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
|
||||
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
||||
@@ -815,21 +815,21 @@
|
||||
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
|
||||
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
|
||||
<bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
|
||||
<bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
|
||||
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
||||
@@ -988,7 +988,7 @@
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1104,7 +1104,7 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
|
||||
<bitfield caption="ADC Data bits" mask="0x03FF" name="ADC"/>
|
||||
|
||||
@@ -803,14 +803,14 @@
|
||||
<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
|
||||
<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bits" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Select Bits" mask="0x30" name="AC0IS"/>
|
||||
<bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
|
||||
<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
|
||||
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
|
||||
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
||||
@@ -818,21 +818,21 @@
|
||||
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
|
||||
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
|
||||
<bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
|
||||
values="ANALOG_COMP_INTERRUPT"/>
|
||||
<bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
|
||||
</register>
|
||||
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
||||
<bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
|
||||
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
||||
<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
|
||||
<bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
|
||||
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
||||
@@ -991,7 +991,7 @@
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1057,7 +1057,7 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2"
|
||||
@@ -1094,9 +1094,9 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
|
||||
<bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
|
||||
|
||||
@@ -673,7 +673,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -727,14 +727,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1053,7 +1053,7 @@
|
||||
<bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
|
||||
<bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
|
||||
@@ -776,7 +776,7 @@
|
||||
<bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
|
||||
<bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -839,7 +839,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -963,14 +963,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1010,14 +1010,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1149,10 +1149,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x20" name="MUX5"/>
|
||||
|
||||
@@ -324,7 +324,7 @@
|
||||
<register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
|
||||
</register>
|
||||
<register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
|
||||
<register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
|
||||
<register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
|
||||
@@ -374,7 +374,7 @@
|
||||
<bitfield caption="Clear Timer/Counter on Compare Match" mask="0x08" name="CTC1"/>
|
||||
<bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output Compare Register 1A Low byte" name="OCR1AL" offset="0x88" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Output Compare Register 1A High byte" name="OCR1AH" offset="0x89" size="1"
|
||||
@@ -843,7 +843,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
|
||||
@@ -722,12 +722,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -809,15 +809,15 @@
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
|
||||
values="ADC_MUX_SINGLE_NO_TEMP"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -929,7 +929,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
|
||||
@@ -710,12 +710,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -796,15 +796,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -917,7 +917,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
|
||||
@@ -635,7 +635,7 @@
|
||||
<bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -718,12 +718,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -804,15 +804,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -925,7 +925,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
|
||||
@@ -635,7 +635,7 @@
|
||||
<bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -718,12 +718,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -804,15 +804,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -925,7 +925,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
|
||||
@@ -732,12 +732,12 @@
|
||||
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
@@ -818,15 +818,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -947,7 +947,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
|
||||
@@ -754,15 +754,15 @@
|
||||
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x26" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x8E" size="1">
|
||||
@@ -1093,7 +1093,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1233,14 +1233,14 @@
|
||||
<bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1C" offset="0x78" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC3">
|
||||
@@ -1283,14 +1283,14 @@
|
||||
<bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x84" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
|
||||
<register caption="Timer/Counter3 Output compare Register C Bytes" name="OCR3C" offset="0x82" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x80" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -894,7 +894,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -925,7 +925,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART2">
|
||||
<register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -956,7 +956,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ2"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL2"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART3">
|
||||
<register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -1137,7 +1137,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1289,14 +1289,14 @@
|
||||
<bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1336,14 +1336,14 @@
|
||||
<bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1383,14 +1383,14 @@
|
||||
<bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1430,14 +1430,14 @@
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1660,15 +1660,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF6"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -730,7 +730,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -783,7 +783,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -973,15 +973,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1117,12 +1117,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -737,7 +737,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -768,7 +768,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -821,7 +821,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1011,15 +1011,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1155,12 +1155,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -755,7 +755,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -786,7 +786,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -839,7 +839,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1029,15 +1029,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1173,12 +1173,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -741,7 +741,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -772,7 +772,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
||||
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
||||
@@ -825,7 +825,7 @@
|
||||
<bitfield caption="" mask="0x08" name="WGM02"/>
|
||||
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
||||
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
||||
@@ -1015,15 +1015,15 @@
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
|
||||
values="ADC_MUX_DIFF"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
@@ -1159,12 +1159,12 @@
|
||||
<bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
|
||||
@@ -710,7 +710,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART0 Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<register-group caption="USART" name="USART1">
|
||||
<register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
|
||||
@@ -743,7 +743,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
|
||||
</register>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
<register caption="USART1 Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
|
||||
<value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1170,14 +1170,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
<register caption="Timer/Counter5 Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register A Bytes" name="OCR5A" offset="0x128" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register B Bytes" name="OCR5B" offset="0x12A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
<register caption="Timer/Counter5 Output Compare Register C Bytes" name="OCR5C" offset="0x12C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
<register caption="Timer/Counter5 Input Capture Register Bytes" name="ICR5" offset="0x126" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
|
||||
<bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
|
||||
@@ -1221,14 +1221,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
<register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
<register caption="Timer/Counter4 Output Compare Register C Bytes" name="OCR4C" offset="0xAC" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
<register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
|
||||
<bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
|
||||
@@ -1272,14 +1272,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
<register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
<register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
<register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
|
||||
<bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
|
||||
@@ -1323,14 +1323,14 @@
|
||||
<bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
|
||||
<bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -2357,7 +2357,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
|
||||
@@ -2468,14 +2468,14 @@
|
||||
<bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
|
||||
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
||||
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
|
||||
@@ -570,10 +570,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -800,7 +800,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -957,12 +957,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1054,7 +1054,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -599,10 +599,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -748,7 +748,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -851,7 +851,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1018,12 +1018,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -599,10 +599,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -748,7 +748,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -851,7 +851,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1018,12 +1018,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -599,10 +599,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -748,7 +748,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -851,7 +851,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1018,12 +1018,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -570,10 +570,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -801,7 +801,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -958,12 +958,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1055,7 +1055,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -570,10 +570,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -803,7 +803,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -960,12 +960,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
@@ -1057,7 +1057,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
|
||||
@@ -687,10 +687,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -836,7 +836,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1041,7 +1041,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1149,12 +1149,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -605,10 +605,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -754,7 +754,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -858,7 +858,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -976,12 +976,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -605,10 +605,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -754,7 +754,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -858,7 +858,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -976,12 +976,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -605,10 +605,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -754,7 +754,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -858,7 +858,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -976,12 +976,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -683,10 +683,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -832,7 +832,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1037,7 +1037,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1145,12 +1145,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
@@ -683,10 +683,10 @@
|
||||
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
||||
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
||||
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
||||
values="ANALOG_ADC_PRESCALER"/>
|
||||
</register>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
||||
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
||||
</register>
|
||||
@@ -832,7 +832,7 @@
|
||||
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
||||
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
||||
</register>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_USART_MODE">
|
||||
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
||||
@@ -1037,7 +1037,7 @@
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
@@ -1145,12 +1145,12 @@
|
||||
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
||||
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user