Switched to using underlying RegisterNumber type for RISC-V register numbers

This commit is contained in:
Nav
2023-11-23 23:31:13 +00:00
parent c0531a00da
commit 3908ad6848
5 changed files with 25 additions and 12 deletions

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@@ -15,7 +15,7 @@ namespace Targets::RiscV::DebugModule::Registers
SIZE_128 = 0x04, SIZE_128 = 0x04,
}; };
::Targets::RiscV::Registers::RegisterNumber registerNumber; RegisterNumber registerNumber;
bool write:1 = false; bool write:1 = false;
bool transfer:1 = false; bool transfer:1 = false;
bool postExecute:1 = false; bool postExecute:1 = false;
@@ -25,7 +25,7 @@ namespace Targets::RiscV::DebugModule::Registers
RegisterAccessControlField() = default; RegisterAccessControlField() = default;
RegisterAccessControlField( RegisterAccessControlField(
::Targets::RiscV::Registers::RegisterNumber registerNumber, RegisterNumber registerNumber,
bool write, bool write,
bool transfer, bool transfer,
bool postExecute, bool postExecute,
@@ -41,7 +41,7 @@ namespace Targets::RiscV::DebugModule::Registers
{} {}
constexpr explicit RegisterAccessControlField(std::uint32_t controlValue) constexpr explicit RegisterAccessControlField(std::uint32_t controlValue)
: registerNumber(static_cast<::Targets::RiscV::Registers::RegisterNumber>(controlValue & 0xFFFF)) : registerNumber(static_cast<RegisterNumber>(controlValue & 0xFFFF))
, write(static_cast<bool>(controlValue & (0x01 << 16))) , write(static_cast<bool>(controlValue & (0x01 << 16)))
, transfer(static_cast<bool>(controlValue & (0x01 << 17))) , transfer(static_cast<bool>(controlValue & (0x01 << 17)))
, postExecute(static_cast<bool>(controlValue & (0x01 << 18))) , postExecute(static_cast<bool>(controlValue & (0x01 << 18)))

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@@ -6,7 +6,7 @@
namespace Targets::RiscV::Registers namespace Targets::RiscV::Registers
{ {
enum class RegisterNumber: std::uint16_t enum class RegisterNumber: ::Targets::RiscV::RegisterNumber
{ {
DEBUG_CONTROL_STATUS_REGISTER = 0x07b0, DEBUG_CONTROL_STATUS_REGISTER = 0x07b0,
DEBUG_PROGRAM_COUNTER_REGISTER = 0x07b1, DEBUG_PROGRAM_COUNTER_REGISTER = 0x07b1,

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@@ -3,6 +3,7 @@
#include <thread> #include <thread>
#include <chrono> #include <chrono>
#include "Registers/RegisterNumbers.hpp"
#include "DebugModule/Registers/RegisterAddresses.hpp" #include "DebugModule/Registers/RegisterAddresses.hpp"
#include "DebugModule/Registers/RegisterAccessControlField.hpp" #include "DebugModule/Registers/RegisterAccessControlField.hpp"
@@ -15,7 +16,6 @@
namespace Targets::RiscV namespace Targets::RiscV
{ {
using Registers::RegisterNumber;
using Registers::DebugControlStatusRegister; using Registers::DebugControlStatusRegister;
using DebugModule::Registers::RegisterAddress; using DebugModule::Registers::RegisterAddress;
@@ -223,12 +223,12 @@ namespace Targets::RiscV
} }
TargetMemoryAddress RiscV::getProgramCounter() { TargetMemoryAddress RiscV::getProgramCounter() {
return this->readRegister(RegisterNumber::DEBUG_PROGRAM_COUNTER_REGISTER); return this->readRegister(Registers::RegisterNumber::DEBUG_PROGRAM_COUNTER_REGISTER);
} }
void RiscV::setProgramCounter(TargetMemoryAddress programCounter) { void RiscV::setProgramCounter(TargetMemoryAddress programCounter) {
// TODO: test this // TODO: test this
this->writeRegister(RegisterNumber::DEBUG_PROGRAM_COUNTER_REGISTER, programCounter); this->writeRegister(Registers::RegisterNumber::DEBUG_PROGRAM_COUNTER_REGISTER, programCounter);
} }
TargetStackPointer RiscV::getStackPointer() { TargetStackPointer RiscV::getStackPointer() {
@@ -319,7 +319,7 @@ namespace Targets::RiscV
} }
DebugControlStatusRegister RiscV::readDebugControlStatusRegister() { DebugControlStatusRegister RiscV::readDebugControlStatusRegister() {
return DebugControlStatusRegister(this->readRegister(RegisterNumber::DEBUG_CONTROL_STATUS_REGISTER)); return DebugControlStatusRegister(this->readRegister(Registers::RegisterNumber::DEBUG_CONTROL_STATUS_REGISTER));
} }
RegisterValue RiscV::readRegister(RegisterNumber number) { RegisterValue RiscV::readRegister(RegisterNumber number) {
@@ -341,7 +341,11 @@ namespace Targets::RiscV
return this->riscVDebugInterface->readDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_0); return this->riscVDebugInterface->readDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_0);
} }
void RiscV::writeRegister(Registers::RegisterNumber number, RegisterValue value) { RegisterValue RiscV::readRegister(Registers::RegisterNumber number) {
return this->readRegister(static_cast<RegisterNumber>(number));
}
void RiscV::writeRegister(RegisterNumber number, RegisterValue value) {
using DebugModule::Registers::RegisterAccessControlField; using DebugModule::Registers::RegisterAccessControlField;
auto command = AbstractCommandRegister(); auto command = AbstractCommandRegister();
@@ -359,6 +363,13 @@ namespace Targets::RiscV
this->executeAbstractCommand(command); this->executeAbstractCommand(command);
} }
void RiscV::writeRegister(Registers::RegisterNumber number, RegisterValue value) {
this->writeRegister(
static_cast<RegisterNumber>(number),
value
);
}
void RiscV::writeDebugModuleControlRegister(const DebugModule::Registers::ControlRegister& controlRegister) { void RiscV::writeDebugModuleControlRegister(const DebugModule::Registers::ControlRegister& controlRegister) {
this->riscVDebugInterface->writeDebugModuleRegister( this->riscVDebugInterface->writeDebugModuleRegister(
RegisterAddress::CONTROL_REGISTER, RegisterAddress::CONTROL_REGISTER,
@@ -367,7 +378,7 @@ namespace Targets::RiscV
} }
void RiscV::writeDebugControlStatusRegister(const DebugControlStatusRegister& controlRegister) { void RiscV::writeDebugControlStatusRegister(const DebugControlStatusRegister& controlRegister) {
this->writeRegister(RegisterNumber::DEBUG_CONTROL_STATUS_REGISTER, controlRegister.value()); this->writeRegister(Registers::RegisterNumber::DEBUG_CONTROL_STATUS_REGISTER, controlRegister.value());
} }
void RiscV::executeAbstractCommand( void RiscV::executeAbstractCommand(

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@@ -9,6 +9,7 @@
#include "src/DebugToolDrivers/TargetInterfaces/RiscV/RiscVDebugInterface.hpp" #include "src/DebugToolDrivers/TargetInterfaces/RiscV/RiscVDebugInterface.hpp"
#include "src/Targets/RiscV/RiscVGeneric.hpp" #include "src/Targets/RiscV/RiscVGeneric.hpp"
#include "src/Targets/RiscV/Registers/RegisterNumbers.hpp"
#include "src/Targets/RiscV/Registers/DebugControlStatusRegister.hpp" #include "src/Targets/RiscV/Registers/DebugControlStatusRegister.hpp"
#include "src/Targets/RiscV/DebugModule/DebugModule.hpp" #include "src/Targets/RiscV/DebugModule/DebugModule.hpp"
@@ -108,7 +109,9 @@ namespace Targets::RiscV
Registers::DebugControlStatusRegister readDebugControlStatusRegister(); Registers::DebugControlStatusRegister readDebugControlStatusRegister();
RegisterValue readRegister(RegisterNumber number);
RegisterValue readRegister(Registers::RegisterNumber number); RegisterValue readRegister(Registers::RegisterNumber number);
void writeRegister(RegisterNumber number, RegisterValue value);
void writeRegister(Registers::RegisterNumber number, RegisterValue value); void writeRegister(Registers::RegisterNumber number, RegisterValue value);
void writeDebugModuleControlRegister(const DebugModule::Registers::ControlRegister& controlRegister); void writeDebugModuleControlRegister(const DebugModule::Registers::ControlRegister& controlRegister);

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@@ -2,11 +2,10 @@
#include <cstdint> #include <cstdint>
#include "Registers/RegisterNumbers.hpp"
namespace Targets::RiscV namespace Targets::RiscV
{ {
using RegisterValue = std::uint32_t; using RegisterValue = std::uint32_t;
using RegisterNumber = std::uint16_t;
enum class PrivilegeMode: std::uint8_t enum class PrivilegeMode: std::uint8_t
{ {