From 3908ad684852ff51474b401e97a1849a32c2a8b3 Mon Sep 17 00:00:00 2001 From: Nav Date: Thu, 23 Nov 2023 23:31:13 +0000 Subject: [PATCH] Switched to using underlying `RegisterNumber` type for RISC-V register numbers --- .../Registers/RegisterAccessControlField.hpp | 6 ++--- .../RiscV/Registers/RegisterNumbers.hpp | 2 +- src/Targets/RiscV/RiscV.cpp | 23 ++++++++++++++----- src/Targets/RiscV/RiscV.hpp | 3 +++ src/Targets/RiscV/RiscVGeneric.hpp | 3 +-- 5 files changed, 25 insertions(+), 12 deletions(-) diff --git a/src/Targets/RiscV/DebugModule/Registers/RegisterAccessControlField.hpp b/src/Targets/RiscV/DebugModule/Registers/RegisterAccessControlField.hpp index 4d8bdddb..cad3dbb4 100644 --- a/src/Targets/RiscV/DebugModule/Registers/RegisterAccessControlField.hpp +++ b/src/Targets/RiscV/DebugModule/Registers/RegisterAccessControlField.hpp @@ -15,7 +15,7 @@ namespace Targets::RiscV::DebugModule::Registers SIZE_128 = 0x04, }; - ::Targets::RiscV::Registers::RegisterNumber registerNumber; + RegisterNumber registerNumber; bool write:1 = false; bool transfer:1 = false; bool postExecute:1 = false; @@ -25,7 +25,7 @@ namespace Targets::RiscV::DebugModule::Registers RegisterAccessControlField() = default; RegisterAccessControlField( - ::Targets::RiscV::Registers::RegisterNumber registerNumber, + RegisterNumber registerNumber, bool write, bool transfer, bool postExecute, @@ -41,7 +41,7 @@ namespace Targets::RiscV::DebugModule::Registers {} constexpr explicit RegisterAccessControlField(std::uint32_t controlValue) - : registerNumber(static_cast<::Targets::RiscV::Registers::RegisterNumber>(controlValue & 0xFFFF)) + : registerNumber(static_cast(controlValue & 0xFFFF)) , write(static_cast(controlValue & (0x01 << 16))) , transfer(static_cast(controlValue & (0x01 << 17))) , postExecute(static_cast(controlValue & (0x01 << 18))) diff --git a/src/Targets/RiscV/Registers/RegisterNumbers.hpp b/src/Targets/RiscV/Registers/RegisterNumbers.hpp index ffb6c5f7..c3d55f1f 100644 --- a/src/Targets/RiscV/Registers/RegisterNumbers.hpp +++ b/src/Targets/RiscV/Registers/RegisterNumbers.hpp @@ -6,7 +6,7 @@ namespace Targets::RiscV::Registers { - enum class RegisterNumber: std::uint16_t + enum class RegisterNumber: ::Targets::RiscV::RegisterNumber { DEBUG_CONTROL_STATUS_REGISTER = 0x07b0, DEBUG_PROGRAM_COUNTER_REGISTER = 0x07b1, diff --git a/src/Targets/RiscV/RiscV.cpp b/src/Targets/RiscV/RiscV.cpp index d0b18a01..334f09b7 100644 --- a/src/Targets/RiscV/RiscV.cpp +++ b/src/Targets/RiscV/RiscV.cpp @@ -3,6 +3,7 @@ #include #include +#include "Registers/RegisterNumbers.hpp" #include "DebugModule/Registers/RegisterAddresses.hpp" #include "DebugModule/Registers/RegisterAccessControlField.hpp" @@ -15,7 +16,6 @@ namespace Targets::RiscV { - using Registers::RegisterNumber; using Registers::DebugControlStatusRegister; using DebugModule::Registers::RegisterAddress; @@ -223,12 +223,12 @@ namespace Targets::RiscV } TargetMemoryAddress RiscV::getProgramCounter() { - return this->readRegister(RegisterNumber::DEBUG_PROGRAM_COUNTER_REGISTER); + return this->readRegister(Registers::RegisterNumber::DEBUG_PROGRAM_COUNTER_REGISTER); } void RiscV::setProgramCounter(TargetMemoryAddress programCounter) { // TODO: test this - this->writeRegister(RegisterNumber::DEBUG_PROGRAM_COUNTER_REGISTER, programCounter); + this->writeRegister(Registers::RegisterNumber::DEBUG_PROGRAM_COUNTER_REGISTER, programCounter); } TargetStackPointer RiscV::getStackPointer() { @@ -319,7 +319,7 @@ namespace Targets::RiscV } DebugControlStatusRegister RiscV::readDebugControlStatusRegister() { - return DebugControlStatusRegister(this->readRegister(RegisterNumber::DEBUG_CONTROL_STATUS_REGISTER)); + return DebugControlStatusRegister(this->readRegister(Registers::RegisterNumber::DEBUG_CONTROL_STATUS_REGISTER)); } RegisterValue RiscV::readRegister(RegisterNumber number) { @@ -341,7 +341,11 @@ namespace Targets::RiscV return this->riscVDebugInterface->readDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_0); } - void RiscV::writeRegister(Registers::RegisterNumber number, RegisterValue value) { + RegisterValue RiscV::readRegister(Registers::RegisterNumber number) { + return this->readRegister(static_cast(number)); + } + + void RiscV::writeRegister(RegisterNumber number, RegisterValue value) { using DebugModule::Registers::RegisterAccessControlField; auto command = AbstractCommandRegister(); @@ -359,6 +363,13 @@ namespace Targets::RiscV this->executeAbstractCommand(command); } + void RiscV::writeRegister(Registers::RegisterNumber number, RegisterValue value) { + this->writeRegister( + static_cast(number), + value + ); + } + void RiscV::writeDebugModuleControlRegister(const DebugModule::Registers::ControlRegister& controlRegister) { this->riscVDebugInterface->writeDebugModuleRegister( RegisterAddress::CONTROL_REGISTER, @@ -367,7 +378,7 @@ namespace Targets::RiscV } void RiscV::writeDebugControlStatusRegister(const DebugControlStatusRegister& controlRegister) { - this->writeRegister(RegisterNumber::DEBUG_CONTROL_STATUS_REGISTER, controlRegister.value()); + this->writeRegister(Registers::RegisterNumber::DEBUG_CONTROL_STATUS_REGISTER, controlRegister.value()); } void RiscV::executeAbstractCommand( diff --git a/src/Targets/RiscV/RiscV.hpp b/src/Targets/RiscV/RiscV.hpp index 302364fd..6d4eb160 100644 --- a/src/Targets/RiscV/RiscV.hpp +++ b/src/Targets/RiscV/RiscV.hpp @@ -9,6 +9,7 @@ #include "src/DebugToolDrivers/TargetInterfaces/RiscV/RiscVDebugInterface.hpp" #include "src/Targets/RiscV/RiscVGeneric.hpp" +#include "src/Targets/RiscV/Registers/RegisterNumbers.hpp" #include "src/Targets/RiscV/Registers/DebugControlStatusRegister.hpp" #include "src/Targets/RiscV/DebugModule/DebugModule.hpp" @@ -108,7 +109,9 @@ namespace Targets::RiscV Registers::DebugControlStatusRegister readDebugControlStatusRegister(); + RegisterValue readRegister(RegisterNumber number); RegisterValue readRegister(Registers::RegisterNumber number); + void writeRegister(RegisterNumber number, RegisterValue value); void writeRegister(Registers::RegisterNumber number, RegisterValue value); void writeDebugModuleControlRegister(const DebugModule::Registers::ControlRegister& controlRegister); diff --git a/src/Targets/RiscV/RiscVGeneric.hpp b/src/Targets/RiscV/RiscVGeneric.hpp index 65369726..c6c09b91 100644 --- a/src/Targets/RiscV/RiscVGeneric.hpp +++ b/src/Targets/RiscV/RiscVGeneric.hpp @@ -2,11 +2,10 @@ #include -#include "Registers/RegisterNumbers.hpp" - namespace Targets::RiscV { using RegisterValue = std::uint32_t; + using RegisterNumber = std::uint16_t; enum class PrivilegeMode: std::uint8_t {