Nav 9b60bb5682 Updated memory segment access values for AVR flash segments

2024-12-24 19:38:04 +00:00

..

Exceptions

Massive refactor to accommodate RISC-V targets

2024-07-23 21:14:22 +01:00

OpcodeDecoder

Massive refactor to accommodate RISC-V targets

2024-07-23 21:14:22 +01:00

Avr8.cpp

Updated memory segment access values for AVR flash segments

2024-12-24 19:38:04 +00:00

Avr8.hpp

Help text for target driver passthrough commands

2024-12-16 21:37:24 +00:00

Avr8TargetConfig.cpp

Changed all bloom.yaml config keys/values to use snake_casing

2024-11-28 21:44:04 +00:00

Avr8TargetConfig.hpp

Moved reserveSteppingBreakpoint AVR8 config param to more generic TargetConfig struct

2024-10-06 17:09:06 +01:00

Family.hpp

Massive refactor to accommodate RISC-V targets

2024-07-23 21:14:22 +01:00

Fuse.hpp

Massive refactor to accommodate RISC-V targets

2024-07-23 21:14:22 +01:00

GpioPadDescriptor.hpp

Updated application to code to accomodate changes to TDF format (new pad elements and changes to variant elements)

2024-08-16 23:02:35 +01:00

IspParameters.cpp

Massive refactor to accommodate RISC-V targets

2024-07-23 21:14:22 +01:00

IspParameters.hpp

Massive refactor to accommodate RISC-V targets

2024-07-23 21:14:22 +01:00

ProgramMemorySection.hpp

Massive refactor to accommodate RISC-V targets

2024-07-23 21:14:22 +01:00

ProgrammingSession.hpp

Massive refactor to accommodate RISC-V targets

2024-07-23 21:14:22 +01:00

TargetDescriptionFile.cpp

WCH RISC-V software breakpoints, and a few other bits of refactoring/tidying

2024-12-05 23:09:01 +00:00

TargetDescriptionFile.hpp

WCH RISC-V software breakpoints, and a few other bits of refactoring/tidying

2024-12-05 23:09:01 +00:00

TargetSignature.hpp

Tidying

2024-10-06 18:10:02 +01:00