Files
BloomPatched/src/Targets/RiscV/RiscVTargetConfig.cpp
Nav 6cdbfbe950 Massive refactor to accommodate RISC-V targets
- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here
2024-07-23 21:14:22 +01:00

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#include "RiscVTargetConfig.hpp"
namespace Targets::RiscV
{
RiscVTargetConfig::RiscVTargetConfig(const TargetConfig& targetConfig)
: TargetConfig(targetConfig)
{}
}