1420 lines
103 KiB
XML
1420 lines
103 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<target-description-file>
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<variants>
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<variant ordercode="ATmega32C1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
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package="TQFP32" vccmin="2.7" vccmax="5.5"/>
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<variant ordercode="ATmega32C1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
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package="QFN32" vccmin="2.7" vccmax="5.5"/>
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</variants>
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<device name="ATmega32C1" architecture="AVR8" family="megaAVR">
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<address-spaces>
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<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
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<memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
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pagesize="0x80"/>
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<memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
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pagesize="0x80"/>
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<memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
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pagesize="0x80"/>
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<memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
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pagesize="0x80"/>
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<memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
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pagesize="0x80"/>
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</address-space>
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<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
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<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
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</address-space>
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<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
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<memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
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</address-space>
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<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
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<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
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</address-space>
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<address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
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<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
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<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
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<memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
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</address-space>
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<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
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<memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
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pagesize="0x04"/>
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</address-space>
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<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
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<address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
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<memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
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</address-space>
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</address-spaces>
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<peripherals>
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<module name="PORT">
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<instance name="PORTB" caption="I/O Port">
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<signals>
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<signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
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<signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
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<signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
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<signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
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<signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
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<signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
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<signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
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<signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
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</signals>
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</instance>
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<instance name="PORTC" caption="I/O Port">
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<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<signals>
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<signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
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<signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
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<signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
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<signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
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<signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
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<signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
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<signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
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<signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
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</signals>
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</instance>
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<instance name="PORTD" caption="I/O Port">
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<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<signals>
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<signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
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<signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
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<signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
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<signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
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<signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
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<signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
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<signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
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<signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
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</signals>
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</instance>
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<instance name="PORTE" caption="I/O Port">
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<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
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caption="I/O Port"/>
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<signals>
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<signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
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<signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
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<signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
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</signals>
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</instance>
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</module>
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<module name="CAN">
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<instance name="CAN" caption="Controller Area Network">
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<register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
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caption="Controller Area Network"/>
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</instance>
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</module>
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<module name="AC">
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<instance name="AC" caption="Analog Comparator">
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<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
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caption="Analog Comparator"/>
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<signals>
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<signal function="AC" group="ACMP" index="0" pad="PD7"/>
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<signal function="AC" group="ACMP" index="1" pad="PC6"/>
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<signal function="AC" group="ACMP" index="2" pad="PD5"/>
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<signal function="AC" group="ACMP" index="3" pad="PC5"/>
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<signal function="AC" group="ACMPN" index="0" pad="PB2"/>
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<signal function="AC" group="ACMPN" index="1" pad="PB5"/>
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<signal function="AC" group="ACMPN" index="2" pad="PD6"/>
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<signal function="AC" group="ACMPN" index="3" pad="PC4"/>
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</signals>
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</instance>
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</module>
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<module name="DAC">
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<instance name="DAC" caption="Digital-to-Analog Converter">
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<register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
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caption="Digital-to-Analog Converter"/>
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<signals>
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<signal function="DAC" group="D2A" pad="PC7"/>
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</signals>
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</instance>
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</module>
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<module name="CPU">
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<instance name="CPU" caption="CPU Registers">
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
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caption="CPU Registers"/>
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<parameters>
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<param name="CORE_VERSION" value="V2E"/>
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</parameters>
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</instance>
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</module>
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<module name="TC8">
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<instance name="TC0" caption="Timer/Counter, 8-bit">
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
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caption="Timer/Counter, 8-bit"/>
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<signals>
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<signal function="TC0" group="T0" pad="PC2"/>
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<signal function="TC0" group="OC0A" pad="PD3"/>
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<signal function="TC0" group="OC0B" pad="PE1"/>
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</signals>
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</instance>
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</module>
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<module name="TC16">
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<instance name="TC1" caption="Timer/Counter, 16-bit">
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<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
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caption="Timer/Counter, 16-bit"/>
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<signals>
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<signal function="TC1" group="T1" pad="PC3"/>
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<signal function="TC1" group="ICP1A" pad="PD4"/>
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<signal function="TC1" group="ICP1B" pad="PC3"/>
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<signal function="TC1" group="OC1A" pad="PD2"/>
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<signal function="TC1" group="OC1B" pad="PC1"/>
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</signals>
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</instance>
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</module>
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<module name="ADC">
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<instance name="ADC" caption="Analog-to-Digital Converter">
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
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caption="Analog-to-Digital Converter"/>
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<signals>
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<signal function="ADC" group="ADC" index="0" pad="PE2"/>
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<signal function="ADC" group="ADC" index="1" pad="PD4"/>
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<signal function="ADC" group="ADC" index="2" pad="PD5"/>
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<signal function="ADC" group="ADC" index="3" pad="PD6"/>
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<signal function="ADC" group="ADC" index="4" pad="PB7"/>
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<signal function="ADC" group="ADC" index="5" pad="PB2"/>
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<signal function="ADC" group="ADC" index="6" pad="PB5"/>
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<signal function="ADC" group="ADC" index="7" pad="PB6"/>
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<signal function="ADC" group="ADC" index="8" pad="PC4"/>
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<signal function="ADC" group="ADC" index="9" pad="PC5"/>
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<signal function="ADC" group="ADC" index="10" pad="PC6"/>
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</signals>
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</instance>
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</module>
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<module name="LINUART">
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<instance name="LINUART" caption="Local Interconnect Network">
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<register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
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caption="Local Interconnect Network"/>
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<signals>
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<signal function="LIN" group="TXLIN" pad="PD3"/>
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<signal function="LIN" group="RXLIN" pad="PD4"/>
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</signals>
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</instance>
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</module>
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<module name="SPI">
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<instance name="SPI" caption="Serial Peripheral Interface">
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<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
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caption="Serial Peripheral Interface"/>
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<signals>
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<signal function="SPI" group="MISO" pad="PB0"/>
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<signal function="SPI_ALT" group="MISO" pad="PD2"/>
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<signal function="SPI" group="MOSI" pad="PB1"/>
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<signal function="SPI_ALT" group="MOSI" pad="PD3"/>
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<signal function="SPI" group="SCK" pad="PB7"/>
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<signal function="SPI_ALT" group="SCK" pad="PD4"/>
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<signal function="SPI" group="SS" pad="PD3"/>
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<signal function="SPI_ALT" group="SS" pad="PC1"/>
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</signals>
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</instance>
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</module>
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<module name="WDT">
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<instance name="WDT" caption="Watchdog Timer">
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
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caption="Watchdog Timer"/>
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</instance>
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</module>
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<module name="EXINT">
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<instance name="EXINT" caption="External Interrupts">
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
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caption="External Interrupts"/>
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<signals>
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<signal function="EXINT" group="INT" index="0" pad="PD6"/>
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<signal function="EXINT" group="INT" index="1" pad="PB2"/>
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<signal function="EXINT" group="INT" index="2" pad="PB5"/>
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<signal function="EXINT" group="INT" index="3" pad="PC0"/>
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<signal function="EXINT" group="PCINT" index="0" pad="PB0"/>
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<signal function="EXINT" group="PCINT" index="1" pad="PB1"/>
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<signal function="EXINT" group="PCINT" index="2" pad="PB2"/>
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<signal function="EXINT" group="PCINT" index="3" pad="PB3"/>
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<signal function="EXINT" group="PCINT" index="4" pad="PB4"/>
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<signal function="EXINT" group="PCINT" index="5" pad="PB5"/>
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<signal function="EXINT" group="PCINT" index="6" pad="PB6"/>
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<signal function="EXINT" group="PCINT" index="7" pad="PB7"/>
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<signal function="EXINT" group="PCINT" index="8" pad="PC0"/>
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<signal function="EXINT" group="PCINT" index="9" pad="PC1"/>
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<signal function="EXINT" group="PCINT" index="10" pad="PC2"/>
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<signal function="EXINT" group="PCINT" index="11" pad="PC3"/>
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<signal function="EXINT" group="PCINT" index="12" pad="PC4"/>
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<signal function="EXINT" group="PCINT" index="13" pad="PC5"/>
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<signal function="EXINT" group="PCINT" index="14" pad="PC6"/>
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<signal function="EXINT" group="PCINT" index="15" pad="PC7"/>
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<signal function="EXINT" group="PCINT" index="16" pad="PD0"/>
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<signal function="EXINT" group="PCINT" index="17" pad="PD1"/>
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<signal function="EXINT" group="PCINT" index="18" pad="PD2"/>
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<signal function="EXINT" group="PCINT" index="19" pad="PD3"/>
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<signal function="EXINT" group="PCINT" index="20" pad="PD4"/>
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<signal function="EXINT" group="PCINT" index="21" pad="PD5"/>
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<signal function="EXINT" group="PCINT" index="22" pad="PD6"/>
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<signal function="EXINT" group="PCINT" index="23" pad="PD7"/>
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<signal function="EXINT" group="PCINT" index="24" pad="PE0"/>
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<signal function="EXINT" group="PCINT" index="25" pad="PE1"/>
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<signal function="EXINT" group="PCINT" index="26" pad="PE2"/>
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</signals>
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</instance>
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</module>
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<module name="EEPROM">
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<instance name="EEPROM" caption="EEPROM">
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
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caption="EEPROM"/>
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</instance>
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</module>
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<module name="FUSE">
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<instance name="FUSE" caption="Fuses">
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<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
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caption="Fuses"/>
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</instance>
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</module>
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<module name="LOCKBIT">
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<instance name="LOCKBIT" caption="Lockbits">
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
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caption="Lockbits"/>
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</instance>
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</module>
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</peripherals>
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<interrupts>
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<interrupt index="0" name="RESET"
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caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
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<interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
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<interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
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<interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
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<interrupt index="4" name="ANACOMP3" caption="Analog Comparator 3"/>
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<interrupt index="5" name="PSC_FAULT" caption="PSC Fault"/>
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<interrupt index="6" name="PSC_EC" caption="PSC End of Cycle"/>
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<interrupt index="7" name="INT0" caption="External Interrupt Request 0"/>
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<interrupt index="8" name="INT1" caption="External Interrupt Request 1"/>
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<interrupt index="9" name="INT2" caption="External Interrupt Request 2"/>
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<interrupt index="10" name="INT3" caption="External Interrupt Request 3"/>
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<interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
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<interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
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<interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
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<interrupt index="14" name="TIMER1_OVF" caption="Timer1/Counter1 Overflow"/>
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<interrupt index="15" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
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<interrupt index="16" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
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<interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
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<interrupt index="18" name="CAN_INT" caption="CAN MOB, Burst, General Errors"/>
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<interrupt index="19" name="CAN_TOVF" caption="CAN Timer Overflow"/>
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<interrupt index="20" name="LIN_TC" caption="LIN Transfer Complete"/>
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<interrupt index="21" name="LIN_ERR" caption="LIN Error"/>
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<interrupt index="22" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
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<interrupt index="23" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
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<interrupt index="24" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
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<interrupt index="25" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
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<interrupt index="26" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
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<interrupt index="27" name="ADC" caption="ADC Conversion Complete"/>
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<interrupt index="28" name="WDT" caption="Watchdog Time-Out Interrupt"/>
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<interrupt index="29" name="EE_READY" caption="EEPROM Ready"/>
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<interrupt index="30" name="SPM_READY" caption="Store Program Memory Read"/>
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</interrupts>
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<interfaces>
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<interface name="ISP" type="isp"/>
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<interface name="HVPP" type="hvpp"/>
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<interface name="debugWIRE" type="dw"/>
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</interfaces>
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<property-groups>
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<property-group name="SIGNATURES">
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<property name="JTAGID" value="0x9586"/>
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<property name="SIGNATURE0" value="0x1e"/>
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<property name="SIGNATURE1" value="0x95"/>
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<property name="SIGNATURE2" value="0x86"/>
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</property-group>
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<property-group name="OCD">
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<property name="OCD_REVISION" value="1"/>
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<property name="OCD_DATAREG" value="0x31"/>
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<property name="PROGBASE" value="0x0000"/>
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</property-group>
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<property-group name="JTAG_INTERFACE">
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<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
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</property-group>
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<property-group name="ISP_INTERFACE">
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<property name="IspEnterProgMode_timeout" value="200"/>
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<property name="IspEnterProgMode_stabDelay" value="100"/>
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<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
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<property name="IspEnterProgMode_synchLoops" value="32"/>
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<property name="IspEnterProgMode_byteDelay" value="0"/>
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<property name="IspEnterProgMode_pollIndex" value="3"/>
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<property name="IspEnterProgMode_pollValue" value="0x53"/>
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<property name="IspLeaveProgMode_preDelay" value="1"/>
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<property name="IspLeaveProgMode_postDelay" value="1"/>
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<property name="IspChipErase_eraseDelay" value="45"/>
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<property name="IspChipErase_pollMethod" value="1"/>
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<property name="IspProgramFlash_mode" value="0x41"/>
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<property name="IspProgramFlash_blockSize" value="128"/>
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<property name="IspProgramFlash_delay" value="10"/>
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<property name="IspProgramFlash_cmd1" value="0x40"/>
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<property name="IspProgramFlash_cmd2" value="0x4C"/>
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<property name="IspProgramFlash_cmd3" value="0x00"/>
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<property name="IspProgramFlash_pollVal1" value="0x00"/>
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<property name="IspProgramFlash_pollVal2" value="0x00"/>
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<property name="IspProgramEeprom_mode" value="0x41"/>
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|
<property name="IspProgramEeprom_blockSize" value="4"/>
|
|
<property name="IspProgramEeprom_delay" value="10"/>
|
|
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
|
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
|
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
|
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
|
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
|
<property name="IspReadFlash_blockSize" value="256"/>
|
|
<property name="IspReadEeprom_blockSize" value="256"/>
|
|
<property name="IspReadFuse_pollIndex" value="4"/>
|
|
<property name="IspReadLock_pollIndex" value="4"/>
|
|
<property name="IspReadSign_pollIndex" value="4"/>
|
|
<property name="IspReadOsccal_pollIndex" value="4"/>
|
|
</property-group>
|
|
<property-group name="PP_INTERFACE">
|
|
<property name="PpControlStack"
|
|
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
|
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
|
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
|
<property name="PpEnterProgMode_latchCycles" value="5"/>
|
|
<property name="PpEnterProgMode_toggleVtg" value="1"/>
|
|
<property name="PpEnterProgMode_powerOffDelay" value="15"/>
|
|
<property name="PpEnterProgMode_resetDelayMs" value="1"/>
|
|
<property name="PpEnterProgMode_resetDelayUs" value="0"/>
|
|
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
|
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
|
<property name="PpChipErase_pulseWidth" value="0"/>
|
|
<property name="PpChipErase_pollTimeout" value="10"/>
|
|
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
|
<property name="PpProgramFlash_mode" value="0x0F"/>
|
|
<property name="PpProgramFlash_blockSize" value="256"/>
|
|
<property name="PpReadFlash_blockSize" value="256"/>
|
|
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
|
<property name="PpProgramEeprom_mode" value="0x05"/>
|
|
<property name="PpProgramEeprom_blockSize" value="256"/>
|
|
<property name="PpReadEeprom_blockSize" value="256"/>
|
|
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
|
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
|
<property name="PpProgramLock_pulseWidth" value="0"/>
|
|
<property name="PpProgramLock_pollTimeout" value="5"/>
|
|
</property-group>
|
|
<property-group name="ISP_INTERFACE_STK600">
|
|
<property name="IspEnterProgMode_timeout" value="200"/>
|
|
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
|
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
|
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
|
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
|
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
|
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
|
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
|
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
|
<property name="IspChipErase_eraseDelay" value="45"/>
|
|
<property name="IspChipErase_pollMethod" value="1"/>
|
|
<property name="IspProgramFlash_mode" value="0x41"/>
|
|
<property name="IspProgramFlash_blockSize" value="64"/>
|
|
<property name="IspProgramFlash_delay" value="6"/>
|
|
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
|
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
|
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
|
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
|
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
|
<property name="IspProgramEeprom_mode" value="0x41"/>
|
|
<property name="IspProgramEeprom_blockSize" value="4"/>
|
|
<property name="IspProgramEeprom_delay" value="5"/>
|
|
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
|
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
|
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
|
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
|
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
|
<property name="IspReadFlash_blockSize" value="256"/>
|
|
<property name="IspReadEeprom_blockSize" value="256"/>
|
|
<property name="IspReadFuse_pollIndex" value="4"/>
|
|
<property name="IspReadLock_pollIndex" value="4"/>
|
|
<property name="IspReadSign_pollIndex" value="4"/>
|
|
<property name="IspReadOsccal_pollIndex" value="4"/>
|
|
</property-group>
|
|
<property-group name="PP_INTERFACE_STK600">
|
|
<property name="PpControlStack"
|
|
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
|
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
|
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
|
<property name="PpEnterProgMode_latchCycles" value="5"/>
|
|
<property name="PpEnterProgMode_toggleVtg" value="1"/>
|
|
<property name="PpEnterProgMode_powerOffDelay" value="15"/>
|
|
<property name="PpEnterProgMode_resetDelayMs" value="1"/>
|
|
<property name="PpEnterProgMode_resetDelayUs" value="0"/>
|
|
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
|
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
|
<property name="PpChipErase_pulseWidth" value="0"/>
|
|
<property name="PpChipErase_pollTimeout" value="10"/>
|
|
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
|
<property name="PpProgramFlash_mode" value="0x0F"/>
|
|
<property name="PpProgramFlash_blockSize" value="256"/>
|
|
<property name="PpReadFlash_blockSize" value="256"/>
|
|
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
|
<property name="PpProgramEeprom_mode" value="0x05"/>
|
|
<property name="PpProgramEeprom_blockSize" value="256"/>
|
|
<property name="PpReadEeprom_blockSize" value="256"/>
|
|
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
|
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
|
<property name="PpProgramLock_pulseWidth" value="0"/>
|
|
<property name="PpProgramLock_pollTimeout" value="5"/>
|
|
</property-group>
|
|
</property-groups>
|
|
</device>
|
|
<modules>
|
|
<module caption="Fuses" name="FUSE">
|
|
<register-group caption="Fuses" name="FUSE">
|
|
<register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
|
|
<bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
|
|
<bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
|
|
<bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
|
|
<bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
|
|
values="ENUM_BODLEVEL"/>
|
|
</register>
|
|
<register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
|
|
<bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
|
|
<bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
|
|
<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
|
|
<bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
|
|
<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
|
|
<bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
|
|
<bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
|
|
</register>
|
|
<register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
|
|
<bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
|
|
<bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
|
|
<bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ENUM_SUT_CKSEL">
|
|
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
|
|
value="0x00"/>
|
|
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
|
|
value="0x10"/>
|
|
<value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
|
|
value="0x20"/>
|
|
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
|
|
name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
|
|
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
|
|
name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
|
|
<value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
|
|
name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
|
|
name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
|
|
name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
|
|
name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
|
|
name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
|
|
name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
|
name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
|
|
name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
|
|
name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
|
|
<value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
|
|
name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
|
|
<value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
|
|
name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
|
|
<value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
|
|
name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
|
|
<value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
|
|
name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
|
|
<value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
|
|
name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
|
|
<value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
|
|
name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
|
|
<value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
|
|
name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
|
|
<value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
|
|
name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
|
|
<value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
|
|
name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
|
|
<value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
|
|
name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
|
|
<value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
|
|
name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
|
|
<value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
|
|
name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
|
|
<value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
|
|
name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
|
|
<value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
|
|
name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
|
|
<value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
|
|
name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
|
|
</value-group>
|
|
<value-group caption="" name="ENUM_BODLEVEL">
|
|
<value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
|
|
<value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
|
|
<value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
|
|
<value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
|
|
<value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
|
|
<value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
|
|
<value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
|
|
<value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
|
|
</value-group>
|
|
<value-group caption="" name="ENUM_BOOTSZ">
|
|
<value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
|
|
<value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
|
|
<value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
|
|
<value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Lockbits" name="LOCKBIT">
|
|
<register-group caption="Lockbits" name="LOCKBIT">
|
|
<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
|
|
<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
|
|
<bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
|
|
<bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ENUM_LB">
|
|
<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
|
|
<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
|
|
<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="ENUM_BLB">
|
|
<value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
|
<value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
|
|
<value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
|
|
<value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="ENUM_BLB2">
|
|
<value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
|
<value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
|
|
<value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
|
|
<value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="I/O Port" name="PORT">
|
|
<register-group caption="I/O Port" name="PORTB">
|
|
<register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
|
|
<register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
|
|
<register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTC">
|
|
<register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
|
|
<register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
|
|
<register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTD">
|
|
<register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
|
|
<register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
|
|
<register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTE">
|
|
<register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
|
|
<register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
|
|
<register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
|
|
</register-group>
|
|
</module>
|
|
<module caption="Controller Area Network" name="CAN">
|
|
<register-group caption="Controller Area Network" name="CAN">
|
|
<register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
|
|
<bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
|
|
<bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
|
|
<bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
|
|
<bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
|
|
<bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
|
|
<bitfield caption="Test Mode" mask="0x04" name="TEST"/>
|
|
<bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
|
|
<bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
|
|
</register>
|
|
<register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
|
|
<bitfield caption="Overload Frame Flag" mask="0x40" name="OVFG"/>
|
|
<bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
|
|
<bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
|
|
<bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
|
|
<bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
|
|
<bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
|
|
</register>
|
|
<register caption="CAN General Interrupt Register Flags" name="CANGIT" offset="0xDA" size="1">
|
|
<bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
|
|
<bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
|
|
<bitfield caption="Overrun CAN Timer Flag" mask="0x20" name="OVRTIM"/>
|
|
<bitfield caption="Burst Receive Interrupt Flag" mask="0x10" name="BXOK"/>
|
|
<bitfield caption="Stuff Error General Flag" mask="0x08" name="SERG"/>
|
|
<bitfield caption="CRC Error General Flag" mask="0x04" name="CERG"/>
|
|
<bitfield caption="Form Error General Flag" mask="0x02" name="FERG"/>
|
|
<bitfield caption="Ackknowledgement Error General Flag" mask="0x01" name="AERG"/>
|
|
</register>
|
|
<register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
|
|
<bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
|
|
<bitfield caption="Enable Bus Off Interrupt" mask="0x40" name="ENBOFF"/>
|
|
<bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
|
|
<bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
|
|
<bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
|
|
<bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
|
|
<bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
|
|
<bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
|
|
</register>
|
|
<register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
|
|
<bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
|
|
</register>
|
|
<register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
|
|
ocd-rw=""/>
|
|
<register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
|
|
<bitfield caption="Interrupt Enable MObs" mask="0x3F" name="IEMOB"/>
|
|
</register>
|
|
<register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
|
|
mask="0x00" ocd-rw=""/>
|
|
<register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
|
|
ocd-rw="R">
|
|
<bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
|
|
</register>
|
|
<register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
|
|
mask="0x00" ocd-rw=""/>
|
|
<register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
|
|
<bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
|
|
</register>
|
|
<register caption="CAN Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
|
|
<bitfield caption="Re-Sync Jump Width bits" mask="0x60" name="SJW"/>
|
|
<bitfield caption="Propagation Time Segment bits" mask="0x0E" name="PRS"/>
|
|
</register>
|
|
<register caption="CAN Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
|
|
<bitfield caption="Phase Segment 2 bits" mask="0x70" name="PHS2"/>
|
|
<bitfield caption="Phase Segment 1 bits" mask="0x0E" name="PHS1"/>
|
|
<bitfield caption="Sample Type" mask="0x01" name="SMP"/>
|
|
</register>
|
|
<register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF" ocd-rw="">
|
|
<bitfield caption="Timer Control bits" mask="0xFF" name="TPRSC"/>
|
|
</register>
|
|
<register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" mask="0xFFFF" ocd-rw="">
|
|
<bitfield caption="CAN Timer bits" mask="0xFFFF" name="CANTIM"/>
|
|
</register>
|
|
<register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw="">
|
|
<bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
|
|
</register>
|
|
<register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
|
|
ocd-rw="">
|
|
<bitfield caption="Transmit Error Counter bits" mask="0xFF" name="TEC"/>
|
|
</register>
|
|
<register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
|
|
ocd-rw="">
|
|
<bitfield caption="Receive Error Counter bits" mask="0xFF" name="REC"/>
|
|
</register>
|
|
<register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
|
|
<bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
|
|
<bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
|
|
</register>
|
|
<register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
|
|
<bitfield caption="MOb Number bits" mask="0xF0" name="MOBNB"/>
|
|
<bitfield caption="MOb Data Buffer Auto Increment (Active Low)" mask="0x08" name="AINC"/>
|
|
<bitfield caption="Data Buffer Index bits" mask="0x07" name="INDX"/>
|
|
</register>
|
|
<register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
|
|
<bitfield caption="Data Length Code Warning on MOb" mask="0x80" name="DLCW"/>
|
|
<bitfield caption="Transmit OK on MOb" mask="0x40" name="TXOK"/>
|
|
<bitfield caption="Receive OK on MOb" mask="0x20" name="RXOK"/>
|
|
<bitfield caption="Bit Error on MOb" mask="0x10" name="BERR"/>
|
|
<bitfield caption="Stuff Error on MOb" mask="0x08" name="SERR"/>
|
|
<bitfield caption="CRC Error on MOb" mask="0x04" name="CERR"/>
|
|
<bitfield caption="Form Error on MOb" mask="0x02" name="FERR"/>
|
|
<bitfield caption="Ackknowledgement Error on MOb" mask="0x01" name="AERR"/>
|
|
</register>
|
|
<register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
|
|
<bitfield caption="MOb Config bits" mask="0xC0" name="CONMOB"/>
|
|
<bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
|
|
<bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
|
|
<bitfield caption="Data Length Code bits" mask="0x0F" name="DLC"/>
|
|
</register>
|
|
<register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1">
|
|
<bitfield caption="Identifier Tag" mask="0xF8" name="IDT"/>
|
|
<bitfield caption="Remote Transmission Request Tag" mask="0x04" name="RTRTAG"/>
|
|
<bitfield caption="Reserved Bit 1 Tag" mask="0x02" name="RB1TAG"/>
|
|
<bitfield caption="Reserved Bit 0 Tag" mask="0x01" name="RB0TAG"/>
|
|
</register>
|
|
<register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF">
|
|
<bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="5"/>
|
|
</register>
|
|
<register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF">
|
|
<bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="13"/>
|
|
</register>
|
|
<register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF">
|
|
<bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="21"/>
|
|
</register>
|
|
<register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1" mask="0xFD">
|
|
<bitfield caption="Identifier Extension Mask" mask="0x01" name="IDEMSK"/>
|
|
<bitfield caption="Remote Transmission Request Mask" mask="0x04" name="RTRMSK"/>
|
|
<bitfield caption="Identifier Mask" mask="0xF8" name="IDMSK"/>
|
|
</register>
|
|
<register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1" mask="0xFF">
|
|
<bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="5"/>
|
|
</register>
|
|
<register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1" mask="0xFF">
|
|
<bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="13"/>
|
|
</register>
|
|
<register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1" mask="0xFF">
|
|
<bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="21"/>
|
|
</register>
|
|
<register caption="Time Stamp Register" name="CANSTM" offset="0xF8" size="2" mask="0xFFFF">
|
|
<bitfield caption="TIMSTM" mask="0xFFFF" name="TIMSTM"/>
|
|
</register>
|
|
<register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF">
|
|
<bitfield caption="Message Data bits" mask="0xFF" name="MSG"/>
|
|
</register>
|
|
</register-group>
|
|
</module>
|
|
<module caption="Analog Comparator" name="AC">
|
|
<register-group caption="Analog Comparator" name="AC">
|
|
<register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
|
|
<bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
|
|
<bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
|
|
<bitfield caption="Analog Comparator 0 Interrupt Select Bits" mask="0x30" name="AC0IS"/>
|
|
<bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
|
|
<bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
|
|
</register>
|
|
<register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
|
|
<bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
|
|
<bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
|
|
<bitfield caption="Analog Comparator 1 Interrupt Select Bit" mask="0x30" name="AC1IS"
|
|
values="ANALOG_COMP_INTERRUPT"/>
|
|
<bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
|
|
<bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
|
|
</register>
|
|
<register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
|
|
<bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
|
|
<bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
|
|
<bitfield caption="Analog Comparator 2 Interrupt Select Bit" mask="0x30" name="AC2IS"
|
|
values="ANALOG_COMP_INTERRUPT"/>
|
|
<bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
|
|
</register>
|
|
<register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
|
|
<bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
|
|
<bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
|
|
<bitfield caption="Analog Comparator 3 Interrupt Select Bit" mask="0x30" name="AC3IS"
|
|
values="ANALOG_COMP_INTERRUPT"/>
|
|
<bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
|
|
</register>
|
|
<register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
|
|
<bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
|
|
<bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
|
|
<bitfield caption="Analog Comparator 1 Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
|
|
<bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
|
|
<bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
|
|
<bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
|
|
<bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
|
|
<bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ANALOG_COMP_INTERRUPT">
|
|
<value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Reserved" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Digital-to-Analog Converter" name="DAC">
|
|
<register-group caption="Digital-to-Analog Converter" name="DAC">
|
|
<register caption="DAC Data Register" name="DAC" offset="0x91" size="2" ocd-rw="">
|
|
<bitfield caption="DAC Data Register High Byte Bits" mask="0xFF00" name="DACH"/>
|
|
<bitfield caption="DAC Data Register Low Byte Bits" mask="0x00FF" name="DACL"/>
|
|
</register>
|
|
<register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
|
|
<bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
|
|
<bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
|
|
values="ANALOG_DAC_AUTO_TRIGGER"/>
|
|
<bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
|
|
<bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
|
|
<bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
|
|
<value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
|
|
<value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="CPU Registers" name="CPU">
|
|
<register-group caption="CPU Registers" name="CPU">
|
|
<register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
|
|
<bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
|
|
<bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
|
|
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
|
<bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
|
|
<bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
|
|
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
|
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
|
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
|
</register>
|
|
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
|
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
|
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
|
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
|
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
|
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
|
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
|
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
|
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
|
</register>
|
|
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
|
|
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
|
<bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
|
|
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
|
<bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
|
|
<bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
|
|
</register>
|
|
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
|
|
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
|
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
|
|
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
|
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
|
</register>
|
|
<register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
|
|
ocd-rw="R">
|
|
<bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
|
|
</register>
|
|
<register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
|
<bitfield caption="" mask="0x80" name="CLKPCE"/>
|
|
<bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
|
</register>
|
|
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
|
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
|
|
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
|
</register>
|
|
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
|
|
<bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
|
|
</register>
|
|
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
|
|
<bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
|
|
</register>
|
|
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
|
|
<bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
|
|
<bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
|
|
<bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
|
|
<bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
|
|
<bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
|
|
<bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
|
|
<bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
|
|
<bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
|
|
</register>
|
|
<register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
|
|
<bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
|
|
<bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
|
|
<bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
|
|
</register>
|
|
<register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
|
|
<bitfield caption="Power Reduction CAN" mask="0x40" name="PRCAN"/>
|
|
<bitfield caption="Power Reduction PSC" mask="0x20" name="PRPSC"/>
|
|
<bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
|
|
<bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
|
|
<bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
|
|
<bitfield caption="Power Reduction LIN UART" mask="0x02" name="PRLIN"/>
|
|
<bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
|
|
<value caption="1" name="VAL_0x00" value="0x00"/>
|
|
<value caption="2" name="VAL_0x01" value="0x01"/>
|
|
<value caption="4" name="VAL_0x02" value="0x02"/>
|
|
<value caption="8" name="VAL_0x03" value="0x03"/>
|
|
<value caption="16" name="VAL_0x04" value="0x04"/>
|
|
<value caption="32" name="VAL_0x05" value="0x05"/>
|
|
<value caption="64" name="VAL_0x06" value="0x06"/>
|
|
<value caption="128" name="VAL_0x07" value="0x07"/>
|
|
<value caption="256" name="VAL_0x08" value="0x08"/>
|
|
</value-group>
|
|
<value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
|
|
<value caption="Idle" name="IDLE" value="0x00"/>
|
|
<value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
|
|
<value caption="Power Down" name="PDOWN" value="0x02"/>
|
|
<value caption="Reserved" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Reserved" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Standby" name="STDBY" value="0x06"/>
|
|
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
<value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
|
|
<value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
|
|
</value-group>
|
|
|
|
</module>
|
|
<module caption="Timer/Counter, 8-bit" name="TC8">
|
|
<register-group caption="Timer/Counter, 8-bit" name="TC0">
|
|
<register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
|
<bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
|
|
name="OCIE0B"/>
|
|
<bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
|
|
name="OCIE0A"/>
|
|
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
|
</register>
|
|
<register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
|
ocd-rw="R">
|
|
<bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
|
|
<bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
|
|
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
|
</register>
|
|
<register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
|
|
<bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
|
|
<bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
|
|
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
|
|
</register>
|
|
<register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
|
|
<bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
|
|
<bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
|
|
<bitfield caption="" mask="0x08" name="WGM02"/>
|
|
<bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
|
</register>
|
|
<register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
|
|
<bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
|
|
</register>
|
|
<register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
|
|
mask="0xFF">
|
|
<bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0A"/>
|
|
</register>
|
|
<register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
|
|
mask="0xFF">
|
|
<bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0B"/>
|
|
</register>
|
|
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
|
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
|
<bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
|
|
<bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
|
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Timer/Counter, 16-bit" name="TC16">
|
|
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
|
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
|
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
|
<bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
|
|
name="OCIE1B"/>
|
|
<bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
|
|
name="OCIE1A"/>
|
|
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
|
</register>
|
|
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
|
ocd-rw="R">
|
|
<bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
|
|
<bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
|
|
<bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
|
|
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
|
<bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
|
|
<bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
|
|
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
|
<bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
|
|
<bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
|
|
<bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
|
|
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
|
|
values="CLK_SEL_3BIT_EXT"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
|
|
<bitfield caption="" mask="0x80" name="FOC1A"/>
|
|
<bitfield caption="" mask="0x40" name="FOC1B"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
|
|
<bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
|
|
mask="0xFFFF">
|
|
<bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1A"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
|
|
mask="0xFFFF">
|
|
<bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1B"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
|
mask="0xFFFF">
|
|
<bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
|
|
</register>
|
|
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
|
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
|
<bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
|
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Analog-to-Digital Converter" name="ADC">
|
|
<register-group caption="Analog-to-Digital Converter" name="ADC">
|
|
<register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
|
|
<bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
|
|
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
|
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
|
</register>
|
|
<register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
|
|
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
|
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
|
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
|
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
|
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
|
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
|
|
</register>
|
|
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
|
|
<bitfield caption="ADC Data bits" mask="0x03FF" name="ADC"/>
|
|
</register>
|
|
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
|
<bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
|
|
<bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
|
|
<bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
|
|
<bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
|
|
values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
|
|
</register>
|
|
<register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
|
|
<bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
|
|
<bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
|
|
<bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
|
|
<bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
|
|
<bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
|
|
<bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
|
|
<bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
|
|
<bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
|
|
</register>
|
|
<register caption="Digital Input Disable Register 0" name="DIDR1" offset="0x7F" size="1">
|
|
<bitfield caption="AMP2P Pin Digital input Disable" mask="0x40" name="AMP2PD"/>
|
|
<bitfield caption="ACMP0 Pin Digital input Disable" mask="0x20" name="ACMP0D"/>
|
|
<bitfield caption="AMP0P Pin Digital input Disable" mask="0x10" name="AMP0PD"/>
|
|
<bitfield caption="AMP0N Pin Digital input Disable" mask="0x08" name="AMP0ND"/>
|
|
<bitfield caption="ADC10 Pin Digital input Disable" mask="0x04" name="ADC10D"/>
|
|
<bitfield caption="ADC9 Pin Digital input Disable" mask="0x02" name="ADC9D"/>
|
|
<bitfield caption="ADC8 Pin Digital input Disable" mask="0x01" name="ADC8D"/>
|
|
</register>
|
|
<register caption="" name="AMP0CSR" offset="0x75" size="1">
|
|
<bitfield caption="" mask="0x80" name="AMP0EN"/>
|
|
<bitfield caption="" mask="0x40" name="AMP0IS"/>
|
|
<bitfield caption="" mask="0x30" name="AMP0G"/>
|
|
<bitfield caption="Amplifier 0 - Comparator 0 Connection" mask="0x08" name="AMPCMP0"/>
|
|
<bitfield caption="" mask="0x07" name="AMP0TS"/>
|
|
</register>
|
|
<register caption="" name="AMP1CSR" offset="0x76" size="1">
|
|
<bitfield caption="" mask="0x80" name="AMP1EN"/>
|
|
<bitfield caption="" mask="0x40" name="AMP1IS"/>
|
|
<bitfield caption="" mask="0x30" name="AMP1G"/>
|
|
<bitfield caption="Amplifier 1 - Comparator 1 Connection" mask="0x08" name="AMPCMP1"/>
|
|
<bitfield caption="" mask="0x07" name="AMP1TS"/>
|
|
</register>
|
|
<register caption="" name="AMP2CSR" offset="0x77" size="1">
|
|
<bitfield caption="" mask="0x80" name="AMP2EN"/>
|
|
<bitfield caption="" mask="0x40" name="AMP2IS"/>
|
|
<bitfield caption="" mask="0x30" name="AMP2G"/>
|
|
<bitfield caption="Amplifier 2 - Comparator 2 Connection" mask="0x08" name="AMPCMP2"/>
|
|
<bitfield caption="" mask="0x07" name="AMP2TS"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ANALOG_ADC_V_REF2">
|
|
<value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
|
|
<value caption="AVCC reference" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Internal 2.56V Voltage Reference" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
|
|
<value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
|
|
<value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
|
|
<value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
|
|
<value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
|
|
<value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
|
|
<value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
|
|
<value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
|
|
</value-group>
|
|
<value-group caption="Analog Channel Selection Bits select" name="ANALOG_ADC_MUXPOS">
|
|
<value caption="ADC input pin 0" name="ADC0" value="0x0"/>
|
|
<value caption="ADC input pin 1" name="ADC1" value="0x1"/>
|
|
<value caption="ADC input pin 2" name="ADC2" value="0x2"/>
|
|
<value caption="ADC input pin 3" name="ADC3" value="0x3"/>
|
|
<value caption="ADC input pin 4" name="ADC4" value="0x4"/>
|
|
<value caption="ADC input pin 5" name="ADC5" value="0x5"/>
|
|
<value caption="ADC input pin 6" name="ADC6" value="0x6"/>
|
|
<value caption="ADC input pin 7" name="ADC7" value="0x7"/>
|
|
<value caption="ADC input pin 8" name="ADC8" value="0x8"/>
|
|
<value caption="ADC input pin 9" name="ADC9" value="0x9"/>
|
|
<value caption="ADC input pin 10" name="ADC10" value="0xA"/>
|
|
<value caption="Temperature sensor" name="TEMPSENSE" value="0xB"/>
|
|
<value caption="Internal VCC / 4" name="VCC4" value="0xC"/>
|
|
<value caption="Current source" name="ISRC" value="0xD"/>
|
|
<value caption="Analog Differential Amplifier 0" name="AMP0" value="0xE"/>
|
|
<value caption="Analog Differential Amplifier 1" name="AMP1" value="0xF"/>
|
|
<value caption="Analog Differential Amplifier 2" name="AMP2" value="0x10"/>
|
|
<value caption="Bandgap" name="BNDGAP" value="0x11"/>
|
|
<value caption="0V (GND)" name="GND" value="0x12"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Local Interconnect Network" name="LINUART">
|
|
<register-group caption="Local Interconnect Network" name="LINUART">
|
|
<register caption="LIN Control Register" name="LINCR" offset="0xC8" size="1">
|
|
<bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
|
|
<bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
|
|
<bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
|
|
<bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
|
|
<bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
|
|
</register>
|
|
<register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xC9" size="1">
|
|
<bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
|
|
<bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
|
|
<bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
|
|
<bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
|
|
<bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
|
|
<bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
|
|
</register>
|
|
<register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xCA" size="1">
|
|
<bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
|
|
<bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
|
|
<bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
|
|
<bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
|
|
</register>
|
|
<register caption="LIN Error Register" name="LINERR" offset="0xCB" size="1" ocd-rw="R">
|
|
<bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
|
|
<bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
|
|
<bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
|
|
<bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
|
|
<bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
|
|
<bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
|
|
<bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
|
|
<bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
|
|
</register>
|
|
<register caption="LIN Bit Timing Register" name="LINBTR" offset="0xCC" size="1">
|
|
<bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
|
|
<bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
|
|
</register>
|
|
<register caption="LIN Baud Rate Register" name="LINBRR" offset="0xCD" size="2">
|
|
<bitfield caption="" mask="0x0FFF" name="LDIV"/>
|
|
</register>
|
|
<register caption="LIN Data Length Register" name="LINDLR" offset="0xCF" size="1">
|
|
<bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
|
|
<bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
|
|
</register>
|
|
<register caption="LIN Identifier Register" name="LINIDR" offset="0xD0" size="1">
|
|
<bitfield caption="Parity bits" mask="0xC0" name="LP"/>
|
|
<bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
|
|
</register>
|
|
<register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xD1" size="1">
|
|
<bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
|
|
<bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
|
|
</register>
|
|
<register caption="LIN Data Register" name="LINDAT" offset="0xD2" size="1">
|
|
<bitfield caption="" mask="0xFF" name="LDATA"/>
|
|
</register>
|
|
</register-group>
|
|
</module>
|
|
<module caption="Serial Peripheral Interface" name="SPI">
|
|
<register-group caption="Serial Peripheral Interface" name="SPI">
|
|
<register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
|
|
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
|
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
|
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
|
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
|
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
|
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
|
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
|
</register>
|
|
<register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
|
|
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
|
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
|
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
|
</register>
|
|
<register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
|
|
<bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
|
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
|
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
|
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
|
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
|
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
|
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
|
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
|
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Watchdog Timer" name="WDT">
|
|
<register-group caption="Watchdog Timer" name="WDT">
|
|
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
|
|
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
|
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
|
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
|
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
|
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
|
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
|
|
<value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
|
|
<value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
|
|
<value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="External Interrupts" name="EXINT">
|
|
<register-group caption="External Interrupts" name="EXINT">
|
|
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
|
<bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
|
|
values="INTERRUPT_SENSE_CONTROL"/>
|
|
<bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
|
|
values="INTERRUPT_SENSE_CONTROL"/>
|
|
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
|
values="INTERRUPT_SENSE_CONTROL"/>
|
|
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
|
values="INTERRUPT_SENSE_CONTROL"/>
|
|
</register>
|
|
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
|
<bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
|
|
</register>
|
|
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
|
<bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
|
|
</register>
|
|
<register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1" ocd-rw="">
|
|
<bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
|
|
</register>
|
|
<register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x6D" size="1" ocd-rw="">
|
|
<bitfield caption="Pin Change Enable Masks" mask="0x07" name="PCINT" lsb="24"/>
|
|
</register>
|
|
<register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6C" size="1" ocd-rw="">
|
|
<bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
|
|
</register>
|
|
<register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6B" size="1" ocd-rw="">
|
|
<bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
|
|
</register>
|
|
<register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6A" size="1" ocd-rw="">
|
|
<bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
|
|
</register>
|
|
<register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="">
|
|
<bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
|
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="EEPROM" name="EEPROM">
|
|
<register-group caption="EEPROM" name="EEPROM">
|
|
<register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
|
|
<bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
|
|
</register>
|
|
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
|
|
<bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
|
|
</register>
|
|
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
|
<bitfield caption="EEPROM Programming mode" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
|
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
|
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
|
|
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
|
|
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="EEP_MODE">
|
|
<value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Erase Only" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Write Only" name="VAL_0x02" value="0x02"/>
|
|
</value-group>
|
|
</module>
|
|
</modules>
|
|
<pinouts>
|
|
<pinout name="TQFPQFN32" caption="TQFPQFN32">
|
|
<pin position="1" pad="PD2"/>
|
|
<pin position="2" pad="PD3"/>
|
|
<pin position="3" pad="PC1"/>
|
|
<pin position="4" pad="VCC"/>
|
|
<pin position="5" pad="GND"/>
|
|
<pin position="6" pad="PC2"/>
|
|
<pin position="7" pad="PC3"/>
|
|
<pin position="8" pad="PB0"/>
|
|
<pin position="9" pad="PB1"/>
|
|
<pin position="10" pad="PE1"/>
|
|
<pin position="11" pad="PE2"/>
|
|
<pin position="12" pad="PD4"/>
|
|
<pin position="13" pad="PD5"/>
|
|
<pin position="14" pad="PD6"/>
|
|
<pin position="15" pad="PD7"/>
|
|
<pin position="16" pad="PB2"/>
|
|
<pin position="17" pad="PC4"/>
|
|
<pin position="18" pad="PC5"/>
|
|
<pin position="19" pad="AVCC"/>
|
|
<pin position="20" pad="AGND"/>
|
|
<pin position="21" pad="AREF"/>
|
|
<pin position="22" pad="PC6"/>
|
|
<pin position="23" pad="PB3"/>
|
|
<pin position="24" pad="PB4"/>
|
|
<pin position="25" pad="PC7"/>
|
|
<pin position="26" pad="PB5"/>
|
|
<pin position="27" pad="PB6"/>
|
|
<pin position="28" pad="PB7"/>
|
|
<pin position="29" pad="PD0"/>
|
|
<pin position="30" pad="PC0"/>
|
|
<pin position="31" pad="PE0"/>
|
|
<pin position="32" pad="PD1"/>
|
|
</pinout>
|
|
</pinouts>
|
|
</target-description-file>
|