1014 lines
72 KiB
XML
1014 lines
72 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<target-description-file>
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<variants>
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<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
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</variants>
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<device name="ATmega325A" architecture="AVR8" family="megaAVR">
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<address-spaces>
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<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
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<memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
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pagesize="0x80"/>
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<memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
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pagesize="0x80"/>
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<memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
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pagesize="0x80"/>
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<memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
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pagesize="0x80"/>
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<memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
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pagesize="0x80"/>
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</address-space>
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<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
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<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
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</address-space>
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<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
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<memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
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</address-space>
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<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
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<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
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</address-space>
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<address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
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<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
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<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
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<memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
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</address-space>
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<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
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<memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
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pagesize="0x04"/>
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</address-space>
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<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
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<address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
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<memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
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</address-space>
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</address-spaces>
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<peripherals>
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<module name="ADC">
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<instance name="ADC" caption="Analog-to-Digital Converter">
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
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caption="Analog-to-Digital Converter"/>
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</instance>
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</module>
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<module name="AC">
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<instance name="AC" caption="Analog Comparator">
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<register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
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caption="Analog Comparator"/>
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</instance>
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</module>
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<module name="USART">
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<instance name="USART0" caption="USART">
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<register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
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caption="USART"/>
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</instance>
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</module>
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<module name="USI">
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<instance name="USI" caption="Universal Serial Interface">
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<register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
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caption="Universal Serial Interface"/>
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</instance>
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</module>
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<module name="SPI">
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<instance name="SPI" caption="Serial Peripheral Interface">
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<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
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caption="Serial Peripheral Interface"/>
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</instance>
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</module>
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<module name="BOOT_LOAD">
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<instance name="BOOT_LOAD" caption="Bootloader">
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<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
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caption="Bootloader"/>
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</instance>
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</module>
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<module name="JTAG">
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<instance name="JTAG" caption="JTAG Interface">
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<register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
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caption="JTAG Interface"/>
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</instance>
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</module>
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<module name="EXINT">
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<instance name="EXINT" caption="External Interrupts">
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
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caption="External Interrupts"/>
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</instance>
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</module>
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<module name="EEPROM">
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<instance name="EEPROM" caption="EEPROM">
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
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caption="EEPROM"/>
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</instance>
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</module>
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<module name="PORT">
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<instance name="PORTA" caption="I/O Port">
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<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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<instance name="PORTB" caption="I/O Port">
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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<instance name="PORTC" caption="I/O Port">
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<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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<instance name="PORTD" caption="I/O Port">
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<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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<instance name="PORTE" caption="I/O Port">
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<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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<instance name="PORTF" caption="I/O Port">
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<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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<instance name="PORTG" caption="I/O Port">
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<register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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</module>
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<module name="TC8">
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<instance name="TC0" caption="Timer/Counter, 8-bit">
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
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caption="Timer/Counter, 8-bit"/>
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</instance>
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</module>
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<module name="TC16">
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<instance name="TC1" caption="Timer/Counter, 16-bit">
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<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
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caption="Timer/Counter, 16-bit"/>
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</instance>
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</module>
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<module name="TC8_ASYNC">
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<instance name="TC2" caption="Timer/Counter, 8-bit Async">
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<register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
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caption="Timer/Counter, 8-bit Async"/>
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</instance>
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</module>
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<module name="WDT">
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<instance name="WDT" caption="Watchdog Timer">
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
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caption="Watchdog Timer"/>
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</instance>
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</module>
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<module name="CPU">
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<instance name="CPU" caption="CPU Registers">
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
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caption="CPU Registers"/>
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<parameters>
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<param name="CORE_VERSION" value="V2E"/>
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</parameters>
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</instance>
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</module>
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<module name="FUSE">
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<instance name="FUSE" caption="Fuses">
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<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
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caption="Fuses"/>
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</instance>
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</module>
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<module name="LOCKBIT">
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<instance name="LOCKBIT" caption="Lockbits">
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
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caption="Lockbits"/>
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</instance>
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</module>
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</peripherals>
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<interrupts>
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<interrupt index="0" name="RESET"
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caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet. "/>
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<interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
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<interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
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<interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
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<interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
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<interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
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<interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
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<interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
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<interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
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<interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
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<interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
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<interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
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<interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
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<interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
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<interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
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<interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
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<interrupt index="16" name="USI_START" caption="USI Start Condition"/>
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<interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
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<interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
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<interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
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<interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
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<interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
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</interrupts>
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<interfaces>
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<interface name="ISP" type="isp"/>
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<interface name="HVPP" type="hvpp"/>
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<interface name="JTAG" type="megajtag"/>
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</interfaces>
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<property-groups>
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<property-group name="SIGNATURES">
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<property name="JTAGID" value="0x0950D03F"/>
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<property name="SIGNATURE0" value="0x1e"/>
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<property name="SIGNATURE1" value="0x95"/>
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<property name="SIGNATURE2" value="0x05"/>
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</property-group>
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<property-group name="OCD">
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<property name="OCD_REVISION" value="3"/>
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<property name="OCD_DATAREG" value="0x31"/>
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<property name="PROGBASE" value="0x0000"/>
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</property-group>
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<property-group name="JTAG_INTERFACE">
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<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
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</property-group>
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<property-group name="ISP_INTERFACE">
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<property name="IspEnterProgMode_timeout" value="200"/>
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<property name="IspEnterProgMode_stabDelay" value="100"/>
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<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
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<property name="IspEnterProgMode_synchLoops" value="32"/>
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<property name="IspEnterProgMode_byteDelay" value="0"/>
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<property name="IspEnterProgMode_pollIndex" value="3"/>
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<property name="IspEnterProgMode_pollValue" value="0x53"/>
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<property name="IspLeaveProgMode_preDelay" value="1"/>
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<property name="IspLeaveProgMode_postDelay" value="1"/>
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<property name="IspChipErase_eraseDelay" value="45"/>
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<property name="IspChipErase_pollMethod" value="1"/>
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<property name="IspProgramFlash_mode" value="0x41"/>
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<property name="IspProgramFlash_blockSize" value="128"/>
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<property name="IspProgramFlash_delay" value="10"/>
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<property name="IspProgramFlash_cmd1" value="0x40"/>
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<property name="IspProgramFlash_cmd2" value="0x4C"/>
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<property name="IspProgramFlash_cmd3" value="0x00"/>
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<property name="IspProgramFlash_pollVal1" value="0x00"/>
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<property name="IspProgramFlash_pollVal2" value="0x00"/>
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<property name="IspProgramEeprom_mode" value="0x41"/>
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<property name="IspProgramEeprom_blockSize" value="4"/>
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<property name="IspProgramEeprom_delay" value="10"/>
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<property name="IspProgramEeprom_cmd1" value="0xC1"/>
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<property name="IspProgramEeprom_cmd2" value="0xC2"/>
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<property name="IspProgramEeprom_cmd3" value="0x00"/>
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<property name="IspProgramEeprom_pollVal1" value="0x00"/>
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<property name="IspProgramEeprom_pollVal2" value="0x00"/>
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<property name="IspReadFlash_blockSize" value="256"/>
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<property name="IspReadEeprom_blockSize" value="256"/>
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<property name="IspReadFuse_pollIndex" value="4"/>
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<property name="IspReadLock_pollIndex" value="4"/>
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<property name="IspReadSign_pollIndex" value="4"/>
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="PP_INTERFACE">
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<property name="PpControlStack"
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value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="6"/>
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<property name="PpEnterProgMode_toggleVtg" value="0"/>
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<property name="PpEnterProgMode_powerOffDelay" value="0"/>
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<property name="PpEnterProgMode_resetDelayMs" value="0"/>
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<property name="PpEnterProgMode_resetDelayUs" value="0"/>
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<property name="PpLeaveProgMode_stabDelay" value="15"/>
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<property name="PpLeaveProgMode_resetDelay" value="15"/>
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<property name="PpChipErase_pulseWidth" value="0"/>
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<property name="PpChipErase_pollTimeout" value="10"/>
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<property name="PpProgramFlash_pollTimeout" value="5"/>
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<property name="PpProgramFlash_mode" value="0x0F"/>
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<property name="PpProgramFlash_blockSize" value="256"/>
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<property name="PpReadFlash_blockSize" value="256"/>
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<property name="PpProgramEeprom_pollTimeout" value="5"/>
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<property name="PpProgramEeprom_mode" value="0x05"/>
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<property name="PpProgramEeprom_blockSize" value="256"/>
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<property name="PpReadEeprom_blockSize" value="256"/>
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<property name="PpProgramFuse_pulseWidth" value="0"/>
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<property name="PpProgramFuse_pollTimeout" value="5"/>
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<property name="PpProgramLock_pulseWidth" value="0"/>
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<property name="PpProgramLock_pollTimeout" value="5"/>
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</property-group>
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<property-group name="ISP_INTERFACE_STK600">
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<property name="IspEnterProgMode_timeout" value="200"/>
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<property name="IspEnterProgMode_stabDelay" value="100"/>
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<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
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<property name="IspEnterProgMode_synchLoops" value="32"/>
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<property name="IspEnterProgMode_byteDelay" value="0"/>
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<property name="IspEnterProgMode_pollIndex" value="3"/>
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<property name="IspEnterProgMode_pollValue" value="0x53"/>
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<property name="IspLeaveProgMode_preDelay" value="1"/>
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<property name="IspLeaveProgMode_postDelay" value="1"/>
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<property name="IspChipErase_eraseDelay" value="45"/>
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<property name="IspChipErase_pollMethod" value="1"/>
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<property name="IspProgramFlash_mode" value="0x41"/>
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<property name="IspProgramFlash_blockSize" value="128"/>
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<property name="IspProgramFlash_delay" value="6"/>
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<property name="IspProgramFlash_cmd1" value="0x40"/>
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<property name="IspProgramFlash_cmd2" value="0x4C"/>
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<property name="IspProgramFlash_cmd3" value="0x00"/>
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<property name="IspProgramFlash_pollVal1" value="0x00"/>
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<property name="IspProgramFlash_pollVal2" value="0x00"/>
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<property name="IspProgramEeprom_mode" value="0x41"/>
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<property name="IspProgramEeprom_blockSize" value="4"/>
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<property name="IspProgramEeprom_delay" value="10"/>
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<property name="IspProgramEeprom_cmd1" value="0xC1"/>
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<property name="IspProgramEeprom_cmd2" value="0xC2"/>
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<property name="IspProgramEeprom_cmd3" value="0x00"/>
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<property name="IspProgramEeprom_pollVal1" value="0x00"/>
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<property name="IspProgramEeprom_pollVal2" value="0x00"/>
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<property name="IspReadFlash_blockSize" value="256"/>
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<property name="IspReadEeprom_blockSize" value="256"/>
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<property name="IspReadFuse_pollIndex" value="4"/>
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<property name="IspReadLock_pollIndex" value="4"/>
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<property name="IspReadSign_pollIndex" value="4"/>
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="PP_INTERFACE_STK600">
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<property name="PpControlStack"
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value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
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<property name="PpEnterProgMode_stabDelay" value="100"/>
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<property name="PpEnterProgMode_progModeDelay" value="0"/>
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<property name="PpEnterProgMode_latchCycles" value="6"/>
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<property name="PpEnterProgMode_toggleVtg" value="1"/>
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<property name="PpEnterProgMode_powerOffDelay" value="20"/>
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<property name="PpEnterProgMode_resetDelayMs" value="0"/>
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<property name="PpEnterProgMode_resetDelayUs" value="0"/>
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<property name="PpLeaveProgMode_stabDelay" value="15"/>
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<property name="PpLeaveProgMode_resetDelay" value="15"/>
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<property name="PpChipErase_pulseWidth" value="0"/>
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<property name="PpChipErase_pollTimeout" value="10"/>
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<property name="PpProgramFlash_pollTimeout" value="5"/>
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<property name="PpProgramFlash_mode" value="0x0F"/>
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<property name="PpProgramFlash_blockSize" value="256"/>
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<property name="PpReadFlash_blockSize" value="256"/>
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<property name="PpProgramEeprom_pollTimeout" value="5"/>
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<property name="PpProgramEeprom_mode" value="0x05"/>
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<property name="PpProgramEeprom_blockSize" value="256"/>
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<property name="PpReadEeprom_blockSize" value="256"/>
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<property name="PpProgramFuse_pulseWidth" value="0"/>
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<property name="PpProgramFuse_pollTimeout" value="5"/>
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<property name="PpProgramLock_pulseWidth" value="0"/>
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<property name="PpProgramLock_pollTimeout" value="5"/>
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</property-group>
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</property-groups>
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</device>
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<modules>
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|
<module caption="Fuses" name="FUSE">
|
|
<register-group caption="Fuses" name="FUSE">
|
|
<register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
|
|
<bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
|
|
values="ENUM_BODLEVEL"/>
|
|
<bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
|
|
</register>
|
|
<register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
|
|
<bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
|
|
<bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
|
|
<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
|
|
<bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
|
|
<bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
|
|
<bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
|
|
<bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
|
|
</register>
|
|
<register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
|
|
<bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
|
|
<bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
|
|
<bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ENUM_SUT_CKSEL">
|
|
<value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
|
|
<value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
|
|
<value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
|
|
<value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
|
|
<value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
|
|
<value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
|
|
<value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
|
|
value="0x07"/>
|
|
<value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
|
|
value="0x17"/>
|
|
<value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
|
|
value="0x27"/>
|
|
<value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
|
|
value="0x06"/>
|
|
<value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
|
|
value="0x16"/>
|
|
<value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
|
|
value="0x26"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
|
|
<value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
|
|
name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
|
|
<value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
|
|
name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
|
|
<value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
|
|
name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time: 258 CK + 4.1 ms"
|
|
name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time: 258 CK + 65 ms"
|
|
name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time: 1K CK + 0 ms"
|
|
name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time: 1K CK + 4.1 ms"
|
|
name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time: 1K CK + 65 ms"
|
|
name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time: 16K CK + 0 ms"
|
|
name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time: 16K CK + 4.1 ms"
|
|
name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
|
|
<value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time: 16K CK + 65 ms"
|
|
name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
|
|
</value-group>
|
|
<value-group caption="" name="ENUM_BOOTSZ">
|
|
<value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
|
|
<value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
|
|
<value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
|
|
<value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
|
|
</value-group>
|
|
<value-group caption="" name="ENUM_BODLEVEL">
|
|
<value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
|
|
<value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
|
|
<value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
|
|
<value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Lockbits" name="LOCKBIT">
|
|
<register-group caption="Lockbits" name="LOCKBIT">
|
|
<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
|
|
<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
|
|
<bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
|
|
<bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ENUM_LB">
|
|
<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
|
|
<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
|
|
<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="ENUM_BLB">
|
|
<value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
|
<value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
|
|
<value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
|
|
<value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="ENUM_BLB2">
|
|
<value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
|
<value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
|
|
<value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
|
|
<value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Analog-to-Digital Converter" name="ADC">
|
|
<register-group caption="Analog-to-Digital Converter" name="ADC">
|
|
<register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
|
|
<bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
|
|
<bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
|
|
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
|
|
</register>
|
|
<register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
|
|
<bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
|
|
<bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
|
|
<bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
|
|
<bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
|
|
<bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
|
|
<bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
|
|
values="ANALOG_ADC_PRESCALER"/>
|
|
</register>
|
|
<register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
|
|
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
|
<bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
|
|
</register>
|
|
<register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
|
|
<bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
|
|
<bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
|
|
<bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
|
|
<bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
|
|
<bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
|
|
<bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
|
|
<bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
|
|
<bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ANALOG_ADC_V_REF3">
|
|
<value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
|
|
<value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
|
|
value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="ANALOG_ADC_PRESCALER">
|
|
<value caption="2" name="VAL_0x00" value="0x00"/>
|
|
<value caption="2" name="VAL_0x01" value="0x01"/>
|
|
<value caption="4" name="VAL_0x02" value="0x02"/>
|
|
<value caption="8" name="VAL_0x03" value="0x03"/>
|
|
<value caption="16" name="VAL_0x04" value="0x04"/>
|
|
<value caption="32" name="VAL_0x05" value="0x05"/>
|
|
<value caption="64" name="VAL_0x06" value="0x06"/>
|
|
<value caption="128" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Analog Comparator" name="AC">
|
|
<register-group caption="Analog Comparator" name="AC">
|
|
<register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
|
|
<bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
|
|
</register>
|
|
<register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
|
|
ocd-rw="R">
|
|
<bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
|
|
<bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
|
|
<bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
|
|
<bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
|
|
<bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
|
|
<bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
|
|
<bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
|
|
values="ANALOG_COMP_INTERRUPT"/>
|
|
</register>
|
|
<register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
|
|
<bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
|
|
<bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="ANALOG_COMP_INTERRUPT">
|
|
<value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Reserved" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="USART" name="USART">
|
|
<register-group caption="USART" name="USART0">
|
|
<register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
|
|
<register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
|
|
<bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
|
|
<bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
|
|
<bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
|
|
<bitfield caption="Framing Error" mask="0x10" name="FE0"/>
|
|
<bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
|
|
<bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
|
|
<bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
|
|
<bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
|
|
</register>
|
|
<register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
|
|
<bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
|
|
<bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
|
|
<bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
|
|
<bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
|
|
<bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
|
|
<bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
|
|
<bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
|
|
<bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
|
|
</register>
|
|
<register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
|
|
<bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
|
|
<bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
|
|
<bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
|
|
<bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
|
|
<bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
|
|
</register>
|
|
<register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
|
|
</register-group>
|
|
<value-group caption="" name="COMM_USART_MODE">
|
|
<value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
|
|
</value-group>
|
|
<value-group caption="" name="COMM_UPM_PARITY_MODE">
|
|
<value caption="Disabled" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Reserved" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="COMM_STOP_BIT_SEL">
|
|
<value caption="1-bit" name="VAL_0x00" value="0x00"/>
|
|
<value caption="2-bit" name="VAL_0x01" value="0x01"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Universal Serial Interface" name="USI">
|
|
<register-group caption="Universal Serial Interface" name="USI">
|
|
<register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
|
|
<register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
|
|
<bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
|
|
<bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
|
|
<bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
|
|
<bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
|
|
<bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
|
|
</register>
|
|
<register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
|
|
<bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
|
|
<bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
|
|
<bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
|
|
<bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
|
|
<bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
|
|
<bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="COMM_USI_OP">
|
|
<value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Serial Peripheral Interface" name="SPI">
|
|
<register-group caption="Serial Peripheral Interface" name="SPI">
|
|
<register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
|
|
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
|
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
|
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
|
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
|
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
|
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
|
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
|
</register>
|
|
<register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
|
|
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
|
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
|
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
|
</register>
|
|
<register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
|
|
</register-group>
|
|
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
|
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
|
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
|
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
|
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
|
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
|
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
|
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
|
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Bootloader" name="BOOT_LOAD">
|
|
<register-group caption="Bootloader" name="BOOT_LOAD">
|
|
<register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
|
|
<bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
|
|
<bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
|
|
<bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
|
|
<bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
|
|
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
|
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
|
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
|
</register>
|
|
</register-group>
|
|
</module>
|
|
<module caption="JTAG Interface" name="JTAG">
|
|
<register-group caption="JTAG Interface" name="JTAG">
|
|
<register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
|
|
mask="0xFF" ocd-rw=""/>
|
|
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
|
<bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
|
|
</register>
|
|
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
|
|
<bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
|
|
</register>
|
|
</register-group>
|
|
</module>
|
|
<module caption="External Interrupts" name="EXINT">
|
|
<register-group caption="External Interrupts" name="EXINT">
|
|
<register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
|
|
<bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
|
|
<bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
|
|
values="INTERRUPT_SENSE_CONTROL"/>
|
|
</register>
|
|
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
|
<bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
|
|
<bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
|
|
</register>
|
|
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
|
<bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
|
|
<bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
|
|
</register>
|
|
<register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
|
|
<bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="8"/>
|
|
</register>
|
|
<register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
|
|
<bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
|
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="EEPROM" name="EEPROM">
|
|
<register-group caption="EEPROM" name="EEPROM">
|
|
<register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
|
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
|
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
|
<bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
|
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
|
|
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
|
|
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
|
</register>
|
|
</register-group>
|
|
</module>
|
|
<module caption="I/O Port" name="PORT">
|
|
<register-group caption="I/O Port" name="PORTA">
|
|
<register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
|
|
<register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
|
|
<register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTB">
|
|
<register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
|
|
<register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
|
|
<register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTC">
|
|
<register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
|
|
<register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
|
|
<register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTD">
|
|
<register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
|
|
<register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
|
|
<register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTE">
|
|
<register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
|
|
<register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
|
|
<register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTF">
|
|
<register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
|
|
<register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
|
|
<register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
|
|
</register-group>
|
|
<register-group caption="I/O Port" name="PORTG">
|
|
<register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
|
|
<register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
|
|
<register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
|
|
</register-group>
|
|
</module>
|
|
<module caption="Timer/Counter, 8-bit" name="TC8">
|
|
<register-group caption="Timer/Counter, 8-bit" name="TC0">
|
|
<register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
|
|
<bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
|
|
<bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
|
|
<bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
|
|
<bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
|
|
<bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
|
|
</register>
|
|
<register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
|
|
<register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
|
|
mask="0xFF"/>
|
|
<register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
|
<bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
|
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
|
</register>
|
|
<register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
|
ocd-rw="R">
|
|
<bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
|
|
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
|
</register>
|
|
<register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
|
|
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
|
<bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="WAVEFORM_GEN_MODE">
|
|
<value caption="Normal" name="VAL_0x00" value="0x00"/>
|
|
<value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
|
|
<value caption="CTC" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
|
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Timer/Counter, 16-bit" name="TC16">
|
|
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
|
<register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
|
<bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
|
|
<bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
|
|
<bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
|
<bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
|
|
<bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
|
|
<bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
|
|
<bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
|
|
values="CLK_SEL_3BIT_EXT"/>
|
|
</register>
|
|
<register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
|
|
<bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
|
|
<bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
|
<register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
|
|
mask="0xFFFF"/>
|
|
<register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
|
|
mask="0xFFFF"/>
|
|
<register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
|
|
mask="0xFFFF"/>
|
|
<register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
|
<bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
|
|
<bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
|
|
name="OCIE1B"/>
|
|
<bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
|
|
name="OCIE1A"/>
|
|
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
|
</register>
|
|
<register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
|
ocd-rw="R">
|
|
<bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
|
|
<bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
|
|
<bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
|
|
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
|
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
|
|
<register-group caption="Timer/Counter, 8-bit Async" name="TC2">
|
|
<register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
|
|
<bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
|
|
<bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
|
|
<bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
|
|
<bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
|
|
<bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
|
|
</register>
|
|
<register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
|
|
<register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
|
|
mask="0xFF"/>
|
|
<register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
|
|
<bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
|
|
<bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
|
|
</register>
|
|
<register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
|
|
ocd-rw="R">
|
|
<bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
|
|
<bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
|
|
</register>
|
|
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
|
<bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
|
|
</register>
|
|
<register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
|
|
<bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
|
|
<bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
|
|
<bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
|
|
<bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
|
|
<bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="WAVEFORM_GEN_MODE">
|
|
<value caption="Normal" name="VAL_0x00" value="0x00"/>
|
|
<value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
|
|
<value caption="CTC" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
|
|
</value-group>
|
|
<value-group caption="" name="CLK_SEL_3BIT">
|
|
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="Watchdog Timer" name="WDT">
|
|
<register-group caption="Watchdog Timer" name="WDT">
|
|
<register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
|
|
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
|
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
|
<bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
|
|
values="WDOG_TIMER_PRESCALE_3BITS"/>
|
|
</register>
|
|
</register-group>
|
|
<value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
|
|
<value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
|
|
<value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
|
|
<value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
|
|
<value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
|
|
<value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
|
|
<value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
</module>
|
|
<module caption="CPU Registers" name="CPU">
|
|
<register-group caption="CPU Registers" name="CPU">
|
|
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
|
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
|
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
|
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
|
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
|
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
|
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
|
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
|
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
|
</register>
|
|
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
|
|
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
|
<bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
|
|
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
|
<bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
|
|
<bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
|
|
</register>
|
|
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
|
|
<bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
|
|
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
|
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
|
|
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
|
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
|
</register>
|
|
<register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
|
|
<bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
|
|
</register>
|
|
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
|
|
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
|
<bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
|
|
values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
|
|
</register>
|
|
<register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
|
|
<bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
|
|
<bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
|
|
<bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
|
|
<bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
|
|
<bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
|
|
</register>
|
|
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
|
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
|
|
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
|
</register>
|
|
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
|
|
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
|
|
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
|
|
</register-group>
|
|
<value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
|
|
<value caption="1" name="VAL_0x00" value="0x00"/>
|
|
<value caption="2" name="VAL_0x01" value="0x01"/>
|
|
<value caption="4" name="VAL_0x02" value="0x02"/>
|
|
<value caption="8" name="VAL_0x03" value="0x03"/>
|
|
<value caption="16" name="VAL_0x04" value="0x04"/>
|
|
<value caption="32" name="VAL_0x05" value="0x05"/>
|
|
<value caption="64" name="VAL_0x06" value="0x06"/>
|
|
<value caption="128" name="VAL_0x07" value="0x07"/>
|
|
<value caption="256" name="VAL_0x08" value="0x08"/>
|
|
</value-group>
|
|
<value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
|
|
<value caption="Idle" name="IDLE" value="0x00"/>
|
|
<value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
|
|
<value caption="Power Down" name="PDOWN" value="0x02"/>
|
|
<value caption="Power Save" name="PSAVE" value="0x03"/>
|
|
<value caption="Reserved" name="VAL_0x04" value="0x04"/>
|
|
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
|
<value caption="Standby" name="STDBY" value="0x06"/>
|
|
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
|
</value-group>
|
|
<value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
|
|
<value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
|
|
</value-group>
|
|
|
|
</module>
|
|
</modules>
|
|
</target-description-file>
|