Commit Graph

4 Commits

Author SHA1 Message Date
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d485263c6d Enabled memory inspection for boot segment of WCH RISC-V targets 2024-12-19 23:47:24 +00:00
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6cdbfbe950 Massive refactor to accommodate RISC-V targets
- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here
2024-07-23 21:14:22 +01:00
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11a714d4b6 Used TargetMemoryAddressRange in address space and memory segment descriptors 2024-03-16 16:23:13 +00:00
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47e92157f7 Added target address space and memory segment descriptor structs 2024-03-16 00:06:53 +00:00