Nav
8145708851
Corrected issue with JTAG/debugWire AVR8 parameters including mapped IO memory address offset
2021-07-04 00:29:43 +01:00
Nav
aa6395a002
Corrected issue with byte order expectations for target registers.
...
This was the cause for that issue with GDB using the incorrect memory addresses for local variables, after the PC and SP had been changed.
Also renamed SP start address parameter to make the byte order of the register clear.
2021-07-02 01:34:17 +01:00
Nav
21bf197801
Tidying
2021-06-30 03:11:41 +01:00
Nav
e1962ba61a
Included CPU register offset in stack pointer and status register addresses
2021-06-30 03:10:16 +01:00
Nav
419fcbb2f0
Tidying
2021-06-27 21:33:08 +01:00
Nav
1971f0a89e
Refactored AVR8 TDF loading
...
Refactored EDBG AVR8 target parameter uploading
Implemented UPDI parameter extraction (from TDF) and uploading to debug tool
Introduced supported physical interfaces in AVR8 TDFs
2021-06-27 20:09:15 +01:00
Nav
0931bc649f
Decoupled AVR8 physical interface enum from EDBG protocol code
2021-06-26 04:30:01 +01:00
Nav
1f7907699f
Sending target parameters to the debug tool before activation, for AVR8 targets
2021-06-26 03:46:37 +01:00
Nav
e7c026bd7a
Corrected integer conversion in target parameter extraction routine.
2021-06-26 03:45:00 +01:00
Nav
656e48ca6d
Added VDD pin identification for AVR8 targets
2021-06-26 03:43:50 +01:00
Nav
d365f6348b
General tidying, addressing issues found by static analysis tool.
2021-06-22 23:52:31 +01:00
Nav
57acda4b3b
Included SSOP target package and updated the Insight window to use the DIP widget for SOIC, SSOP and DIP packages.
...
Also updated the Insight window to use the QFP widget for QFN packages.
2021-06-20 22:55:48 +01:00
Nav
a65cc0b5c0
More TDF refactoring
...
Moved address space, module, property group, variant, pinout and peripheral module extraction to TDF initialisation.
Also some other bits of tidying.
2021-06-06 20:06:43 +01:00
Nav
3f1247ce74
Fixed issue with automatic config variant selection, where we were not properly handling XMEGA targets with the JTAG physical interface.
...
Also introduced new AVR8 families, for D series targets.
Also moved AVR family param outside of TargetParameters struct
2021-06-06 18:41:08 +01:00
Nav
bff9f7c317
Mopping up some TDF refactoring
2021-06-05 22:37:54 +01:00
Nav
91b40133a1
Fixed issue with AVR8 EEPROM address register loading from TDFs
2021-06-05 22:35:24 +01:00
Nav
ce7e0147db
Refactoring AVR8 target variant & pin/pad loading
2021-06-03 01:06:11 +01:00
Nav
11e328e81f
Some more renaming of part description files to target description files
2021-06-03 00:49:08 +01:00
Nav
104ec95a65
Construct an AVR8 TDF via a TargetSignature object, as opposed to the signature hex value.
2021-06-03 00:26:20 +01:00
Nav
571211b337
Renamed part description files to target description files.
...
Introduced a generic target description file class with an AVR8 derivation.
Moved AVR8 target description files
2021-05-31 01:42:18 +01:00
Nav
ce480a996c
Removed all using declarations and directives from header files
2021-05-24 20:58:49 +01:00
Nav
40b681ddde
Fixed typo in AVR8 target parameter and introduced "SPMCR" fallback value from part description
2021-05-02 15:54:23 +01:00
Nav
4a10ad4c35
Cleaned up AVR8 part description file loading
2021-05-02 15:51:58 +01:00
Nav
8da2aa3a8d
Removed debugging code. Other small bits of tidying
2021-04-12 19:43:42 +01:00
Nav
8d6b09ec21
Cleaned up the target interface header, as well as some small bits of cleaning in other places
2021-04-07 21:03:53 +01:00
Nav
71f312f925
Added NVM base address extraction for XMega AVR8 targets
2021-04-06 23:21:37 +01:00
Nav
a29c5e1fec
Initial commit
2021-04-04 21:04:12 +01:00
