5 Commits

Author	SHA1	Message	Date
Nav	33ed399337	WCH RISC-V software breakpoints, and a few other bits of refactoring/tidying	2024-12-05 23:09:01 +00:00
Nav	3f88e2022c	Refactored descriptor ID generation and added IDs to peripherals, register groups and registers	2024-07-25 19:03:26 +01:00
Nav	6cdbfbe950	Massive refactor to accommodate RISC-V targets ... - Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR) - Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website - Added unit size property to address spaces - Many other changes which I couldn't be bothered to describe here	2024-07-23 21:14:22 +01:00
Nav	b94d76cb45	Added getIntersectingMemorySegmentDescriptors() member function to address space descriptor struct	2024-03-17 13:12:10 +00:00
Nav	6ca2f7681b	Moved TargetAddressSpaceDescriptor member functions to separate source file	2024-03-16 16:55:55 +00:00