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Implemented RISC-V stepping

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2023-11-23 16:34:35 +00:00
parent 257c316369
commit db7d735d68
3 changed files with 104 additions and 0 deletions
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4
src/Targets/RiscV/RiscV.hpp
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@@ -9,6 +9,8 @@
#include "src/DebugToolDrivers/TargetInterfaces/RiscV/RiscVDebugInterface.hpp"
#include "src/Targets/RiscV/RiscVGeneric.hpp"
#include "src/Targets/RiscV/Registers/DebugControlStatusRegister.hpp"
#include "src/Targets/RiscV/DebugModule/DebugModule.hpp"
#include "src/Targets/RiscV/DebugModule/Registers/ControlRegister.hpp"
#include "src/Targets/RiscV/DebugModule/Registers/StatusRegister.hpp"
@@ -104,10 +106,12 @@ namespace Targets::RiscV
DebugModule::Registers::StatusRegister readDebugModuleStatusRegister();
DebugModule::Registers::AbstractControlStatusRegister readDebugModuleAbstractControlStatusRegister();
Registers::DebugControlStatusRegister readDebugControlStatusRegister();
RegisterValue readRegister(Registers::RegisterNumber number);
void writeRegister(Registers::RegisterNumber number, RegisterValue value);
void writeDebugControlStatusRegister(const Registers::DebugControlStatusRegister& controlRegister);
void writeDebugModuleControlRegister(const DebugModule::Registers::ControlRegister &controlRegister);
void executeAbstractCommand(const DebugModule::Registers::AbstractCommandRegister& abstractCommandRegister);