diff --git a/src/DebugToolDrivers/Protocols/RiscVDebugSpec/DebugTranslator.cpp b/src/DebugToolDrivers/Protocols/RiscVDebugSpec/DebugTranslator.cpp index bb6e5c58..5b14e4df 100644 --- a/src/DebugToolDrivers/Protocols/RiscVDebugSpec/DebugTranslator.cpp +++ b/src/DebugToolDrivers/Protocols/RiscVDebugSpec/DebugTranslator.cpp @@ -97,6 +97,8 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec this->reset(); this->triggerDescriptorsByIndex = this->discoverTriggers(); + Logger::debug("Discovered RISC-V triggers: " + std::to_string(this->triggerDescriptorsByIndex.size())); + if (!this->triggerDescriptorsByIndex.empty()) { // Clear any left-over triggers from the previous debug session this->clearAllBreakpoints(); @@ -288,6 +290,7 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec } void DebugTranslator::clearAllBreakpoints() { + // To ensure that any untracked breakpoints are cleared, we clear all triggers on the target. for (const auto [triggerIndex, triggerDescriptor] : this->triggerDescriptorsByIndex) { this->clearTrigger(triggerDescriptor); } @@ -789,7 +792,7 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec void DebugTranslator::clearTrigger(const TriggerModule::TriggerDescriptor& triggerDescriptor) { using TriggerModule::TriggerType; - Logger::debug("Clearing trigger " + std::to_string(triggerDescriptor.index)); // TODO: keep this, but reword it + Logger::debug("Clearing RISC-V trigger " + std::to_string(triggerDescriptor.index)); if (triggerDescriptor.supportedTypes.contains(TriggerType::MATCH_CONTROL)) { using TriggerModule::Registers::MatchControl; diff --git a/src/Targets/Microchip/AVR8/Avr8.cpp b/src/Targets/Microchip/AVR8/Avr8.cpp index 5945dd85..f3601150 100644 --- a/src/Targets/Microchip/AVR8/Avr8.cpp +++ b/src/Targets/Microchip/AVR8/Avr8.cpp @@ -23,7 +23,7 @@ namespace Targets::Microchip::Avr8 using namespace Exceptions; Avr8::Avr8(const TargetConfig& targetConfig, TargetDescriptionFile&& targetDescriptionFile) - : targetConfig(Avr8TargetConfig(targetConfig)) + : targetConfig(Avr8TargetConfig{targetConfig}) , targetDescriptionFile(std::move(targetDescriptionFile)) , dataAddressSpaceDescriptor(this->targetDescriptionFile.getDataAddressSpaceDescriptor()) , fuseAddressSpaceDescriptor(this->targetDescriptionFile.getFuseAddressSpaceDescriptor()) diff --git a/src/Targets/Microchip/AVR8/TargetSignature.hpp b/src/Targets/Microchip/AVR8/TargetSignature.hpp index 8aba66af..080729f4 100644 --- a/src/Targets/Microchip/AVR8/TargetSignature.hpp +++ b/src/Targets/Microchip/AVR8/TargetSignature.hpp @@ -47,7 +47,7 @@ namespace Targets::Microchip::Avr8 stream << std::setw(2) << static_cast(this->byteOne); stream << std::setw(2) << static_cast(this->byteTwo); - return "0x" + stream.str(); + return "0x" + Services::StringService::asciiToUpper(stream.str()); } bool operator == (const TargetSignature& signature) const { diff --git a/src/Targets/RiscV/RiscV.cpp b/src/Targets/RiscV/RiscV.cpp index 215d6c7e..d9f2d76b 100644 --- a/src/Targets/RiscV/RiscV.cpp +++ b/src/Targets/RiscV/RiscV.cpp @@ -18,7 +18,7 @@ namespace Targets::RiscV const TargetConfig& targetConfig, TargetDescriptionFile&& targetDescriptionFile ) - : targetConfig(RiscVTargetConfig(targetConfig)) + : targetConfig(RiscVTargetConfig{targetConfig}) , targetDescriptionFile(std::move(targetDescriptionFile)) , cpuRegisterAddressSpaceDescriptor(RiscV::generateCpuRegisterAddressSpaceDescriptor()) , csrMemorySegmentDescriptor(this->cpuRegisterAddressSpaceDescriptor.getMemorySegmentDescriptor("cs_registers")) @@ -62,10 +62,10 @@ namespace Targets::RiscV const auto deviceId = this->riscVIdInterface->getDeviceId(); const auto tdfDeviceId = this->targetDescriptionFile.getTargetId(); if (deviceId != tdfDeviceId) { - throw Exceptions::InvalidConfig( + throw Exceptions::InvalidConfig{ "RISC-V target ID mismatch - expected " + tdfDeviceId + " but got " + deviceId + ". Please check target configuration." - ); + }; } } @@ -170,9 +170,9 @@ namespace Targets::RiscV !this->csrMemorySegmentDescriptor.addressRange.contains(descriptor->startAddress) && !this->gprMemorySegmentDescriptor.addressRange.contains(descriptor->startAddress) ) { - throw Exceptions::Exception( + throw Exceptions::Exception{ "Cannot access CPU register \"" + descriptor->key + "\" - unknown memory segment" - ); + }; } cpuRegisterDescriptors.emplace_back(descriptor); @@ -180,9 +180,9 @@ namespace Targets::RiscV } if (descriptor->addressSpaceId != this->sysAddressSpaceDescriptor.id) { - throw Exceptions::Exception( + throw Exceptions::Exception{ "Cannot access register \"" + descriptor->key + "\" - unknown address space" - ); + }; } auto value = this->riscVDebugInterface->readMemory( @@ -217,7 +217,7 @@ namespace Targets::RiscV !this->csrMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress) && !this->gprMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress) ) { - throw Exceptions::Exception("Cannot access CPU register - unknown memory segment"); + throw Exceptions::Exception{"Cannot access CPU register - unknown memory segment"}; } this->riscVDebugInterface->writeCpuRegisters({pair}); @@ -225,9 +225,9 @@ namespace Targets::RiscV } if (descriptor.addressSpaceId != this->sysAddressSpaceDescriptor.id) { - throw Exceptions::Exception( + throw Exceptions::Exception{ "Cannot access register \"" + descriptor.key + "\" - unknown address space" - ); + }; } auto value = pair.second; @@ -397,16 +397,16 @@ namespace Targets::RiscV ); if (segmentDescriptors.empty()) { - throw Exceptions::Exception( + throw Exceptions::Exception{ "Cannot access system register \"" + regDescriptor.key + "\" - unknown memory segment" - ); + }; } if (segmentDescriptors.size() != 1) { - throw Exceptions::Exception( + throw Exceptions::Exception{ "Cannot access system register \"" + regDescriptor.key + "\" - register spans multiple memory segments" - ); + }; } return *(segmentDescriptors.front());