From cd79dbbb2cc45512c2db702630bd0782d437c1fb Mon Sep 17 00:00:00 2001
From: Nav <nav@navnav.me>
Date: Sat, 12 Jun 2021 01:43:30 +0100
Subject: [PATCH] More TDF corrections

---
 .../AVR8/TINY/ATTINY828.xml                   |  75 +++++++++-
 .../AVR8/XMEGA/ATXMEGA128A3.xml               | 140 +++++++++++++++++-
 .../AVR8/XMEGA/ATXMEGA16A4.xml                | 102 ++++++++++++-
 .../AVR8/XMEGA/ATXMEGA192A3.xml               | 140 +++++++++++++++++-
 .../AVR8/XMEGA/ATXMEGA192C3.xml               | 140 +++++++++++++++++-
 .../AVR8/XMEGA/ATXMEGA256A3.xml               | 140 +++++++++++++++++-
 .../AVR8/XMEGA/ATXMEGA256A3B.xml              | 140 +++++++++++++++++-
 .../AVR8/XMEGA/ATXMEGA32A4.xml                | 102 ++++++++++++-
 .../AVR8/XMEGA/ATXMEGA64A3.xml                | 140 +++++++++++++++++-
 9 files changed, 1086 insertions(+), 33 deletions(-)

diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY828.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY828.xml
index c938308b..c3594b54 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY828.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY828.xml
@@ -1,7 +1,8 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.62" vccmax="5.5"/>
+        <variant ordercode="ATtiny828-MU" package="VQFN32" pinout="QFP_QFN_32" tempmax="85" tempmin="-40"/>
+        <variant ordercode="ATtiny828-AU" package="TQFP32" pinout="QFP_QFN_32" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATtiny828" architecture="AVR8" family="tinyAVR">
         <address-spaces>
@@ -51,18 +52,54 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                    </signals>
                 </instance>
             </module>
             <module name="CPU">
@@ -978,4 +1015,40 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_32">
+            <pin pad="PC2" position="1"/>
+            <pin pad="PC3" position="2"/>
+            <pin pad="PC4" position="3"/>
+            <pin pad="VCC" position="4"/>
+            <pin pad="GND" position="5"/>
+            <pin pad="PC5" position="6"/>
+            <pin pad="PC6" position="7"/>
+            <pin pad="PC7" position="8"/>
+            <pin pad="PA0" position="9"/>
+            <pin pad="PA1" position="10"/>
+            <pin pad="PA2" position="11"/>
+            <pin pad="PA3" position="12"/>
+            <pin pad="PA4" position="13"/>
+            <pin pad="PA5" position="14"/>
+            <pin pad="PA6" position="15"/>
+            <pin pad="PA7" position="16"/>
+            <pin pad="PB0" position="17"/>
+            <pin pad="AVCC" position="18"/>
+            <pin pad="PB1" position="19"/>
+            <pin pad="PB2" position="20"/>
+            <pin pad="GND" position="21"/>
+            <pin pad="PB3" position="22"/>
+            <pin pad="PB4" position="23"/>
+            <pin pad="PB5" position="24"/>
+            <pin pad="PB6" position="25"/>
+            <pin pad="PB7" position="26"/>
+            <pin pad="PD0" position="27"/>
+            <pin pad="PD1" position="28"/>
+            <pin pad="PD2" position="29"/>
+            <pin pad="PD3" position="30"/>
+            <pin pad="PC0" position="31"/>
+            <pin pad="PC1" position="32"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml
index 81e27ddd..678eac6f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA128A3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
-        <variant ordercode="ATXMEGA128A3-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA128A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA128A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega128A3" architecture="AVR8_XMEGA" family="AVR XMEGA">
         <address-spaces>
@@ -186,24 +186,88 @@
                 </instance>
                 <instance name="PORTA">
                     <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB">
                     <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC">
                     <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD">
                     <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE">
                     <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF">
                     <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTR">
                     <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    <signals>
+                        <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                        <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC" id="I6090">
@@ -2586,4 +2650,72 @@
             </interrupt-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml
index 741dd7d1..af3ada38 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA16A4-AU" package="TQFP44" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
-        <variant ordercode="ATXMEGA16A4-MU" package="VQFN44" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA16A4-AU" package="TQFP44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA16A4-MH" package="VQFN44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega16A4" architecture="AVR8_XMEGA" family="AVR XMEGA">
         <address-spaces>
@@ -180,21 +180,67 @@
                 </instance>
                 <instance name="PORTA">
                     <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB">
                     <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC">
                     <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD">
                     <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE">
                     <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                    </signals>
                 </instance>
                 <instance name="PORTR">
                     <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    <signals>
+                        <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                        <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC" id="I6090">
@@ -2542,4 +2588,52 @@
             </interrupt-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml
index e51ed1c6..b38196bb 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA192A3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
-        <variant ordercode="ATXMEGA192A3-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega192A3" architecture="AVR8_XMEGA" family="AVR XMEGA">
         <address-spaces>
@@ -186,24 +186,88 @@
                 </instance>
                 <instance name="PORTA">
                     <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB">
                     <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC">
                     <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD">
                     <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE">
                     <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF">
                     <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTR">
                     <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    <signals>
+                        <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                        <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC" id="I6090">
@@ -2586,4 +2650,72 @@
             </interrupt-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml
index 498a4179..69222579 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA192C3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
-        <variant ordercode="ATXMEGA192C3-MH" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192C3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192C3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega192C3" architecture="AVR8_XMEGA" family="AVR XMEGA">
         <address-spaces>
@@ -175,24 +175,88 @@
             <module name="PORT" id="I6075" version="XMEGAAU">
                 <instance name="PORTA">
                     <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB">
                     <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC">
                     <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD">
                     <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE">
                     <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF">
                     <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTR">
                     <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    <signals>
+                        <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                        <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC" id="I6090" version="XMEGAD">
@@ -2523,4 +2587,72 @@
             </register-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml
index 09b0f90c..90ae638c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA256A3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
-        <variant ordercode="ATXMEGA256A3-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega256A3" architecture="AVR8_XMEGA" family="AVR XMEGA">
         <address-spaces>
@@ -186,24 +186,88 @@
                 </instance>
                 <instance name="PORTA">
                     <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB">
                     <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC">
                     <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD">
                     <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE">
                     <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF">
                     <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTR">
                     <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    <signals>
+                        <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                        <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC" id="I6090">
@@ -2587,4 +2651,72 @@
             </interrupt-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml
index edf6cd67..5a238454 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA256A3B-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
-        <variant ordercode="ATXMEGA256A3B-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3B-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3B-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega256A3B" architecture="AVR8_XMEGA" family="AVR XMEGA">
         <address-spaces>
@@ -186,24 +186,88 @@
                 </instance>
                 <instance name="PORTA">
                     <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB">
                     <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC">
                     <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD">
                     <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE">
                     <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF">
                     <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTR">
                     <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    <signals>
+                        <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                        <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC" id="I6090">
@@ -2592,4 +2656,72 @@
             </register-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml
index 8e056c13..137d0425 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA32A4-AU" package="TQFP44" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
-        <variant ordercode="ATXMEGA32A4-MU" package="VQFN44" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA32A4-AU" package="TQFP44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA32A4-MH" package="VQFN44" speedmax="32000000" pinout="QFP_QFN_44" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega32A4" architecture="AVR8_XMEGA" family="AVR XMEGA">
         <address-spaces>
@@ -180,21 +180,67 @@
                 </instance>
                 <instance name="PORTA">
                     <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB">
                     <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC">
                     <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD">
                     <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE">
                     <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                    </signals>
                 </instance>
                 <instance name="PORTR">
                     <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    <signals>
+                        <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                        <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC" id="I6090">
@@ -2542,4 +2588,52 @@
             </interrupt-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml
index 646c68e5..0b58ee77 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATXMEGA64A3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
-        <variant ordercode="ATXMEGA64A3-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
-                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA64A3-AU" package="TQFP64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATXMEGA64A3-MH" package="QFN64" speedmax="32000000" pinout="QFP_QFN_64" tempmax="0"
+                 tempmin="0" vccmax="3.6" vccmin="1.6"/>
     </variants>
     <device name="ATxmega64A3" architecture="AVR8_XMEGA" family="AVR XMEGA">
         <address-spaces>
@@ -186,24 +186,88 @@
                 </instance>
                 <instance name="PORTA">
                     <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB">
                     <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC">
                     <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD">
                     <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE">
                     <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF">
                     <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTR">
                     <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    <signals>
+                        <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                        <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC" id="I6090">
@@ -2586,4 +2650,72 @@
             </interrupt-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>