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Added 0xFFFF opcode as some AVRs treat it as an SBRS instruction.

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Also some tidying
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2023-09-14 21:10:57 +01:00
parent 4348a6d88c
commit c80984021b
4 changed files with 38 additions and 3 deletions
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6
src/Targets/Microchip/AVR/AVR8/OpcodeDecoder/Decoder.cpp
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@@ -23,6 +23,7 @@ namespace Targets::Microchip::Avr::Avr8Bit::OpcodeDecoder
while(dataIt != dataEndIt) {
auto opcodeMatched = false;
const auto wordAvailable = std::distance(dataIt, dataEndIt) >= 2;
for (const auto& decoder : decoders) {
auto instruction = decoder(dataIt, dataEndIt);
@@ -42,7 +43,7 @@ namespace Targets::Microchip::Avr::Avr8Bit::OpcodeDecoder
if (throwOnFailure) {
throw Exceptions::DecodeFailure(
instructionByteAddress,
std::distance(dataIt, dataEndIt) >= 2
wordAvailable
? static_cast<std::uint32_t>(*(dataIt + 1) << 8) | *dataIt
: *dataIt
);
@@ -50,7 +51,7 @@ namespace Targets::Microchip::Avr::Avr8Bit::OpcodeDecoder
output.insert(std::pair(instructionByteAddress, std::nullopt));
if (std::distance(dataIt, dataEndIt) < 2) {
if (!wordAvailable) {
break;
}
@@ -69,6 +70,7 @@ namespace Targets::Microchip::Avr::Avr8Bit::OpcodeDecoder
* I've used the same order that is used in the AVR implementation of GDB.
*/
return Decoder::OpcodeDecoders({
std::bind(&Opcodes::UndefinedOrErased::decode, std::placeholders::_1, std::placeholders::_2),
std::bind(&Opcodes::Clc::decode, std::placeholders::_1, std::placeholders::_2),
std::bind(&Opcodes::Clh::decode, std::placeholders::_1, std::placeholders::_2),
std::bind(&Opcodes::Cli::decode, std::placeholders::_1, std::placeholders::_2),