doryan/BloomPatched
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Added missing GPR address space check in RiscV::writeRegisters()

Browse Source
This commit is contained in:
Nav
2025-01-26 02:29:08 +00:00
parent 868649adf2
commit b46b4a77a1
1 changed files with 17 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
src/Targets/RiscV/RiscV.cpp
View File

@@ -151,12 +151,26 @@ namespace Targets::RiscV
for (const auto& pair : registers) {
const auto& descriptor = pair.first;
if (descriptor.addressSpaceId == this->csrAddressSpaceDescriptor.id) {
if (
!this->csrMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress)
descriptor.addressSpaceId == this->csrAddressSpaceDescriptor.id
|| descriptor.addressSpaceId == this->gprAddressSpaceDescriptor.id
) {
if (
descriptor.addressSpaceId == this->csrAddressSpaceDescriptor.id
&& !this->csrMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress)
) {
throw Exceptions::Exception{
"Cannot access CPU CSR `" + descriptor.key + "` - unknown memory segment"
};
}
if (
descriptor.addressSpaceId == this->gprAddressSpaceDescriptor.id
&& !this->gprMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress)
) {
throw Exceptions::Exception{"Cannot access CPU register - unknown memory segment"};
throw Exceptions::Exception{
"Cannot access CPU GPR `" + descriptor.key + "` - unknown memory segment"
};
}
this->riscVDebugInterface->writeCpuRegisters({pair});