Added missing GPR address space check in RiscV::writeRegisters()
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@@ -151,12 +151,26 @@ namespace Targets::RiscV
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for (const auto& pair : registers) {
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for (const auto& pair : registers) {
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const auto& descriptor = pair.first;
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const auto& descriptor = pair.first;
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if (descriptor.addressSpaceId == this->csrAddressSpaceDescriptor.id) {
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if (
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descriptor.addressSpaceId == this->csrAddressSpaceDescriptor.id
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|| descriptor.addressSpaceId == this->gprAddressSpaceDescriptor.id
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) {
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if (
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if (
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!this->csrMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress)
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descriptor.addressSpaceId == this->csrAddressSpaceDescriptor.id
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&& !this->csrMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress)
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) {
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throw Exceptions::Exception{
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"Cannot access CPU CSR `" + descriptor.key + "` - unknown memory segment"
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};
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}
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if (
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descriptor.addressSpaceId == this->gprAddressSpaceDescriptor.id
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&& !this->gprMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress)
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&& !this->gprMemorySegmentDescriptor.addressRange.contains(descriptor.startAddress)
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) {
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) {
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throw Exceptions::Exception{"Cannot access CPU register - unknown memory segment"};
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throw Exceptions::Exception{
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"Cannot access CPU GPR `" + descriptor.key + "` - unknown memory segment"
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};
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}
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}
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this->riscVDebugInterface->writeCpuRegisters({pair});
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this->riscVDebugInterface->writeCpuRegisters({pair});
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