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More TDF corrections and some tidying

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2021-06-14 22:23:41 +01:00
parent 2b5b2406b1
commit 9fcc970235
12 changed files with 1777 additions and 19 deletions
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131
src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1286.xml
View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.2" vccmax="5.5"/>
<variant ordercode="AT90USB1286-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
<variant ordercode="AT90USB1286-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
</variants>
<device name="AT90USB1286" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -52,26 +53,86 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
<signal function="PORTC" group="P" index="6" pad="PC6"/>
<signal function="PORTC" group="P" index="7" pad="PC7"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
<signal function="PORTD" group="P" index="2" pad="PD2"/>
<signal function="PORTD" group="P" index="3" pad="PD3"/>
<signal function="PORTD" group="P" index="4" pad="PD4"/>
<signal function="PORTD" group="P" index="5" pad="PD5"/>
<signal function="PORTD" group="P" index="6" pad="PD6"/>
<signal function="PORTD" group="P" index="7" pad="PD7"/>
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
<signal function="PORTE" group="P" index="2" pad="PE2"/>
<signal function="PORTE" group="P" index="3" pad="PE3"/>
<signal function="PORTE" group="P" index="4" pad="PE4"/>
<signal function="PORTE" group="P" index="5" pad="PE5"/>
<signal function="PORTE" group="P" index="6" pad="PE6"/>
<signal function="PORTE" group="P" index="7" pad="PE7"/>
</signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTF" group="P" index="0" pad="PF0"/>
<signal function="PORTF" group="P" index="1" pad="PF1"/>
<signal function="PORTF" group="P" index="2" pad="PF2"/>
<signal function="PORTF" group="P" index="3" pad="PF3"/>
<signal function="PORTF" group="P" index="4" pad="PF4"/>
<signal function="PORTF" group="P" index="5" pad="PF5"/>
<signal function="PORTF" group="P" index="6" pad="PF6"/>
<signal function="PORTF" group="P" index="7" pad="PF7"/>
</signals>
</instance>
</module>
<module name="CPU">
@@ -1349,4 +1410,72 @@
</register-group>
</module>
</modules>
<pinouts>
<pinout name="QFP_QFN_64">
<pin pad="PE6" position="1"/>
<pin pad="PE7" position="2"/>
<pin pad="UVCC" position="3"/>
<pin pad="D-" position="4"/>
<pin pad="D+" position="5"/>
<pin pad="UGND" position="6"/>
<pin pad="UCAP" position="7"/>
<pin pad="VBUS" position="8"/>
<pin pad="PE3" position="9"/>
<pin pad="PB0" position="10"/>
<pin pad="PB1" position="11"/>
<pin pad="PB2" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB4" position="14"/>
<pin pad="PB5" position="15"/>
<pin pad="PB6" position="16"/>
<pin pad="PB7" position="17"/>
<pin pad="PE4" position="18"/>
<pin pad="PE5" position="19"/>
<pin pad="RESET" position="20"/>
<pin pad="VCC" position="21"/>
<pin pad="GDN" position="22"/>
<pin pad="XTAL2" position="23"/>
<pin pad="XTAL1" position="24"/>
<pin pad="PD0" position="25"/>
<pin pad="PD1" position="26"/>
<pin pad="PD2" position="27"/>
<pin pad="PD3" position="28"/>
<pin pad="PD4" position="29"/>
<pin pad="PD5" position="30"/>
<pin pad="PD6" position="31"/>
<pin pad="PD7" position="32"/>
<pin pad="PE0" position="33"/>
<pin pad="PE1" position="34"/>
<pin pad="PC0" position="35"/>
<pin pad="PC1" position="36"/>
<pin pad="PC2" position="37"/>
<pin pad="PC3" position="38"/>
<pin pad="PC4" position="39"/>
<pin pad="PC5" position="40"/>
<pin pad="PC6" position="41"/>
<pin pad="PC7" position="42"/>
<pin pad="PE2" position="43"/>
<pin pad="PA7" position="44"/>
<pin pad="PA6" position="45"/>
<pin pad="PA5" position="46"/>
<pin pad="PA4" position="47"/>
<pin pad="PA3" position="48"/>
<pin pad="PA2" position="49"/>
<pin pad="PA1" position="50"/>
<pin pad="PA0" position="51"/>
<pin pad="VCC" position="52"/>
<pin pad="GND" position="53"/>
<pin pad="PF7" position="54"/>
<pin pad="PF6" position="55"/>
<pin pad="PF5" position="56"/>
<pin pad="PF4" position="57"/>
<pin pad="PF3" position="58"/>
<pin pad="PF2" position="59"/>
<pin pad="PF1" position="60"/>
<pin pad="PF0" position="61"/>
<pin pad="AREF" position="62"/>
<pin pad="GND" position="63"/>
<pin pad="AVCC" position="64"/>
</pinout>
</pinouts>
</target-description-file>

134
src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB1287.xml
View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.2" vccmax="5.5"/>
<variant ordercode="AT90USB1287-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
<variant ordercode="AT90USB1287-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
</variants>
<device name="AT90USB1287" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -52,26 +53,89 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
<signal function="PORTC" group="P" index="6" pad="PC6"/>
<signal function="PORTC" group="P" index="7" pad="PC7"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
<signal function="PORTD" group="P" index="2" pad="PD2"/>
<signal function="PORTD" group="P" index="3" pad="PD3"/>
<signal function="PORTD" group="P" index="4" pad="PD4"/>
<signal function="PORTD" group="P" index="5" pad="PD5"/>
<signal function="PORTD" group="P" index="6" pad="PD6"/>
<signal function="PORTD" group="P" index="7" pad="PD7"/>
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
<signal function="PORTE" group="P" index="2" pad="PE2"/>
<signal function="PORTE" group="P" index="3" pad="PE3"/>
<signal function="PORTE" group="P" index="4" pad="PE4"/>
<signal function="PORTE" group="P" index="5" pad="PE5"/>
<signal function="PORTE" group="P" index="6" pad="PE6"/>
<signal function="PORTE" group="P" index="7" pad="PE7"/>
</signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTF" group="P" index="0" pad="PF0"/>
<signal function="PORTF" group="P" index="1" pad="PF1"/>
<signal function="PORTF" group="P" index="2" pad="PF2"/>
<signal function="PORTF" group="P" index="3" pad="PF3"/>
<signal function="PORTF" group="P" index="4" pad="PF4"/>
<signal function="PORTF" group="P" index="5" pad="PF5"/>
<signal function="PORTF" group="P" index="6" pad="PF6"/>
<signal function="PORTF" group="P" index="7" pad="PF7"/>
</signals>
</instance>
</module>
<module name="CPU">
@@ -1474,4 +1538,72 @@
</value-group>
</module>
</modules>
<pinouts>
<pinout name="QFP_QFN_64">
<pin pad="PE6" position="1"/>
<pin pad="PE7" position="2"/>
<pin pad="UVCC" position="3"/>
<pin pad="D-" position="4"/>
<pin pad="D+" position="5"/>
<pin pad="UGND" position="6"/>
<pin pad="UCAP" position="7"/>
<pin pad="VBUS" position="8"/>
<pin pad="PE3" position="9"/>
<pin pad="PB0" position="10"/>
<pin pad="PB1" position="11"/>
<pin pad="PB2" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB4" position="14"/>
<pin pad="PB5" position="15"/>
<pin pad="PB6" position="16"/>
<pin pad="PB7" position="17"/>
<pin pad="PE4" position="18"/>
<pin pad="PE5" position="19"/>
<pin pad="RESET" position="20"/>
<pin pad="VCC" position="21"/>
<pin pad="GDN" position="22"/>
<pin pad="XTAL2" position="23"/>
<pin pad="XTAL1" position="24"/>
<pin pad="PD0" position="25"/>
<pin pad="PD1" position="26"/>
<pin pad="PD2" position="27"/>
<pin pad="PD3" position="28"/>
<pin pad="PD4" position="29"/>
<pin pad="PD5" position="30"/>
<pin pad="PD6" position="31"/>
<pin pad="PD7" position="32"/>
<pin pad="PE0" position="33"/>
<pin pad="PE1" position="34"/>
<pin pad="PC0" position="35"/>
<pin pad="PC1" position="36"/>
<pin pad="PC2" position="37"/>
<pin pad="PC3" position="38"/>
<pin pad="PC4" position="39"/>
<pin pad="PC5" position="40"/>
<pin pad="PC6" position="41"/>
<pin pad="PC7" position="42"/>
<pin pad="PE2" position="43"/>
<pin pad="PA7" position="44"/>
<pin pad="PA6" position="45"/>
<pin pad="PA5" position="46"/>
<pin pad="PA4" position="47"/>
<pin pad="PA3" position="48"/>
<pin pad="PA2" position="49"/>
<pin pad="PA1" position="50"/>
<pin pad="PA0" position="51"/>
<pin pad="VCC" position="52"/>
<pin pad="GND" position="53"/>
<pin pad="PF7" position="54"/>
<pin pad="PF6" position="55"/>
<pin pad="PF5" position="56"/>
<pin pad="PF4" position="57"/>
<pin pad="PF3" position="58"/>
<pin pad="PF2" position="59"/>
<pin pad="PF1" position="60"/>
<pin pad="PF0" position="61"/>
<pin pad="AREF" position="62"/>
<pin pad="GND" position="63"/>
<pin pad="AVCC" position="64"/>
</pinout>
</pinouts>
</target-description-file>

131
src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB646.xml
View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
<variant ordercode="AT90USB646-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
<variant ordercode="AT90USB646-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
</variants>
<device name="AT90USB646" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -52,26 +53,86 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
<signal function="PORTC" group="P" index="6" pad="PC6"/>
<signal function="PORTC" group="P" index="7" pad="PC7"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
<signal function="PORTD" group="P" index="2" pad="PD2"/>
<signal function="PORTD" group="P" index="3" pad="PD3"/>
<signal function="PORTD" group="P" index="4" pad="PD4"/>
<signal function="PORTD" group="P" index="5" pad="PD5"/>
<signal function="PORTD" group="P" index="6" pad="PD6"/>
<signal function="PORTD" group="P" index="7" pad="PD7"/>
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
<signal function="PORTE" group="P" index="2" pad="PE2"/>
<signal function="PORTE" group="P" index="3" pad="PE3"/>
<signal function="PORTE" group="P" index="4" pad="PE4"/>
<signal function="PORTE" group="P" index="5" pad="PE5"/>
<signal function="PORTE" group="P" index="6" pad="PE6"/>
<signal function="PORTE" group="P" index="7" pad="PE7"/>
</signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTF" group="P" index="0" pad="PF0"/>
<signal function="PORTF" group="P" index="1" pad="PF1"/>
<signal function="PORTF" group="P" index="2" pad="PF2"/>
<signal function="PORTF" group="P" index="3" pad="PF3"/>
<signal function="PORTF" group="P" index="4" pad="PF4"/>
<signal function="PORTF" group="P" index="5" pad="PF5"/>
<signal function="PORTF" group="P" index="6" pad="PF6"/>
<signal function="PORTF" group="P" index="7" pad="PF7"/>
</signals>
</instance>
</module>
<module name="CPU">
@@ -1474,4 +1535,72 @@
</value-group>
</module>
</modules>
<pinouts>
<pinout name="QFP_QFN_64">
<pin pad="PE6" position="1"/>
<pin pad="PE7" position="2"/>
<pin pad="UVCC" position="3"/>
<pin pad="D-" position="4"/>
<pin pad="D+" position="5"/>
<pin pad="UGND" position="6"/>
<pin pad="UCAP" position="7"/>
<pin pad="VBUS" position="8"/>
<pin pad="PE3" position="9"/>
<pin pad="PB0" position="10"/>
<pin pad="PB1" position="11"/>
<pin pad="PB2" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB4" position="14"/>
<pin pad="PB5" position="15"/>
<pin pad="PB6" position="16"/>
<pin pad="PB7" position="17"/>
<pin pad="PE4" position="18"/>
<pin pad="PE5" position="19"/>
<pin pad="RESET" position="20"/>
<pin pad="VCC" position="21"/>
<pin pad="GDN" position="22"/>
<pin pad="XTAL2" position="23"/>
<pin pad="XTAL1" position="24"/>
<pin pad="PD0" position="25"/>
<pin pad="PD1" position="26"/>
<pin pad="PD2" position="27"/>
<pin pad="PD3" position="28"/>
<pin pad="PD4" position="29"/>
<pin pad="PD5" position="30"/>
<pin pad="PD6" position="31"/>
<pin pad="PD7" position="32"/>
<pin pad="PE0" position="33"/>
<pin pad="PE1" position="34"/>
<pin pad="PC0" position="35"/>
<pin pad="PC1" position="36"/>
<pin pad="PC2" position="37"/>
<pin pad="PC3" position="38"/>
<pin pad="PC4" position="39"/>
<pin pad="PC5" position="40"/>
<pin pad="PC6" position="41"/>
<pin pad="PC7" position="42"/>
<pin pad="PE2" position="43"/>
<pin pad="PA7" position="44"/>
<pin pad="PA6" position="45"/>
<pin pad="PA5" position="46"/>
<pin pad="PA4" position="47"/>
<pin pad="PA3" position="48"/>
<pin pad="PA2" position="49"/>
<pin pad="PA1" position="50"/>
<pin pad="PA0" position="51"/>
<pin pad="VCC" position="52"/>
<pin pad="GND" position="53"/>
<pin pad="PF7" position="54"/>
<pin pad="PF6" position="55"/>
<pin pad="PF5" position="56"/>
<pin pad="PF4" position="57"/>
<pin pad="PF3" position="58"/>
<pin pad="PF2" position="59"/>
<pin pad="PF1" position="60"/>
<pin pad="PF0" position="61"/>
<pin pad="AREF" position="62"/>
<pin pad="GND" position="63"/>
<pin pad="AVCC" position="64"/>
</pinout>
</pinouts>
</target-description-file>

131
src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB647.xml
View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
<variant ordercode="AT90USB647-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
<variant ordercode="AT90USB647-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
</variants>
<device name="AT90USB647" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -52,26 +53,86 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
<signal function="PORTC" group="P" index="6" pad="PC6"/>
<signal function="PORTC" group="P" index="7" pad="PC7"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
<signal function="PORTD" group="P" index="2" pad="PD2"/>
<signal function="PORTD" group="P" index="3" pad="PD3"/>
<signal function="PORTD" group="P" index="4" pad="PD4"/>
<signal function="PORTD" group="P" index="5" pad="PD5"/>
<signal function="PORTD" group="P" index="6" pad="PD6"/>
<signal function="PORTD" group="P" index="7" pad="PD7"/>
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
<signal function="PORTE" group="P" index="2" pad="PE2"/>
<signal function="PORTE" group="P" index="3" pad="PE3"/>
<signal function="PORTE" group="P" index="4" pad="PE4"/>
<signal function="PORTE" group="P" index="5" pad="PE5"/>
<signal function="PORTE" group="P" index="6" pad="PE6"/>
<signal function="PORTE" group="P" index="7" pad="PE7"/>
</signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTF" group="P" index="0" pad="PF0"/>
<signal function="PORTF" group="P" index="1" pad="PF1"/>
<signal function="PORTF" group="P" index="2" pad="PF2"/>
<signal function="PORTF" group="P" index="3" pad="PF3"/>
<signal function="PORTF" group="P" index="4" pad="PF4"/>
<signal function="PORTF" group="P" index="5" pad="PF5"/>
<signal function="PORTF" group="P" index="6" pad="PF6"/>
<signal function="PORTF" group="P" index="7" pad="PF7"/>
</signals>
</instance>
</module>
<module name="CPU">
@@ -1474,4 +1535,72 @@
</value-group>
</module>
</modules>
<pinouts>
<pinout name="QFP_QFN_64">
<pin pad="PE6" position="1"/>
<pin pad="PE7" position="2"/>
<pin pad="UVCC" position="3"/>
<pin pad="D-" position="4"/>
<pin pad="D+" position="5"/>
<pin pad="UGND" position="6"/>
<pin pad="UCAP" position="7"/>
<pin pad="VBUS" position="8"/>
<pin pad="PE3" position="9"/>
<pin pad="PB0" position="10"/>
<pin pad="PB1" position="11"/>
<pin pad="PB2" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB4" position="14"/>
<pin pad="PB5" position="15"/>
<pin pad="PB6" position="16"/>
<pin pad="PB7" position="17"/>
<pin pad="PE4" position="18"/>
<pin pad="PE5" position="19"/>
<pin pad="RESET" position="20"/>
<pin pad="VCC" position="21"/>
<pin pad="GDN" position="22"/>
<pin pad="XTAL2" position="23"/>
<pin pad="XTAL1" position="24"/>
<pin pad="PD0" position="25"/>
<pin pad="PD1" position="26"/>
<pin pad="PD2" position="27"/>
<pin pad="PD3" position="28"/>
<pin pad="PD4" position="29"/>
<pin pad="PD5" position="30"/>
<pin pad="PD6" position="31"/>
<pin pad="PD7" position="32"/>
<pin pad="PE0" position="33"/>
<pin pad="PE1" position="34"/>
<pin pad="PC0" position="35"/>
<pin pad="PC1" position="36"/>
<pin pad="PC2" position="37"/>
<pin pad="PC3" position="38"/>
<pin pad="PC4" position="39"/>
<pin pad="PC5" position="40"/>
<pin pad="PC6" position="41"/>
<pin pad="PC7" position="42"/>
<pin pad="PE2" position="43"/>
<pin pad="PA7" position="44"/>
<pin pad="PA6" position="45"/>
<pin pad="PA5" position="46"/>
<pin pad="PA4" position="47"/>
<pin pad="PA3" position="48"/>
<pin pad="PA2" position="49"/>
<pin pad="PA1" position="50"/>
<pin pad="PA0" position="51"/>
<pin pad="VCC" position="52"/>
<pin pad="GND" position="53"/>
<pin pad="PF7" position="54"/>
<pin pad="PF6" position="55"/>
<pin pad="PF5" position="56"/>
<pin pad="PF4" position="57"/>
<pin pad="PF3" position="58"/>
<pin pad="PF2" position="59"/>
<pin pad="PF1" position="60"/>
<pin pad="PF0" position="61"/>
<pin pad="AREF" position="62"/>
<pin pad="GND" position="63"/>
<pin pad="AVCC" position="64"/>
</pinout>
</pinouts>
</target-description-file>

139
src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325.xml
View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
<variant ordercode="ATmega325-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
<variant ordercode="ATmega325-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
</variants>
<device name="ATmega325" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -99,30 +100,98 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
<signal function="PORTC" group="P" index="6" pad="PC6"/>
<signal function="PORTC" group="P" index="7" pad="PC7"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
<signal function="PORTD" group="P" index="2" pad="PD2"/>
<signal function="PORTD" group="P" index="3" pad="PD3"/>
<signal function="PORTD" group="P" index="4" pad="PD4"/>
<signal function="PORTD" group="P" index="5" pad="PD5"/>
<signal function="PORTD" group="P" index="6" pad="PD6"/>
<signal function="PORTD" group="P" index="7" pad="PD7"/>
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
<signal function="PORTE" group="P" index="2" pad="PE2"/>
<signal function="PORTE" group="P" index="3" pad="PE3"/>
<signal function="PORTE" group="P" index="4" pad="PE4"/>
<signal function="PORTE" group="P" index="5" pad="PE5"/>
<signal function="PORTE" group="P" index="6" pad="PE6"/>
<signal function="PORTE" group="P" index="7" pad="PE7"/>
</signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTF" group="P" index="0" pad="PF0"/>
<signal function="PORTF" group="P" index="1" pad="PF1"/>
<signal function="PORTF" group="P" index="2" pad="PF2"/>
<signal function="PORTF" group="P" index="3" pad="PF3"/>
<signal function="PORTF" group="P" index="4" pad="PF4"/>
<signal function="PORTF" group="P" index="5" pad="PF5"/>
<signal function="PORTF" group="P" index="6" pad="PF6"/>
<signal function="PORTF" group="P" index="7" pad="PF7"/>
</signals>
</instance>
<instance name="PORTG" caption="I/O Port">
<register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTG" group="P" index="0" pad="PG0"/>
<signal function="PORTG" group="P" index="1" pad="PG1"/>
<signal function="PORTG" group="P" index="2" pad="PG2"/>
<signal function="PORTG" group="P" index="3" pad="PG3"/>
<signal function="PORTG" group="P" index="4" pad="PG4"/>
<signal function="PORTG" group="P" index="5" pad="PG5"/>
</signals>
</instance>
</module>
<module name="TC8">
@@ -1007,4 +1076,72 @@
</value-group>
</module>
</modules>
<pinouts>
<pinout name="QFP_QFN_64">
<pin pad="DNC" position="1"/>
<pin pad="PE0" position="2"/>
<pin pad="PE1" position="3"/>
<pin pad="PE2" position="4"/>
<pin pad="PE3" position="5"/>
<pin pad="PE4" position="6"/>
<pin pad="PE5" position="7"/>
<pin pad="PE6" position="8"/>
<pin pad="PE7" position="9"/>
<pin pad="PB0" position="10"/>
<pin pad="PB1" position="11"/>
<pin pad="PB2" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB4" position="14"/>
<pin pad="PB5" position="15"/>
<pin pad="PB6" position="16"/>
<pin pad="PB7" position="17"/>
<pin pad="PG3" position="18"/>
<pin pad="PG4" position="19"/>
<pin pad="PG5" position="20"/>
<pin pad="VCC" position="21"/>
<pin pad="GDN" position="22"/>
<pin pad="XTAL2" position="23"/>
<pin pad="XTAL1" position="24"/>
<pin pad="PD0" position="25"/>
<pin pad="PD1" position="26"/>
<pin pad="PD2" position="27"/>
<pin pad="PD3" position="28"/>
<pin pad="PD4" position="29"/>
<pin pad="PD5" position="30"/>
<pin pad="PD6" position="31"/>
<pin pad="PD7" position="32"/>
<pin pad="PG0" position="33"/>
<pin pad="PG1" position="34"/>
<pin pad="PC0" position="35"/>
<pin pad="PC1" position="36"/>
<pin pad="PC2" position="37"/>
<pin pad="PC3" position="38"/>
<pin pad="PC4" position="39"/>
<pin pad="PC5" position="40"/>
<pin pad="PC6" position="41"/>
<pin pad="PC7" position="42"/>
<pin pad="PG2" position="43"/>
<pin pad="PA7" position="44"/>
<pin pad="PA6" position="45"/>
<pin pad="PA5" position="46"/>
<pin pad="PA4" position="47"/>
<pin pad="PA3" position="48"/>
<pin pad="PA2" position="49"/>
<pin pad="PA1" position="50"/>
<pin pad="PA0" position="51"/>
<pin pad="VCC" position="52"/>
<pin pad="GND" position="53"/>
<pin pad="PF7" position="54"/>
<pin pad="PF6" position="55"/>
<pin pad="PF5" position="56"/>
<pin pad="PF4" position="57"/>
<pin pad="PF3" position="58"/>
<pin pad="PF2" position="59"/>
<pin pad="PF1" position="60"/>
<pin pad="PF0" position="61"/>
<pin pad="AREF" position="62"/>
<pin pad="GND" position="63"/>
<pin pad="AVCC" position="64"/>
</pinout>
</pinouts>
</target-description-file>

139
src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325A.xml
View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
<variant ordercode="ATmega325A-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
<variant ordercode="ATmega325A-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
</variants>
<device name="ATmega325A" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -99,30 +100,98 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
<signal function="PORTC" group="P" index="6" pad="PC6"/>
<signal function="PORTC" group="P" index="7" pad="PC7"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
<signal function="PORTD" group="P" index="2" pad="PD2"/>
<signal function="PORTD" group="P" index="3" pad="PD3"/>
<signal function="PORTD" group="P" index="4" pad="PD4"/>
<signal function="PORTD" group="P" index="5" pad="PD5"/>
<signal function="PORTD" group="P" index="6" pad="PD6"/>
<signal function="PORTD" group="P" index="7" pad="PD7"/>
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
<signal function="PORTE" group="P" index="2" pad="PE2"/>
<signal function="PORTE" group="P" index="3" pad="PE3"/>
<signal function="PORTE" group="P" index="4" pad="PE4"/>
<signal function="PORTE" group="P" index="5" pad="PE5"/>
<signal function="PORTE" group="P" index="6" pad="PE6"/>
<signal function="PORTE" group="P" index="7" pad="PE7"/>
</signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTF" group="P" index="0" pad="PF0"/>
<signal function="PORTF" group="P" index="1" pad="PF1"/>
<signal function="PORTF" group="P" index="2" pad="PF2"/>
<signal function="PORTF" group="P" index="3" pad="PF3"/>
<signal function="PORTF" group="P" index="4" pad="PF4"/>
<signal function="PORTF" group="P" index="5" pad="PF5"/>
<signal function="PORTF" group="P" index="6" pad="PF6"/>
<signal function="PORTF" group="P" index="7" pad="PF7"/>
</signals>
</instance>
<instance name="PORTG" caption="I/O Port">
<register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTG" group="P" index="0" pad="PG0"/>
<signal function="PORTG" group="P" index="1" pad="PG1"/>
<signal function="PORTG" group="P" index="2" pad="PG2"/>
<signal function="PORTG" group="P" index="3" pad="PG3"/>
<signal function="PORTG" group="P" index="4" pad="PG4"/>
<signal function="PORTG" group="P" index="5" pad="PG5"/>
</signals>
</instance>
</module>
<module name="TC8">
@@ -1009,4 +1078,72 @@
</value-group>
</module>
</modules>
<pinouts>
<pinout name="QFP_QFN_64">
<pin pad="DNC" position="1"/>
<pin pad="PE0" position="2"/>
<pin pad="PE1" position="3"/>
<pin pad="PE2" position="4"/>
<pin pad="PE3" position="5"/>
<pin pad="PE4" position="6"/>
<pin pad="PE5" position="7"/>
<pin pad="PE6" position="8"/>
<pin pad="PE7" position="9"/>
<pin pad="PB0" position="10"/>
<pin pad="PB1" position="11"/>
<pin pad="PB2" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB4" position="14"/>
<pin pad="PB5" position="15"/>
<pin pad="PB6" position="16"/>
<pin pad="PB7" position="17"/>
<pin pad="PG3" position="18"/>
<pin pad="PG4" position="19"/>
<pin pad="PG5" position="20"/>
<pin pad="VCC" position="21"/>
<pin pad="GDN" position="22"/>
<pin pad="XTAL2" position="23"/>
<pin pad="XTAL1" position="24"/>
<pin pad="PD0" position="25"/>
<pin pad="PD1" position="26"/>
<pin pad="PD2" position="27"/>
<pin pad="PD3" position="28"/>
<pin pad="PD4" position="29"/>
<pin pad="PD5" position="30"/>
<pin pad="PD6" position="31"/>
<pin pad="PD7" position="32"/>
<pin pad="PG0" position="33"/>
<pin pad="PG1" position="34"/>
<pin pad="PC0" position="35"/>
<pin pad="PC1" position="36"/>
<pin pad="PC2" position="37"/>
<pin pad="PC3" position="38"/>
<pin pad="PC4" position="39"/>
<pin pad="PC5" position="40"/>
<pin pad="PC6" position="41"/>
<pin pad="PC7" position="42"/>
<pin pad="PG2" position="43"/>
<pin pad="PA7" position="44"/>
<pin pad="PA6" position="45"/>
<pin pad="PA5" position="46"/>
<pin pad="PA4" position="47"/>
<pin pad="PA3" position="48"/>
<pin pad="PA2" position="49"/>
<pin pad="PA1" position="50"/>
<pin pad="PA0" position="51"/>
<pin pad="VCC" position="52"/>
<pin pad="GND" position="53"/>
<pin pad="PF7" position="54"/>
<pin pad="PF6" position="55"/>
<pin pad="PF5" position="56"/>
<pin pad="PF4" position="57"/>
<pin pad="PF3" position="58"/>
<pin pad="PF2" position="59"/>
<pin pad="PF1" position="60"/>
<pin pad="PF0" position="61"/>
<pin pad="AREF" position="62"/>
<pin pad="GND" position="63"/>
<pin pad="AVCC" position="64"/>
</pinout>
</pinouts>
</target-description-file>

139
src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325P.xml
View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
<variant ordercode="ATmega325P-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
<variant ordercode="ATmega325P-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
</variants>
<device name="ATmega325P" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -99,30 +100,98 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
<signal function="PORTC" group="P" index="6" pad="PC6"/>
<signal function="PORTC" group="P" index="7" pad="PC7"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
<signal function="PORTD" group="P" index="2" pad="PD2"/>
<signal function="PORTD" group="P" index="3" pad="PD3"/>
<signal function="PORTD" group="P" index="4" pad="PD4"/>
<signal function="PORTD" group="P" index="5" pad="PD5"/>
<signal function="PORTD" group="P" index="6" pad="PD6"/>
<signal function="PORTD" group="P" index="7" pad="PD7"/>
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
<signal function="PORTE" group="P" index="2" pad="PE2"/>
<signal function="PORTE" group="P" index="3" pad="PE3"/>
<signal function="PORTE" group="P" index="4" pad="PE4"/>
<signal function="PORTE" group="P" index="5" pad="PE5"/>
<signal function="PORTE" group="P" index="6" pad="PE6"/>
<signal function="PORTE" group="P" index="7" pad="PE7"/>
</signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTF" group="P" index="0" pad="PF0"/>
<signal function="PORTF" group="P" index="1" pad="PF1"/>
<signal function="PORTF" group="P" index="2" pad="PF2"/>
<signal function="PORTF" group="P" index="3" pad="PF3"/>
<signal function="PORTF" group="P" index="4" pad="PF4"/>
<signal function="PORTF" group="P" index="5" pad="PF5"/>
<signal function="PORTF" group="P" index="6" pad="PF6"/>
<signal function="PORTF" group="P" index="7" pad="PF7"/>
</signals>
</instance>
<instance name="PORTG" caption="I/O Port">
<register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTG" group="P" index="0" pad="PG0"/>
<signal function="PORTG" group="P" index="1" pad="PG1"/>
<signal function="PORTG" group="P" index="2" pad="PG2"/>
<signal function="PORTG" group="P" index="3" pad="PG3"/>
<signal function="PORTG" group="P" index="4" pad="PG4"/>
<signal function="PORTG" group="P" index="5" pad="PG5"/>
</signals>
</instance>
</module>
<module name="TC8">
@@ -1011,4 +1080,72 @@
</value-group>
</module>
</modules>
<pinouts>
<pinout name="QFP_QFN_64">
<pin pad="DNC" position="1"/>
<pin pad="PE0" position="2"/>
<pin pad="PE1" position="3"/>
<pin pad="PE2" position="4"/>
<pin pad="PE3" position="5"/>
<pin pad="PE4" position="6"/>
<pin pad="PE5" position="7"/>
<pin pad="PE6" position="8"/>
<pin pad="PE7" position="9"/>
<pin pad="PB0" position="10"/>
<pin pad="PB1" position="11"/>
<pin pad="PB2" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB4" position="14"/>
<pin pad="PB5" position="15"/>
<pin pad="PB6" position="16"/>
<pin pad="PB7" position="17"/>
<pin pad="PG3" position="18"/>
<pin pad="PG4" position="19"/>
<pin pad="PG5" position="20"/>
<pin pad="VCC" position="21"/>
<pin pad="GDN" position="22"/>
<pin pad="XTAL2" position="23"/>
<pin pad="XTAL1" position="24"/>
<pin pad="PD0" position="25"/>
<pin pad="PD1" position="26"/>
<pin pad="PD2" position="27"/>
<pin pad="PD3" position="28"/>
<pin pad="PD4" position="29"/>
<pin pad="PD5" position="30"/>
<pin pad="PD6" position="31"/>
<pin pad="PD7" position="32"/>
<pin pad="PG0" position="33"/>
<pin pad="PG1" position="34"/>
<pin pad="PC0" position="35"/>
<pin pad="PC1" position="36"/>
<pin pad="PC2" position="37"/>
<pin pad="PC3" position="38"/>
<pin pad="PC4" position="39"/>
<pin pad="PC5" position="40"/>
<pin pad="PC6" position="41"/>
<pin pad="PC7" position="42"/>
<pin pad="PG2" position="43"/>
<pin pad="PA7" position="44"/>
<pin pad="PA6" position="45"/>
<pin pad="PA5" position="46"/>
<pin pad="PA4" position="47"/>
<pin pad="PA3" position="48"/>
<pin pad="PA2" position="49"/>
<pin pad="PA1" position="50"/>
<pin pad="PA0" position="51"/>
<pin pad="VCC" position="52"/>
<pin pad="GND" position="53"/>
<pin pad="PF7" position="54"/>
<pin pad="PF6" position="55"/>
<pin pad="PF5" position="56"/>
<pin pad="PF4" position="57"/>
<pin pad="PF3" position="58"/>
<pin pad="PF2" position="59"/>
<pin pad="PF1" position="60"/>
<pin pad="PF0" position="61"/>
<pin pad="AREF" position="62"/>
<pin pad="GND" position="63"/>
<pin pad="AVCC" position="64"/>
</pinout>
</pinouts>
</target-description-file>

139
src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA325PA.xml
View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
<variant ordercode="ATmega325PA-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
<variant ordercode="ATmega325PA-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
</variants>
<device name="ATmega325PA" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -99,30 +100,98 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
<signal function="PORTC" group="P" index="6" pad="PC6"/>
<signal function="PORTC" group="P" index="7" pad="PC7"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
<signal function="PORTD" group="P" index="2" pad="PD2"/>
<signal function="PORTD" group="P" index="3" pad="PD3"/>
<signal function="PORTD" group="P" index="4" pad="PD4"/>
<signal function="PORTD" group="P" index="5" pad="PD5"/>
<signal function="PORTD" group="P" index="6" pad="PD6"/>
<signal function="PORTD" group="P" index="7" pad="PD7"/>
</signals>
</instance>
<instance name="PORTE" caption="I/O Port">
<register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTE" group="P" index="0" pad="PE0"/>
<signal function="PORTE" group="P" index="1" pad="PE1"/>
<signal function="PORTE" group="P" index="2" pad="PE2"/>
<signal function="PORTE" group="P" index="3" pad="PE3"/>
<signal function="PORTE" group="P" index="4" pad="PE4"/>
<signal function="PORTE" group="P" index="5" pad="PE5"/>
<signal function="PORTE" group="P" index="6" pad="PE6"/>
<signal function="PORTE" group="P" index="7" pad="PE7"/>
</signals>
</instance>
<instance name="PORTF" caption="I/O Port">
<register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTF" group="P" index="0" pad="PF0"/>
<signal function="PORTF" group="P" index="1" pad="PF1"/>
<signal function="PORTF" group="P" index="2" pad="PF2"/>
<signal function="PORTF" group="P" index="3" pad="PF3"/>
<signal function="PORTF" group="P" index="4" pad="PF4"/>
<signal function="PORTF" group="P" index="5" pad="PF5"/>
<signal function="PORTF" group="P" index="6" pad="PF6"/>
<signal function="PORTF" group="P" index="7" pad="PF7"/>
</signals>
</instance>
<instance name="PORTG" caption="I/O Port">
<register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTG" group="P" index="0" pad="PG0"/>
<signal function="PORTG" group="P" index="1" pad="PG1"/>
<signal function="PORTG" group="P" index="2" pad="PG2"/>
<signal function="PORTG" group="P" index="3" pad="PG3"/>
<signal function="PORTG" group="P" index="4" pad="PG4"/>
<signal function="PORTG" group="P" index="5" pad="PG5"/>
</signals>
</instance>
</module>
<module name="TC8">
@@ -1007,4 +1076,72 @@
</value-group>
</module>
</modules>
<pinouts>
<pinout name="QFP_QFN_64">
<pin pad="DNC" position="1"/>
<pin pad="PE0" position="2"/>
<pin pad="PE1" position="3"/>
<pin pad="PE2" position="4"/>
<pin pad="PE3" position="5"/>
<pin pad="PE4" position="6"/>
<pin pad="PE5" position="7"/>
<pin pad="PE6" position="8"/>
<pin pad="PE7" position="9"/>
<pin pad="PB0" position="10"/>
<pin pad="PB1" position="11"/>
<pin pad="PB2" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB4" position="14"/>
<pin pad="PB5" position="15"/>
<pin pad="PB6" position="16"/>
<pin pad="PB7" position="17"/>
<pin pad="PG3" position="18"/>
<pin pad="PG4" position="19"/>
<pin pad="PG5" position="20"/>
<pin pad="VCC" position="21"/>
<pin pad="GDN" position="22"/>
<pin pad="XTAL2" position="23"/>
<pin pad="XTAL1" position="24"/>
<pin pad="PD0" position="25"/>
<pin pad="PD1" position="26"/>
<pin pad="PD2" position="27"/>
<pin pad="PD3" position="28"/>
<pin pad="PD4" position="29"/>
<pin pad="PD5" position="30"/>
<pin pad="PD6" position="31"/>
<pin pad="PD7" position="32"/>
<pin pad="PG0" position="33"/>
<pin pad="PG1" position="34"/>
<pin pad="PC0" position="35"/>
<pin pad="PC1" position="36"/>
<pin pad="PC2" position="37"/>
<pin pad="PC3" position="38"/>
<pin pad="PC4" position="39"/>
<pin pad="PC5" position="40"/>
<pin pad="PC6" position="41"/>
<pin pad="PC7" position="42"/>
<pin pad="PG2" position="43"/>
<pin pad="PA7" position="44"/>
<pin pad="PA6" position="45"/>
<pin pad="PA5" position="46"/>
<pin pad="PA4" position="47"/>
<pin pad="PA3" position="48"/>
<pin pad="PA2" position="49"/>
<pin pad="PA1" position="50"/>
<pin pad="PA0" position="51"/>
<pin pad="VCC" position="52"/>
<pin pad="GND" position="53"/>
<pin pad="PF7" position="54"/>
<pin pad="PF6" position="55"/>
<pin pad="PF5" position="56"/>
<pin pad="PF4" position="57"/>
<pin pad="PF3" position="58"/>
<pin pad="PF2" position="59"/>
<pin pad="PF1" position="60"/>
<pin pad="PF0" position="61"/>
<pin pad="AREF" position="62"/>
<pin pad="GND" position="63"/>
<pin pad="AVCC" position="64"/>
</pinout>
</pinouts>
</target-description-file>

81
src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA406.xml
View File

@@ -1,7 +1,7 @@
<?xml version="1.0" encoding="UTF-8"?>
<target-description-file>
<variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="4.0" vccmax="5.5"/>
<variant ordercode="ATmega406-1AAU" package="LQFP48" pinout="QFP48" tempmax="85" tempmin="-40"/>
</variants>
<device name="ATmega406" architecture="AVR8" family="megaAVR">
<address-spaces>
@@ -111,18 +111,45 @@
<instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance>
<instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
<signal function="PORTB" group="P" index="4" pad="PB4"/>
<signal function="PORTB" group="P" index="5" pad="PB5"/>
<signal function="PORTB" group="P" index="6" pad="PB6"/>
<signal function="PORTB" group="P" index="7" pad="PB7"/>
</signals>
</instance>
<instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
</signals>
</instance>
<instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/>
<signals>
<signal function="PORTD" group="P" index="0" pad="PD0"/>
<signal function="PORTD" group="P" index="1" pad="PD1"/>
</signals>
</instance>
</module>
<module name="BOOT_LOAD">
@@ -833,4 +860,56 @@
</value-group>
</module>
</modules>
<pinouts>
<pinout name="QFP48">
<pin pad="SGND" position="1"/>
<pin pad="PA0" position="2"/>
<pin pad="PA1" position="3"/>
<pin pad="PA2" position="4"/>
<pin pad="PA3" position="5"/>
<pin pad="VREG" position="6"/>
<pin pad="VCC" position="7"/>
<pin pad="GND" position="8"/>
<pin pad="PA4" position="9"/>
<pin pad="PA5" position="10"/>
<pin pad="PA6" position="11"/>
<pin pad="PA7" position="12"/>
<pin pad="RESET" position="13"/>
<pin pad="XTAL1" position="14"/>
<pin pad="XTAL2" position="15"/>
<pin pad="GND" position="16"/>
<pin pad="PB0" position="17"/>
<pin pad="PB1" position="18"/>
<pin pad="PB2" position="19"/>
<pin pad="PB3" position="20"/>
<pin pad="PB4" position="21"/>
<pin pad="PB5" position="22"/>
<pin pad="SCL" position="23"/>
<pin pad="SDA" position="24"/>
<pin pad="PB6" position="25"/>
<pin pad="PB7" position="26"/>
<pin pad="PD0" position="27"/>
<pin pad="PD1" position="28"/>
<pin pad="GND" position="29"/>
<pin pad="PC0" position="30"/>
<pin pad="BATT" position="31"/>
<pin pad="OPC" position="32"/>
<pin pad="OC" position="33"/>
<pin pad="VFET" position="34"/>
<pin pad="OD" position="35"/>
<pin pad="PVT1" position="36"/>
<pin pad="GND" position="37"/>
<pin pad="PV4" position="38"/>
<pin pad="PV3" position="39"/>
<pin pad="PV2" position="40"/>
<pin pad="PV1" position="41"/>
<pin pad="NV" position="42"/>
<pin pad="VREF" position="43"/>
<pin pad="VREFGND" position="44"/>
<pin pad="PPI" position="45"/>
<pin pad="PI" position="46"/>
<pin pad="NI" position="47"/>
<pin pad="NNI" position="48"/>
</pinout>
</pinouts>
</target-description-file>