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TDF and TDF script changes (application changes pending):

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- Added new `pad` element to TDFs
- Refactored `pin` and `signal` elements to accommodate new `pad` element
- Improved validation of signal-to-pad relation in TDF validation script
- Added key attribute to `variant` element
- Removed `package` attribute from `variant` element
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2024-08-13 22:17:49 +01:00
parent d44eb49ca1
commit 8ba29c258d
269 changed files with 60017 additions and 48825 deletions
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114
src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44.xml
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@@ -170,23 +170,23 @@
<peripheral key="porta" name="PORTA" module-key="gpio_port">
<register-group-instance description="I/O Port" register-group-key="porta" address-space-key="data" offset="0x0"/>
<signals>
<signal pad-id="pa0" index="0" function="PORTA" group="P"/>
<signal pad-id="pa1" index="1" function="PORTA" group="P"/>
<signal pad-id="pa2" index="2" function="PORTA" group="P"/>
<signal pad-id="pa3" index="3" function="PORTA" group="P"/>
<signal pad-id="pa4" index="4" function="PORTA" group="P"/>
<signal pad-id="pa5" index="5" function="PORTA" group="P"/>
<signal pad-id="pa6" index="6" function="PORTA" group="P"/>
<signal pad-id="pa7" index="7" function="PORTA" group="P"/>
<signal pad-key="pa0" index="0" function="PORTA" group="P"/>
<signal pad-key="pa1" index="1" function="PORTA" group="P"/>
<signal pad-key="pa2" index="2" function="PORTA" group="P"/>
<signal pad-key="pa3" index="3" function="PORTA" group="P"/>
<signal pad-key="pa4" index="4" function="PORTA" group="P"/>
<signal pad-key="pa5" index="5" function="PORTA" group="P"/>
<signal pad-key="pa6" index="6" function="PORTA" group="P"/>
<signal pad-key="pa7" index="7" function="PORTA" group="P"/>
</signals>
</peripheral>
<peripheral key="portb" name="PORTB" module-key="gpio_port">
<register-group-instance description="I/O Port" register-group-key="portb" address-space-key="data" offset="0x0"/>
<signals>
<signal pad-id="pb0" index="0" function="PORTB" group="P"/>
<signal pad-id="pb1" index="1" function="PORTB" group="P"/>
<signal pad-id="pb2" index="2" function="PORTB" group="P"/>
<signal pad-id="pb3" index="3" function="PORTB" group="P"/>
<signal pad-key="pb0" index="0" function="PORTB" group="P"/>
<signal pad-key="pb1" index="1" function="PORTB" group="P"/>
<signal pad-key="pb2" index="2" function="PORTB" group="P"/>
<signal pad-key="pb3" index="3" function="PORTB" group="P"/>
</signals>
</peripheral>
<peripheral key="ac" name="AC" module-key="ac">
@@ -490,49 +490,65 @@
</register-group>
</module>
</modules>
<pads>
<pad key="vcc" name="VCC"/>
<pad key="pb0" name="PB0"/>
<pad key="pb1" name="PB1"/>
<pad key="pb3" name="PB3"/>
<pad key="pb2" name="PB2"/>
<pad key="pa7" name="PA7"/>
<pad key="pa6" name="PA6"/>
<pad key="pa5" name="PA5"/>
<pad key="pa4" name="PA4"/>
<pad key="pa3" name="PA3"/>
<pad key="pa2" name="PA2"/>
<pad key="pa1" name="PA1"/>
<pad key="pa0" name="PA0"/>
<pad key="gnd" name="GND"/>
</pads>
<pinouts>
<pinout key="soic_14" name="SOIC_14" type="soic">
<pin position="1" pad="VCC"/>
<pin position="2" pad="PB0"/>
<pin position="3" pad="PB1"/>
<pin position="4" pad="PB3"/>
<pin position="5" pad="PB2"/>
<pin position="6" pad="PA7"/>
<pin position="7" pad="PA6"/>
<pin position="8" pad="PA5"/>
<pin position="9" pad="PA4"/>
<pin position="10" pad="PA3"/>
<pin position="11" pad="PA2"/>
<pin position="12" pad="PA1"/>
<pin position="13" pad="PA0"/>
<pin position="14" pad="GND"/>
<pin position="1" pad-key="vcc"/>
<pin position="2" pad-key="pb0"/>
<pin position="3" pad-key="pb1"/>
<pin position="4" pad-key="pb3"/>
<pin position="5" pad-key="pb2"/>
<pin position="6" pad-key="pa7"/>
<pin position="7" pad-key="pa6"/>
<pin position="8" pad-key="pa5"/>
<pin position="9" pad-key="pa4"/>
<pin position="10" pad-key="pa3"/>
<pin position="11" pad-key="pa2"/>
<pin position="12" pad-key="pa1"/>
<pin position="13" pad-key="pa0"/>
<pin position="14" pad-key="gnd"/>
</pinout>
<pinout key="qfn_20" name="QFN_20" type="qfn">
<pin position="1" pad="PA4"/>
<pin position="2" pad="PA3"/>
<pin position="3" pad="PA2"/>
<pin position="4" pad="PA1"/>
<pin position="5" pad="PA0"/>
<pin position="6" pad="NC"/>
<pin position="7" pad="NC"/>
<pin position="8" pad="GND"/>
<pin position="9" pad="VCC"/>
<pin position="10" pad="NC"/>
<pin position="11" pad="PB0"/>
<pin position="12" pad="PB1"/>
<pin position="13" pad="PB3"/>
<pin position="14" pad="PB2"/>
<pin position="15" pad="PA7"/>
<pin position="16" pad="PA6"/>
<pin position="17" pad="NC"/>
<pin position="18" pad="NC"/>
<pin position="19" pad="NC"/>
<pin position="20" pad="PA5"/>
<pin position="1" pad-key="pa4"/>
<pin position="2" pad-key="pa3"/>
<pin position="3" pad-key="pa2"/>
<pin position="4" pad-key="pa1"/>
<pin position="5" pad-key="pa0"/>
<pin position="6"/>
<pin position="7"/>
<pin position="8" pad-key="gnd"/>
<pin position="9" pad-key="vcc"/>
<pin position="10"/>
<pin position="11" pad-key="pb0"/>
<pin position="12" pad-key="pb1"/>
<pin position="13" pad-key="pb3"/>
<pin position="14" pad-key="pb2"/>
<pin position="15" pad-key="pa7"/>
<pin position="16" pad-key="pa6"/>
<pin position="17"/>
<pin position="18"/>
<pin position="19"/>
<pin position="20" pad-key="pa5"/>
</pinout>
</pinouts>
<variants>
<variant name="ATtiny44-20PU" pinout-key="soic_14" package="PDIP14"/>
<variant name="ATtiny44-20SSU" pinout-key="soic_14" package="SOIC14"/>
<variant name="ATtiny44-20MU" pinout-key="qfn_20" package="WQFN20"/>
<variant key="attiny44_20pu" name="ATtiny44-20PU" pinout-key="soic_14"/>
<variant key="attiny44_20ssu" name="ATtiny44-20SSU" pinout-key="soic_14"/>
<variant key="attiny44_20mu" name="ATtiny44-20MU" pinout-key="qfn_20"/>
</variants>
</device>