Initial pass at a RiscVDebugInterface and implementation (for WCH-Link debug tools)

src/Targets/RiscV/DebugModule/DebugModule.hpp

@@ -0,0 +1,27 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+#include <set>
+#include <optional>
+
+namespace Targets::RiscV::DebugModule
+{
+    using RegisterAddress = std::uint8_t;
+    using RegisterValue = std::uint32_t;
+    using HartIndex = std::uint32_t;
+
+    enum class DmiOperation: std::uint8_t
+    {
+        IGNORE = 0x00,
+        READ = 0x01,
+        WRITE = 0x02,
+    };
+
+    enum class DmiOperationStatus: std::uint8_t
+    {
+        SUCCESS = 0x00,
+        FAILED = 0x02,
+        BUSY = 0x03,
+    };
+}

src/Targets/RiscV/TargetParameters.hpp

@@ -0,0 +1,11 @@
+#pragma once
+
+#include <cstdint>
+
+#include "src/Targets/TargetMemory.hpp"
+
+namespace Targets::RiscV
+{
+    struct TargetParameters
+    {};
+}