diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
index ca32a4fa..91765f47 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
@@ -452,7 +452,6 @@
                 <register key="twbr" name="TWBR" description="TWI Bit Rate Register" offset="0xB8" size="1"/>
                 <register key="twsr" name="TWSR" description="TWI Status Register" offset="0xB9" size="1">
                     <bit-field key="tws" name="TWS" description="TWI Status" mask="0xF8"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x4"/>
                     <bit-field key="twps" name="TWPS" description="TWI Prescaler Bits" mask="0x3"/>
                 </register>
                 <register key="twar" name="TWAR" description="TWI (Slave) Address Register" offset="0xBA" size="1">
@@ -467,12 +466,10 @@
                     <bit-field key="twsto" name="TWSTO" description="TWI STOP Condition Bit" mask="0x10"/>
                     <bit-field key="twwc" name="TWWC" description="TWI Write Collision Flag" mask="0x8"/>
                     <bit-field key="twen" name="TWEN" description="TWI Enable Bit" mask="0x4"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x2"/>
                     <bit-field key="twie" name="TWIE" description="TWI Interrupt Enable" mask="0x1"/>
                 </register>
                 <register key="twamr" name="TWAMR" description="TWI (Slave) Address Mask Register" offset="0xBD" size="1">
                     <bit-field key="twam" name="TWAM" description="TWI Address Mask" mask="0xFE"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x1"/>
                 </register>
             </register-group>
         </module>
@@ -490,7 +487,6 @@
                 <register key="spsr" name="SPSR" description="SPI Status Register" offset="0x4D" size="1">
                     <bit-field key="spif" name="SPIF" description="SPI Interrupt Flag" mask="0x80"/>
                     <bit-field key="wcol" name="WCOL" description="Write Collision Flag" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x3E"/>
                     <bit-field key="spi2x" name="SPI2X" description="Double SPI Speed Bit" mask="0x1"/>
                 </register>
                 <register key="spdr" name="SPDR" description="SPI Data Register" offset="0x4E" size="1"/>
@@ -574,27 +570,23 @@
         <module key="tc8" name="TC8" description="Timer/Counter, 8-bit">
             <register-group key="tc0" name="TC0">
                 <register key="tifr0" name="TIFR0" description="Timer/Counter0 Interrupt Flag Register" offset="0x35" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF8"/>
                     <bit-field key="ocf0b" name="OCF0B" description="Timer/Counter0 Output Compare B Match Flag" mask="0x4"/>
                     <bit-field key="ocf0a" name="OCF0A" description="Timer/Counter0 Output Compare A Match Flag" mask="0x2"/>
                     <bit-field key="tov0" name="TOV0" description="Timer/Counter0 Overflow Flag" mask="0x1"/>
                 </register>
                 <register key="gtccr" name="GTCCR" description="General Timer/Counter Control Register" offset="0x43" size="1">
                     <bit-field key="tsm" name="TSM" description="Timer/Counter Synchronization Mode" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x7C"/>
                     <bit-field key="psrasy" name="PSRASY" description="Prescaler Reset Timer/Counter2" mask="0x2"/>
                     <bit-field key="psrsync" name="PSRSYNC" description="Prescaler Reset for Synchronous Timer/Counters" mask="0x1"/>
                 </register>
                 <register key="tccr0a" name="TCCR0A" description="Timer/Counter0 Control Register A" offset="0x44" size="1">
                     <bit-field key="com0a" name="COM0A" description="Compare Match Output A Mode" mask="0xC0"/>
                     <bit-field key="com0b" name="COM0B" description="Compare Match Output B Mode" mask="0x30"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC"/>
                     <bit-field key="wgm0" name="WGM0" description="Waveform Generation Mode" mask="0x3"/>
                 </register>
                 <register key="tccr0b" name="TCCR0B" description="Timer/Counter0 Control Register B" offset="0x45" size="1">
                     <bit-field key="foc0a" name="FOC0A" description="Force Output Compare A" mask="0x80"/>
                     <bit-field key="foc0b" name="FOC0B" description="Force Output Compare B" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x30"/>
                     <bit-field key="wgm02" name="WGM02" mask="0x8"/>
                     <bit-field key="cs0" name="CS0" description="Clock Select" mask="0x7"/>
                 </register>
@@ -602,7 +594,6 @@
                 <register key="ocr0a" name="OCR0A" description="Timer/Counter0 Output Compare Register" offset="0x47" size="1"/>
                 <register key="ocr0b" name="OCR0B" description="Timer/Counter0 Output Compare Register B" offset="0x48" size="1"/>
                 <register key="timsk0" name="TIMSK0" description="Timer/Counter0 Interrupt Mask Register" offset="0x6E" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF8"/>
                     <bit-field key="ocie0b" name="OCIE0B" description="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x4"/>
                     <bit-field key="ocie0a" name="OCIE0A" description="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x2"/>
                     <bit-field key="toie0" name="TOIE0" description="Timer/Counter0 Overflow Interrupt Enable" mask="0x1"/>
@@ -612,7 +603,6 @@
         <module key="tc8_async" name="TC8_ASYNC" description="Timer/Counter, 8-bit Async">
             <register-group key="tc2" name="TC2">
                 <register key="tifr2" name="TIFR2" description="Timer/Counter Interrupt Flag Register" offset="0x37" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocf2b" name="OCF2B" description="Output Compare Flag 2 B" mask="0x4"/>
                     <bit-field key="ocf2a" name="OCF2A" description="Output Compare Flag 2 A" mask="0x2"/>
                     <bit-field key="tov2" name="TOV2" description="Timer/Counter2 Overflow Flag" mask="0x1"/>
@@ -622,7 +612,6 @@
                     <bit-field key="psrasy" name="PSRASY" description="Prescaler Reset Timer/Counter2" mask="0x2"/>
                 </register>
                 <register key="timsk2" name="TIMSK2" description="Timer/Counter Interrupt Mask register" offset="0x70" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocie2b" name="OCIE2B" description="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x4"/>
                     <bit-field key="ocie2a" name="OCIE2A" description="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x2"/>
                     <bit-field key="toie2" name="TOIE2" description="Timer/Counter2 Overflow Interrupt Enable" mask="0x1"/>
@@ -630,13 +619,11 @@
                 <register key="tccr2a" name="TCCR2A" description="Timer/Counter2 Control Register A" offset="0xB0" size="1">
                     <bit-field key="com2a" name="COM2A" description="Compare Match Output A Mode" mask="0xC0"/>
                     <bit-field key="com2b" name="COM2B" description="Compare Match Output B Mode" mask="0x30"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC"/>
                     <bit-field key="wgm2" name="WGM2" description="Waveform Generation Mode" mask="0x3"/>
                 </register>
                 <register key="tccr2b" name="TCCR2B" description="Timer/Counter2 Control Register B" offset="0xB1" size="1">
                     <bit-field key="foc2a" name="FOC2A" description="Force Output Compare A" mask="0x80"/>
                     <bit-field key="foc2b" name="FOC2B" description="Force Output Compare B" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x30"/>
                     <bit-field key="wgm22" name="WGM22" description="Waveform Generation Mode" mask="0x8"/>
                     <bit-field key="cs2" name="CS2" description="Clock Select" mask="0x7"/>
                 </register>
@@ -691,7 +678,6 @@
                 <register key="tccr5b" name="TCCR5B" description="Timer/Counter5 Control Register B" offset="0x121" size="1">
                     <bit-field key="icnc5" name="ICNC5" description="Input Capture 5 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices5" name="ICES5" description="Input Capture 5 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm5" name="WGM5" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs5" name="CS5" description="Clock Select" mask="0x7"/>
                 </register>
@@ -699,7 +685,6 @@
                     <bit-field key="foc5a" name="FOC5A" description="Force Output Compare for Channel A" mask="0x80"/>
                     <bit-field key="foc5b" name="FOC5B" description="Force Output Compare for Channel B" mask="0x40"/>
                     <bit-field key="foc5c" name="FOC5C" description="Force Output Compare for Channel C" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="tcnt5" name="TCNT5" description="Timer/Counter5 Bytes" offset="0x124" size="2"/>
                 <register key="icr5" name="ICR5" description="Timer/Counter5 Input Capture Register Bytes" offset="0x126" size="2"/>
@@ -731,7 +716,6 @@
                 <register key="tccr4b" name="TCCR4B" description="Timer/Counter4 Control Register B" offset="0xA1" size="1">
                     <bit-field key="icnc4" name="ICNC4" description="Input Capture 4 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices4" name="ICES4" description="Input Capture 4 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm4" name="WGM4" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs4" name="CS4" description="Clock Select" mask="0x7"/>
                 </register>
@@ -739,7 +723,6 @@
                     <bit-field key="foc4a" name="FOC4A" description="Force Output Compare for Channel A" mask="0x80"/>
                     <bit-field key="foc4b" name="FOC4B" description="Force Output Compare for Channel B" mask="0x40"/>
                     <bit-field key="foc4c" name="FOC4C" description="Force Output Compare for Channel C" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="tcnt4" name="TCNT4" description="Timer/Counter4 Bytes" offset="0xA4" size="2"/>
                 <register key="icr4" name="ICR4" description="Timer/Counter4 Input Capture Register Bytes" offset="0xA6" size="2"/>
@@ -771,7 +754,6 @@
                 <register key="tccr3b" name="TCCR3B" description="Timer/Counter3 Control Register B" offset="0x91" size="1">
                     <bit-field key="icnc3" name="ICNC3" description="Input Capture 3 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices3" name="ICES3" description="Input Capture 3 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm3" name="WGM3" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs3" name="CS3" description="Clock Select" mask="0x7"/>
                 </register>
@@ -779,7 +761,6 @@
                     <bit-field key="foc3a" name="FOC3A" description="Force Output Compare for Channel A" mask="0x80"/>
                     <bit-field key="foc3b" name="FOC3B" description="Force Output Compare for Channel B" mask="0x40"/>
                     <bit-field key="foc3c" name="FOC3C" description="Force Output Compare for Channel C" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="tcnt3" name="TCNT3" description="Timer/Counter3 Bytes" offset="0x94" size="2"/>
                 <register key="icr3" name="ICR3" description="Timer/Counter3 Input Capture Register Bytes" offset="0x96" size="2"/>
@@ -811,7 +792,6 @@
                 <register key="tccr1b" name="TCCR1B" description="Timer/Counter1 Control Register B" offset="0x81" size="1">
                     <bit-field key="icnc1" name="ICNC1" description="Input Capture 1 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices1" name="ICES1" description="Input Capture 1 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm1" name="WGM1" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs1" name="CS1" description="Clock Select" mask="0x7"/>
                 </register>
@@ -819,7 +799,6 @@
                     <bit-field key="foc1a" name="FOC1A" description="Force Output Compare for Channel A" mask="0x80"/>
                     <bit-field key="foc1b" name="FOC1B" description="Force Output Compare for Channel B" mask="0x40"/>
                     <bit-field key="foc1c" name="FOC1C" description="Force Output Compare for Channel C" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="tcnt1" name="TCNT1" description="Timer/Counter1 Bytes" offset="0x84" size="2"/>
                 <register key="icr1" name="ICR1" description="Timer/Counter1 Input Capture Register Bytes" offset="0x86" size="2"/>
@@ -831,7 +810,6 @@
         <module key="trx24" name="TRX24" description="Low-Power 2.4 GHz Transceiver">
             <register-group key="trx24" name="TRX24">
                 <register key="irq_mask1" name="IRQ_MASK1" description="Transceiver Interrupt Enable Register 1" offset="0xBE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami_en" name="MAF_3_AMI_EN" description="Address Match Interrupt enable Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami_en" name="MAF_2_AMI_EN" description="Address Match Interrupt enable Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami_en" name="MAF_1_AMI_EN" description="Address Match Interrupt enable Address filter 1" mask="0x4"/>
@@ -839,7 +817,6 @@
                     <bit-field key="tx_start_en" name="TX_START_EN" description="Transmit Start Interrupt enable" mask="0x1"/>
                 </register>
                 <register key="irq_status1" name="IRQ_STATUS1" description="Transceiver Interrupt Status Register 1" offset="0xBF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami" name="MAF_3_AMI" description="Address Match Interrupt Status Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami" name="MAF_2_AMI" description="Address Match Interrupt Status Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami" name="MAF_1_AMI" description="Address Match Interrupt Status Address filter 1" mask="0x4"/>
@@ -847,7 +824,6 @@
                     <bit-field key="tx_start" name="TX_START" description="Transmit Start Interrupt Status" mask="0x1"/>
                 </register>
                 <register key="mafcr0" name="MAFCR0" description="Multiple Address Filter Configuration Register 0" offset="0x10C" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF0"/>
                     <bit-field key="maf3en" name="MAF3EN" description="Multiple Address Filter 3 Enable" mask="0x8"/>
                     <bit-field key="maf2en" name="MAF2EN" description="Multiple Address Filter 2 Enable" mask="0x4"/>
                     <bit-field key="maf1en" name="MAF1EN" description="Multiple Address Filter 1 Enable" mask="0x2"/>
@@ -925,7 +901,6 @@
                 </register>
                 <register key="aes_status" name="AES_STATUS" description="AES Status Register" offset="0x13D" size="1">
                     <bit-field key="aes_er" name="AES_ER" description="AES Operation Finished with Error" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x7E"/>
                     <bit-field key="aes_done" name="AES_DONE" description="AES Operation Finished with Success" mask="0x1"/>
                 </register>
                 <register key="aes_state" name="AES_STATE" description="AES Plain and Cipher Text Buffer Register" offset="0x13E" size="1">
@@ -945,21 +920,17 @@
                     <bit-field key="trx_cmd" name="TRX_CMD" description="State Control Command" mask="0x1F"/>
                 </register>
                 <register key="trx_ctrl_0" name="TRX_CTRL_0" description="Reserved" offset="0x143" size="1">
-                    <bit-field key="res7" name="Res7" description="Reserved" mask="0x80"/>
                     <bit-field key="pmu_en" name="PMU_EN" description="Enable Phase Measurement Unit" mask="0x40"/>
                     <bit-field key="pmu_start" name="PMU_START" description="Start of Phase Measurement Unit" mask="0x20"/>
                     <bit-field key="pmu_if_inv" name="PMU_IF_INV" description="PMU IF Inverse" mask="0x10"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF"/>
                 </register>
                 <register key="trx_ctrl_1" name="TRX_CTRL_1" description="Transceiver Control Register 1" offset="0x144" size="1">
                     <bit-field key="pa_ext_en" name="PA_EXT_EN" description="External PA support enable" mask="0x80"/>
                     <bit-field key="irq_2_ext_en" name="IRQ_2_EXT_EN" description="Connect Frame Start IRQ to TC1" mask="0x40"/>
                     <bit-field key="tx_auto_crc_on" name="TX_AUTO_CRC_ON" description="Enable Automatic CRC Calculation" mask="0x20"/>
                     <bit-field key="pll_tx_flt" name="PLL_TX_FLT" description="Enable PLL TX filter" mask="0x10"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF"/>
                 </register>
                 <register key="phy_tx_pwr" name="PHY_TX_PWR" description="Transceiver Transmit Power Control Register" offset="0x145" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF0"/>
                     <bit-field key="tx_pwr" name="TX_PWR" description="Transmit Power Setting" mask="0xF"/>
                 </register>
                 <register key="phy_rssi" name="PHY_RSSI" description="Receiver Signal Strength Indicator Register" offset="0x146" size="1">
@@ -987,12 +958,10 @@
                 </register>
                 <register key="trx_ctrl_2" name="TRX_CTRL_2" description="Transceiver Control Register 2" offset="0x14C" size="1">
                     <bit-field key="rx_safe_mode" name="RX_SAFE_MODE" description="RX Safe Mode" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x7C"/>
                     <bit-field key="oqpsk_data_rate" name="OQPSK_DATA_RATE" description="Data Rate Selection" mask="0x3"/>
                 </register>
                 <register key="ant_div" name="ANT_DIV" description="Antenna Diversity Control Register" offset="0x14D" size="1">
                     <bit-field key="ant_sel" name="ANT_SEL" description="Antenna Diversity Antenna Status" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x70"/>
                     <bit-field key="ant_div_en" name="ANT_DIV_EN" description="Enable Antenna Diversity" mask="0x8"/>
                     <bit-field key="ant_ext_sw_en" name="ANT_EXT_SW_EN" description="Enable External Antenna Switch Control" mask="0x4"/>
                     <bit-field key="ant_ctrl" name="ANT_CTRL" description="Static Antenna Diversity Switch Control" mask="0x3"/>
@@ -1043,7 +1012,6 @@
                 <register key="rx_syn" name="RX_SYN" description="Transceiver Receiver Sensitivity Control Register" offset="0x155" size="1">
                     <bit-field key="rx_pdt_dis" name="RX_PDT_DIS" description="Prevent Frame Reception" mask="0x80"/>
                     <bit-field key="rx_override" name="RX_OVERRIDE" description="Receiver Override Function" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x30"/>
                     <bit-field key="rx_pdt_level" name="RX_PDT_LEVEL" description="Reduce Receiver Sensitivity" mask="0xF"/>
                 </register>
                 <register key="trx_rpc" name="TRX_RPC" description="Transceiver Reduced Power Consumption Control" offset="0x156" size="1">
@@ -1051,7 +1019,6 @@
                     <bit-field key="rx_rpc_en" name="RX_RPC_EN" description="Reciver Smart Receiving Mode Enable" mask="0x20"/>
                     <bit-field key="pdt_rpc_en" name="PDT_RPC_EN" description="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10"/>
                     <bit-field key="pll_rpc_en" name="PLL_RPC_EN" description="PLL Smart Receiving Mode Enable" mask="0x8"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x4"/>
                     <bit-field key="ipan_rpc_en" name="IPAN_RPC_EN" description="Smart Receiving Mode IPAN Handling Enable" mask="0x2"/>
                     <bit-field key="xah_rpc_en" name="XAH_RPC_EN" description="Smart Receiving in Extended Operating Modes Enable" mask="0x1"/>
                 </register>
@@ -1197,7 +1164,6 @@
                     <bit-field key="scrstrhh" name="SCRSTRHH" description="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"/>
                 </register>
                 <register key="sccsr" name="SCCSR" description="Symbol Counter Compare Source Register" offset="0xDB" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="sccs3" name="SCCS3" description="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"/>
                     <bit-field key="sccs2" name="SCCS2" description="Symbol Counter Compare Source select register for Compare Unit 2" mask="0xC"/>
                     <bit-field key="sccs1" name="SCCS1" description="Symbol Counter Compare Source select register for Compare Units" mask="0x3"/>
@@ -1211,24 +1177,20 @@
                     <bit-field key="sccmp" name="SCCMP" description="Symbol Counter Compare Unit 3 Mode select" mask="0x7"/>
                 </register>
                 <register key="sccr1" name="SCCR1" description="Symbol Counter Control Register 1" offset="0xDD" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="scbtsm" name="SCBTSM" description="Symbol Counter Beacon Timestamp Mask Register" mask="0x20"/>
                     <bit-field key="scckdiv" name="SCCKDIV" description="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"/>
                     <bit-field key="sceeclk" name="SCEECLK" description="Enable External Clock Source on PG2" mask="0x2"/>
                     <bit-field key="scenbo" name="SCENBO" description="Backoff Slot Counter enable" mask="0x1"/>
                 </register>
                 <register key="scsr" name="SCSR" description="Symbol Counter Status Register" offset="0xDE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xFE"/>
                     <bit-field key="scbsy" name="SCBSY" description="Symbol Counter busy" mask="0x1"/>
                 </register>
                 <register key="scirqm" name="SCIRQM" description="Symbol Counter Interrupt Mask Register" offset="0xDF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqmbo" name="IRQMBO" description="Backoff Slot Counter IRQ enable" mask="0x10"/>
                     <bit-field key="irqmof" name="IRQMOF" description="Symbol Counter Overflow IRQ enable" mask="0x8"/>
                     <bit-field key="irqmcp" name="IRQMCP" description="Symbol Counter Compare Match 3 IRQ enable" mask="0x7"/>
                 </register>
                 <register key="scirqs" name="SCIRQS" description="Symbol Counter Interrupt Status Register" offset="0xE0" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqsbo" name="IRQSBO" description="Backoff Slot Counter IRQ" mask="0x10"/>
                     <bit-field key="irqsof" name="IRQSOF" description="Symbol Counter Overflow IRQ" mask="0x8"/>
                     <bit-field key="irqscp" name="IRQSCP" description="Compare Unit 3 Compare Match IRQ" mask="0x7"/>
@@ -1322,7 +1284,6 @@
         <module key="eeprom" name="EEPROM" description="EEPROM">
             <register-group key="eeprom" name="EEPROM">
                 <register key="eecr" name="EECR" description="EEPROM Control Register" offset="0x3F" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC0"/>
                     <bit-field key="eepm" name="EEPM" description="EEPROM Programming Mode" mask="0x30"/>
                     <bit-field key="eerie" name="EERIE" description="EEPROM Ready Interrupt Enable" mask="0x8"/>
                     <bit-field key="eempe" name="EEMPE" description="EEPROM Master Write Enable" mask="0x4"/>
@@ -1349,7 +1310,6 @@
         <module key="exint" name="EXINT" description="External Interrupts">
             <register-group key="exint" name="EXINT">
                 <register key="pcifr" name="PCIFR" description="Pin Change Interrupt Flag Register" offset="0x3B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcif" name="PCIF" description="Pin Change Interrupt Flags" mask="0x7"/>
                 </register>
                 <register key="eifr" name="EIFR" description="External Interrupt Flag Register" offset="0x3C" size="1">
@@ -1359,7 +1319,6 @@
                     <bit-field key="int" name="INT" description="External Interrupt Request Enable" mask="0xFF"/>
                 </register>
                 <register key="pcicr" name="PCICR" description="Pin Change Interrupt Control Register" offset="0x68" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcie" name="PCIE" description="Pin Change Interrupt Enables" mask="0x7"/>
                 </register>
                 <register key="eicra" name="EICRA" description="External Interrupt Control Register A" offset="0x69" size="1">
@@ -1389,7 +1348,6 @@
             <register-group key="adc" name="ADC">
                 <register key="adcsrc" name="ADCSRC" description="The ADC Control and Status Register C" offset="0x77" size="1">
                     <bit-field key="adtht" name="ADTHT" description="ADC Track-and-Hold Time" mask="0xC0"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x20"/>
                     <bit-field key="adsut" name="ADSUT" description="ADC Start-up Time" mask="0x1F"/>
                 </register>
                 <register key="adc" name="ADC" description="ADC Data Register Bytes" offset="0x78" size="2"/>
@@ -1414,16 +1372,7 @@
                     <bit-field key="adlar" name="ADLAR" description="ADC Left Adjust Result" mask="0x20"/>
                     <bit-field key="mux" name="MUX" description="Analog Channel and Gain Selection Bits" mask="0x1F"/>
                 </register>
-                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1">
-                    <bit-field key="adc15d" name="ADC15D" description="Reserved Bits" mask="0x80"/>
-                    <bit-field key="adc14d" name="ADC14D" description="Reserved Bits" mask="0x40"/>
-                    <bit-field key="adc13d" name="ADC13D" description="Reserved Bits" mask="0x20"/>
-                    <bit-field key="adc12d" name="ADC12D" description="Reserved Bits" mask="0x10"/>
-                    <bit-field key="adc11d" name="ADC11D" description="Reserved Bits" mask="0x8"/>
-                    <bit-field key="adc10d" name="ADC10D" description="Reserved Bits" mask="0x4"/>
-                    <bit-field key="adc9d" name="ADC9D" description="Reserved Bits" mask="0x2"/>
-                    <bit-field key="adc8d" name="ADC8D" description="Reserved Bits" mask="0x1"/>
-                </register>
+                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1"/>
                 <register key="didr0" name="DIDR0" description="Digital Input Disable Register 0" offset="0x7E" size="1">
                     <bit-field key="adc7d" name="ADC7D" description="Disable ADC7:0 Digital Input" mask="0x80"/>
                     <bit-field key="adc6d" name="ADC6D" description="Disable ADC7:0 Digital Input" mask="0x40"/>
@@ -1469,12 +1418,10 @@
                     <bit-field key="gpior" name="GPIOR" description="General Purpose I/O Register 2 Value" mask="0xFF"/>
                 </register>
                 <register key="smcr" name="SMCR" description="Sleep Mode Control Register" offset="0x53" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF0"/>
                     <bit-field key="sm" name="SM" description="Sleep Mode Select bits" mask="0xE"/>
                     <bit-field key="se" name="SE" description="Sleep Enable" mask="0x1"/>
                 </register>
                 <register key="mcusr" name="MCUSR" description="MCU Status Register" offset="0x54" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xE0"/>
                     <bit-field key="jtrf" name="JTRF" description="JTAG Reset Flag" mask="0x10"/>
                     <bit-field key="wdrf" name="WDRF" description="Watchdog Reset Flag" mask="0x8"/>
                     <bit-field key="borf" name="BORF" description="Brown-out Reset Flag" mask="0x4"/>
@@ -1483,13 +1430,11 @@
                 </register>
                 <register key="mcucr" name="MCUCR" description="MCU Control Register" offset="0x55" size="1">
                     <bit-field key="jtd" name="JTD" description="JTAG Interface Disable" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x60"/>
                     <bit-field key="pud" name="PUD" description="Pull-up Disable" mask="0x10"/>
                     <bit-field key="ivsel" name="IVSEL" description="Interrupt Vector Select" mask="0x2"/>
                     <bit-field key="ivce" name="IVCE" description="Interrupt Vector Change Enable" mask="0x1"/>
                 </register>
                 <register key="rampz" name="RAMPZ" description="Extended Z-pointer Register for ELPM/SPM" offset="0x5B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xFE"/>
                     <bit-field key="rampz0" name="RAMPZ0" description="Extended Z-Pointer Value" mask="0x1"/>
                 </register>
                 <register key="sp" name="SP" description="Stack Pointer" offset="0x5D" size="2"/>
@@ -1505,7 +1450,6 @@
                 </register>
                 <register key="clkpr" name="CLKPR" description="Clock Prescale Register" offset="0x61" size="1">
                     <bit-field key="clkpce" name="CLKPCE" description="Clock Prescaler Change Enable" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x70"/>
                     <bit-field key="clkps" name="CLKPS" description="Clock Prescaler Select Bits" mask="0xF"/>
                 </register>
                 <register key="prr2" name="PRR2" description="Power Reduction Register 2" offset="0x63" size="1">
@@ -1525,7 +1469,6 @@
                     <bit-field key="pradc" name="PRADC" description="Power Reduction ADC" mask="0x1"/>
                 </register>
                 <register key="prr1" name="PRR1" description="Power Reduction Register 1" offset="0x65" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="prtrx24" name="PRTRX24" description="Power Reduction Transceiver" mask="0x40"/>
                     <bit-field key="prtim5" name="PRTIM5" description="Power Reduction Timer/Counter5" mask="0x20"/>
                     <bit-field key="prtim4" name="PRTIM4" description="Power Reduction Timer/Counter4" mask="0x10"/>
@@ -1540,7 +1483,6 @@
         <module key="flash" name="FLASH" description="FLASH Controller">
             <register-group key="flash" name="FLASH">
                 <register key="bgcr" name="BGCR" description="Reference Voltage Calibration Register" offset="0x67" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="bgcal_fine" name="BGCAL_FINE" description="Fine Calibration Bits" mask="0x78"/>
                     <bit-field key="bgcal" name="BGCAL" description="Coarse Calibration Bits" mask="0x7"/>
                 </register>
@@ -1556,7 +1498,6 @@
                     <bit-field key="pud" name="PUD" description="Pull-up Disable" mask="0x10"/>
                 </register>
                 <register key="llcr" name="LLCR" description="Low Leakage Voltage Regulator Control Register" offset="0x12F" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="lldone" name="LLDONE" description="Calibration Done" mask="0x20"/>
                     <bit-field key="llcomp" name="LLCOMP" description="Comparator Output" mask="0x10"/>
                     <bit-field key="llcal" name="LLCAL" description="Calibration Active" mask="0x8"/>
@@ -1565,30 +1506,24 @@
                     <bit-field key="llencal" name="LLENCAL" description="Enable Automatic Calibration" mask="0x1"/>
                 </register>
                 <register key="lldrl" name="LLDRL" description="Low Leakage Voltage Regulator Data Register (Low-Byte)" offset="0x130" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF0"/>
                     <bit-field key="lldrl" name="LLDRL" description="Low-Byte Data Register Bits" mask="0xF"/>
                 </register>
                 <register key="lldrh" name="LLDRH" description="Low Leakage Voltage Regulator Data Register (High-Byte)" offset="0x131" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xE0"/>
                     <bit-field key="lldrh" name="LLDRH" description="High-Byte Data Register Bits" mask="0x1F"/>
                 </register>
                 <register key="drtram3" name="DRTRAM3" description="Data Retention Configuration Register #3" offset="0x132" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC0"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram2" name="DRTRAM2" description="Data Retention Configuration Register #2" offset="0x133" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x40"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram1" name="DRTRAM1" description="Data Retention Configuration Register #1" offset="0x134" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC0"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram0" name="DRTRAM0" description="Data Retention Configuration Register #0" offset="0x135" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC0"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
@@ -1599,11 +1534,9 @@
                     <bit-field key="pbdrv" name="PBDRV" description="Driver Strength Port B" mask="0x3"/>
                 </register>
                 <register key="dpds1" name="DPDS1" description="Port Driver Strength Register 1" offset="0x137" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xFC"/>
                     <bit-field key="pgdrv" name="PGDRV" description="Driver Strength Port G" mask="0x3"/>
                 </register>
                 <register key="trxpr" name="TRXPR" description="Transceiver Pin Register" offset="0x139" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF0"/>
                     <bit-field key="slptr" name="SLPTR" description="Multi-purpose Transceiver Control Bit" mask="0x2"/>
                     <bit-field key="trxrst" name="TRXRST" description="Force Transceiver Reset" mask="0x1"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
index ddab5179..e000a101 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
@@ -453,7 +453,6 @@
                 <register key="twbr" name="TWBR" description="TWI Bit Rate Register" offset="0xB8" size="1"/>
                 <register key="twsr" name="TWSR" description="TWI Status Register" offset="0xB9" size="1">
                     <bit-field key="tws" name="TWS" description="TWI Status" mask="0xF8"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x4"/>
                     <bit-field key="twps" name="TWPS" description="TWI Prescaler Bits" mask="0x3"/>
                 </register>
                 <register key="twar" name="TWAR" description="TWI (Slave) Address Register" offset="0xBA" size="1">
@@ -468,12 +467,10 @@
                     <bit-field key="twsto" name="TWSTO" description="TWI STOP Condition Bit" mask="0x10"/>
                     <bit-field key="twwc" name="TWWC" description="TWI Write Collision Flag" mask="0x8"/>
                     <bit-field key="twen" name="TWEN" description="TWI Enable Bit" mask="0x4"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x2"/>
                     <bit-field key="twie" name="TWIE" description="TWI Interrupt Enable" mask="0x1"/>
                 </register>
                 <register key="twamr" name="TWAMR" description="TWI (Slave) Address Mask Register" offset="0xBD" size="1">
                     <bit-field key="twam" name="TWAM" description="TWI Address Mask" mask="0xFE"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x1"/>
                 </register>
             </register-group>
         </module>
@@ -491,7 +488,6 @@
                 <register key="spsr" name="SPSR" description="SPI Status Register" offset="0x4D" size="1">
                     <bit-field key="spif" name="SPIF" description="SPI Interrupt Flag" mask="0x80"/>
                     <bit-field key="wcol" name="WCOL" description="Write Collision Flag" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x3E"/>
                     <bit-field key="spi2x" name="SPI2X" description="Double SPI Speed Bit" mask="0x1"/>
                 </register>
                 <register key="spdr" name="SPDR" description="SPI Data Register" offset="0x4E" size="1"/>
@@ -575,27 +571,23 @@
         <module key="tc8" name="TC8" description="Timer/Counter, 8-bit">
             <register-group key="tc0" name="TC0">
                 <register key="tifr0" name="TIFR0" description="Timer/Counter0 Interrupt Flag Register" offset="0x35" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF8"/>
                     <bit-field key="ocf0b" name="OCF0B" description="Timer/Counter0 Output Compare B Match Flag" mask="0x4"/>
                     <bit-field key="ocf0a" name="OCF0A" description="Timer/Counter0 Output Compare A Match Flag" mask="0x2"/>
                     <bit-field key="tov0" name="TOV0" description="Timer/Counter0 Overflow Flag" mask="0x1"/>
                 </register>
                 <register key="gtccr" name="GTCCR" description="General Timer/Counter Control Register" offset="0x43" size="1">
                     <bit-field key="tsm" name="TSM" description="Timer/Counter Synchronization Mode" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x7C"/>
                     <bit-field key="psrasy" name="PSRASY" description="Prescaler Reset Timer/Counter2" mask="0x2"/>
                     <bit-field key="psrsync" name="PSRSYNC" description="Prescaler Reset for Synchronous Timer/Counters" mask="0x1"/>
                 </register>
                 <register key="tccr0a" name="TCCR0A" description="Timer/Counter0 Control Register A" offset="0x44" size="1">
                     <bit-field key="com0a" name="COM0A" description="Compare Match Output A Mode" mask="0xC0"/>
                     <bit-field key="com0b" name="COM0B" description="Compare Match Output B Mode" mask="0x30"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC"/>
                     <bit-field key="wgm0" name="WGM0" description="Waveform Generation Mode" mask="0x3"/>
                 </register>
                 <register key="tccr0b" name="TCCR0B" description="Timer/Counter0 Control Register B" offset="0x45" size="1">
                     <bit-field key="foc0a" name="FOC0A" description="Force Output Compare A" mask="0x80"/>
                     <bit-field key="foc0b" name="FOC0B" description="Force Output Compare B" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x30"/>
                     <bit-field key="wgm02" name="WGM02" mask="0x8"/>
                     <bit-field key="cs0" name="CS0" description="Clock Select" mask="0x7"/>
                 </register>
@@ -603,7 +595,6 @@
                 <register key="ocr0a" name="OCR0A" description="Timer/Counter0 Output Compare Register" offset="0x47" size="1"/>
                 <register key="ocr0b" name="OCR0B" description="Timer/Counter0 Output Compare Register B" offset="0x48" size="1"/>
                 <register key="timsk0" name="TIMSK0" description="Timer/Counter0 Interrupt Mask Register" offset="0x6E" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF8"/>
                     <bit-field key="ocie0b" name="OCIE0B" description="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x4"/>
                     <bit-field key="ocie0a" name="OCIE0A" description="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x2"/>
                     <bit-field key="toie0" name="TOIE0" description="Timer/Counter0 Overflow Interrupt Enable" mask="0x1"/>
@@ -613,7 +604,6 @@
         <module key="tc8_async" name="TC8_ASYNC" description="Timer/Counter, 8-bit Async">
             <register-group key="tc2" name="TC2">
                 <register key="tifr2" name="TIFR2" description="Timer/Counter Interrupt Flag Register" offset="0x37" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocf2b" name="OCF2B" description="Output Compare Flag 2 B" mask="0x4"/>
                     <bit-field key="ocf2a" name="OCF2A" description="Output Compare Flag 2 A" mask="0x2"/>
                     <bit-field key="tov2" name="TOV2" description="Timer/Counter2 Overflow Flag" mask="0x1"/>
@@ -623,7 +613,6 @@
                     <bit-field key="psrasy" name="PSRASY" description="Prescaler Reset Timer/Counter2" mask="0x2"/>
                 </register>
                 <register key="timsk2" name="TIMSK2" description="Timer/Counter Interrupt Mask register" offset="0x70" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocie2b" name="OCIE2B" description="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x4"/>
                     <bit-field key="ocie2a" name="OCIE2A" description="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x2"/>
                     <bit-field key="toie2" name="TOIE2" description="Timer/Counter2 Overflow Interrupt Enable" mask="0x1"/>
@@ -631,13 +620,11 @@
                 <register key="tccr2a" name="TCCR2A" description="Timer/Counter2 Control Register A" offset="0xB0" size="1">
                     <bit-field key="com2a" name="COM2A" description="Compare Match Output A Mode" mask="0xC0"/>
                     <bit-field key="com2b" name="COM2B" description="Compare Match Output B Mode" mask="0x30"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC"/>
                     <bit-field key="wgm2" name="WGM2" description="Waveform Generation Mode" mask="0x3"/>
                 </register>
                 <register key="tccr2b" name="TCCR2B" description="Timer/Counter2 Control Register B" offset="0xB1" size="1">
                     <bit-field key="foc2a" name="FOC2A" description="Force Output Compare A" mask="0x80"/>
                     <bit-field key="foc2b" name="FOC2B" description="Force Output Compare B" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x30"/>
                     <bit-field key="wgm22" name="WGM22" description="Waveform Generation Mode" mask="0x8"/>
                     <bit-field key="cs2" name="CS2" description="Clock Select" mask="0x7"/>
                 </register>
@@ -692,7 +679,6 @@
                 <register key="tccr5b" name="TCCR5B" description="Timer/Counter5 Control Register B" offset="0x121" size="1">
                     <bit-field key="icnc5" name="ICNC5" description="Input Capture 5 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices5" name="ICES5" description="Input Capture 5 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm5" name="WGM5" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs5" name="CS5" description="Clock Select" mask="0x7"/>
                 </register>
@@ -700,7 +686,6 @@
                     <bit-field key="foc5a" name="FOC5A" description="Force Output Compare for Channel A" mask="0x80"/>
                     <bit-field key="foc5b" name="FOC5B" description="Force Output Compare for Channel B" mask="0x40"/>
                     <bit-field key="foc5c" name="FOC5C" description="Force Output Compare for Channel C" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="tcnt5" name="TCNT5" description="Timer/Counter5 Bytes" offset="0x124" size="2"/>
                 <register key="icr5" name="ICR5" description="Timer/Counter5 Input Capture Register Bytes" offset="0x126" size="2"/>
@@ -732,7 +717,6 @@
                 <register key="tccr4b" name="TCCR4B" description="Timer/Counter4 Control Register B" offset="0xA1" size="1">
                     <bit-field key="icnc4" name="ICNC4" description="Input Capture 4 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices4" name="ICES4" description="Input Capture 4 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm4" name="WGM4" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs4" name="CS4" description="Clock Select" mask="0x7"/>
                 </register>
@@ -740,7 +724,6 @@
                     <bit-field key="foc4a" name="FOC4A" description="Force Output Compare for Channel A" mask="0x80"/>
                     <bit-field key="foc4b" name="FOC4B" description="Force Output Compare for Channel B" mask="0x40"/>
                     <bit-field key="foc4c" name="FOC4C" description="Force Output Compare for Channel C" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="tcnt4" name="TCNT4" description="Timer/Counter4 Bytes" offset="0xA4" size="2"/>
                 <register key="icr4" name="ICR4" description="Timer/Counter4 Input Capture Register Bytes" offset="0xA6" size="2"/>
@@ -772,7 +755,6 @@
                 <register key="tccr3b" name="TCCR3B" description="Timer/Counter3 Control Register B" offset="0x91" size="1">
                     <bit-field key="icnc3" name="ICNC3" description="Input Capture 3 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices3" name="ICES3" description="Input Capture 3 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm3" name="WGM3" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs3" name="CS3" description="Clock Select" mask="0x7"/>
                 </register>
@@ -780,7 +762,6 @@
                     <bit-field key="foc3a" name="FOC3A" description="Force Output Compare for Channel A" mask="0x80"/>
                     <bit-field key="foc3b" name="FOC3B" description="Force Output Compare for Channel B" mask="0x40"/>
                     <bit-field key="foc3c" name="FOC3C" description="Force Output Compare for Channel C" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="tcnt3" name="TCNT3" description="Timer/Counter3 Bytes" offset="0x94" size="2"/>
                 <register key="icr3" name="ICR3" description="Timer/Counter3 Input Capture Register Bytes" offset="0x96" size="2"/>
@@ -812,7 +793,6 @@
                 <register key="tccr1b" name="TCCR1B" description="Timer/Counter1 Control Register B" offset="0x81" size="1">
                     <bit-field key="icnc1" name="ICNC1" description="Input Capture 1 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices1" name="ICES1" description="Input Capture 1 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm1" name="WGM1" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs1" name="CS1" description="Clock Select" mask="0x7"/>
                 </register>
@@ -820,7 +800,6 @@
                     <bit-field key="foc1a" name="FOC1A" description="Force Output Compare for Channel A" mask="0x80"/>
                     <bit-field key="foc1b" name="FOC1B" description="Force Output Compare for Channel B" mask="0x40"/>
                     <bit-field key="foc1c" name="FOC1C" description="Force Output Compare for Channel C" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="tcnt1" name="TCNT1" description="Timer/Counter1 Bytes" offset="0x84" size="2"/>
                 <register key="icr1" name="ICR1" description="Timer/Counter1 Input Capture Register Bytes" offset="0x86" size="2"/>
@@ -839,7 +818,6 @@
                 </register>
                 <register key="aes_status" name="AES_STATUS" description="AES Status Register" offset="0x13D" size="1">
                     <bit-field key="aes_er" name="AES_ER" description="AES Operation Finished with Error" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x7E"/>
                     <bit-field key="aes_done" name="AES_DONE" description="AES Operation Finished with Success" mask="0x1"/>
                 </register>
                 <register key="aes_state" name="AES_STATE" description="AES Plain and Cipher Text Buffer Register" offset="0x13E" size="1">
@@ -858,14 +836,11 @@
                     <bit-field key="trac_status" name="TRAC_STATUS" description="Transaction Status" mask="0xE0"/>
                     <bit-field key="trx_cmd" name="TRX_CMD" description="State Control Command" mask="0x1F"/>
                 </register>
-                <register key="trx_ctrl_0" name="TRX_CTRL_0" description="Reserved" offset="0x143" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xFF"/>
-                </register>
+                <register key="trx_ctrl_0" name="TRX_CTRL_0" description="Reserved" offset="0x143" size="1"/>
                 <register key="trx_ctrl_1" name="TRX_CTRL_1" description="Transceiver Control Register 1" offset="0x144" size="1">
                     <bit-field key="pa_ext_en" name="PA_EXT_EN" description="External PA support enable" mask="0x80"/>
                     <bit-field key="irq_2_ext_en" name="IRQ_2_EXT_EN" description="Connect Frame Start IRQ to TC1" mask="0x40"/>
                     <bit-field key="tx_auto_crc_on" name="TX_AUTO_CRC_ON" description="Enable Automatic CRC Calculation" mask="0x20"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x1F"/>
                 </register>
                 <register key="phy_tx_pwr" name="PHY_TX_PWR" description="Transceiver Transmit Power Control Register" offset="0x145" size="1">
                     <bit-field key="pa_buf_lt" name="PA_BUF_LT" description="Power Amplifier Buffer Lead Time" mask="0xC0"/>
@@ -897,12 +872,10 @@
                 </register>
                 <register key="trx_ctrl_2" name="TRX_CTRL_2" description="Transceiver Control Register 2" offset="0x14C" size="1">
                     <bit-field key="rx_safe_mode" name="RX_SAFE_MODE" description="RX Safe Mode" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x7C"/>
                     <bit-field key="oqpsk_data_rate" name="OQPSK_DATA_RATE" description="Data Rate Selection" mask="0x3"/>
                 </register>
                 <register key="ant_div" name="ANT_DIV" description="Antenna Diversity Control Register" offset="0x14D" size="1">
                     <bit-field key="ant_sel" name="ANT_SEL" description="Antenna Diversity Antenna Status" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x70"/>
                     <bit-field key="ant_div_en" name="ANT_DIV_EN" description="Enable Antenna Diversity" mask="0x8"/>
                     <bit-field key="ant_ext_sw_en" name="ANT_EXT_SW_EN" description="Enable External Antenna Switch Control" mask="0x4"/>
                     <bit-field key="ant_ctrl" name="ANT_CTRL" description="Static Antenna Diversity Switch Control" mask="0x3"/>
@@ -946,7 +919,6 @@
                 </register>
                 <register key="rx_syn" name="RX_SYN" description="Transceiver Receiver Sensitivity Control Register" offset="0x155" size="1">
                     <bit-field key="rx_pdt_dis" name="RX_PDT_DIS" description="Prevent Frame Reception" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x70"/>
                     <bit-field key="rx_pdt_level" name="RX_PDT_LEVEL" description="Reduce Receiver Sensitivity" mask="0xF"/>
                 </register>
                 <register key="xah_ctrl_1" name="XAH_CTRL_1" description="Transceiver Acknowledgment Frame Control Register 1" offset="0x157" size="1">
@@ -1087,21 +1059,17 @@
                     <bit-field key="sccmp" name="SCCMP" description="Symbol Counter Compare Unit 3 Mode select" mask="0x7"/>
                 </register>
                 <register key="sccr1" name="SCCR1" description="Symbol Counter Control Register 1" offset="0xDD" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xFE"/>
                     <bit-field key="scenbo" name="SCENBO" description="Backoff Slot Counter enable" mask="0x1"/>
                 </register>
                 <register key="scsr" name="SCSR" description="Symbol Counter Status Register" offset="0xDE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xFE"/>
                     <bit-field key="scbsy" name="SCBSY" description="Symbol Counter busy" mask="0x1"/>
                 </register>
                 <register key="scirqm" name="SCIRQM" description="Symbol Counter Interrupt Mask Register" offset="0xDF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqmbo" name="IRQMBO" description="Backoff Slot Counter IRQ enable" mask="0x10"/>
                     <bit-field key="irqmof" name="IRQMOF" description="Symbol Counter Overflow IRQ enable" mask="0x8"/>
                     <bit-field key="irqmcp" name="IRQMCP" description="Symbol Counter Compare Match 3 IRQ enable" mask="0x7"/>
                 </register>
                 <register key="scirqs" name="SCIRQS" description="Symbol Counter Interrupt Status Register" offset="0xE0" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqsbo" name="IRQSBO" description="Backoff Slot Counter IRQ" mask="0x10"/>
                     <bit-field key="irqsof" name="IRQSOF" description="Symbol Counter Overflow IRQ" mask="0x8"/>
                     <bit-field key="irqscp" name="IRQSCP" description="Compare Unit 3 Compare Match IRQ" mask="0x7"/>
@@ -1183,7 +1151,6 @@
         <module key="eeprom" name="EEPROM" description="EEPROM">
             <register-group key="eeprom" name="EEPROM">
                 <register key="eecr" name="EECR" description="EEPROM Control Register" offset="0x3F" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC0"/>
                     <bit-field key="eepm" name="EEPM" description="EEPROM Programming Mode" mask="0x30"/>
                     <bit-field key="eerie" name="EERIE" description="EEPROM Ready Interrupt Enable" mask="0x8"/>
                     <bit-field key="eempe" name="EEMPE" description="EEPROM Master Write Enable" mask="0x4"/>
@@ -1210,7 +1177,6 @@
         <module key="exint" name="EXINT" description="External Interrupts">
             <register-group key="exint" name="EXINT">
                 <register key="pcifr" name="PCIFR" description="Pin Change Interrupt Flag Register" offset="0x3B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcif" name="PCIF" description="Pin Change Interrupt Flags" mask="0x7"/>
                 </register>
                 <register key="eifr" name="EIFR" description="External Interrupt Flag Register" offset="0x3C" size="1">
@@ -1220,7 +1186,6 @@
                     <bit-field key="int" name="INT" description="External Interrupt Request Enable" mask="0xFF"/>
                 </register>
                 <register key="pcicr" name="PCICR" description="Pin Change Interrupt Control Register" offset="0x68" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcie" name="PCIE" description="Pin Change Interrupt Enables" mask="0x7"/>
                 </register>
                 <register key="eicra" name="EICRA" description="External Interrupt Control Register A" offset="0x69" size="1">
@@ -1248,7 +1213,6 @@
             <register-group key="adc" name="ADC">
                 <register key="adcsrc" name="ADCSRC" description="The ADC Control and Status Register C" offset="0x77" size="1">
                     <bit-field key="adtht" name="ADTHT" description="ADC Track-and-Hold Time" mask="0xC0"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x20"/>
                     <bit-field key="adsut" name="ADSUT" description="ADC Start-up Time" mask="0x1F"/>
                 </register>
                 <register key="adc" name="ADC" description="ADC Data Register Bytes" offset="0x78" size="2"/>
@@ -1273,16 +1237,7 @@
                     <bit-field key="adlar" name="ADLAR" description="ADC Left Adjust Result" mask="0x20"/>
                     <bit-field key="mux" name="MUX" description="Analog Channel and Gain Selection Bits" mask="0x1F"/>
                 </register>
-                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1">
-                    <bit-field key="adc15d" name="ADC15D" description="Reserved Bits" mask="0x80"/>
-                    <bit-field key="adc14d" name="ADC14D" description="Reserved Bits" mask="0x40"/>
-                    <bit-field key="adc13d" name="ADC13D" description="Reserved Bits" mask="0x20"/>
-                    <bit-field key="adc12d" name="ADC12D" description="Reserved Bits" mask="0x10"/>
-                    <bit-field key="adc11d" name="ADC11D" description="Reserved Bits" mask="0x8"/>
-                    <bit-field key="adc10d" name="ADC10D" description="Reserved Bits" mask="0x4"/>
-                    <bit-field key="adc9d" name="ADC9D" description="Reserved Bits" mask="0x2"/>
-                    <bit-field key="adc8d" name="ADC8D" description="Reserved Bits" mask="0x1"/>
-                </register>
+                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1"/>
                 <register key="didr0" name="DIDR0" description="Digital Input Disable Register 0" offset="0x7E" size="1">
                     <bit-field key="adc7d" name="ADC7D" description="Disable ADC7:0 Digital Input" mask="0x80"/>
                     <bit-field key="adc6d" name="ADC6D" description="Disable ADC7:0 Digital Input" mask="0x40"/>
@@ -1328,12 +1283,10 @@
                     <bit-field key="gpior" name="GPIOR" description="General Purpose I/O Register 2 Value" mask="0xFF"/>
                 </register>
                 <register key="smcr" name="SMCR" description="Sleep Mode Control Register" offset="0x53" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF0"/>
                     <bit-field key="sm" name="SM" description="Sleep Mode Select bits" mask="0xE"/>
                     <bit-field key="se" name="SE" description="Sleep Enable" mask="0x1"/>
                 </register>
                 <register key="mcusr" name="MCUSR" description="MCU Status Register" offset="0x54" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xE0"/>
                     <bit-field key="jtrf" name="JTRF" description="JTAG Reset Flag" mask="0x10"/>
                     <bit-field key="wdrf" name="WDRF" description="Watchdog Reset Flag" mask="0x8"/>
                     <bit-field key="borf" name="BORF" description="Brown-out Reset Flag" mask="0x4"/>
@@ -1347,7 +1300,6 @@
                     <bit-field key="ivce" name="IVCE" description="Interrupt Vector Change Enable" mask="0x1"/>
                 </register>
                 <register key="rampz" name="RAMPZ" description="Extended Z-pointer Register for ELPM/SPM" offset="0x5B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xFC"/>
                     <bit-field key="rampz" name="RAMPZ" description="Extended Z-Pointer Value" mask="0x3"/>
                 </register>
                 <register key="sp" name="SP" description="Stack Pointer" offset="0x5D" size="2"/>
@@ -1363,7 +1315,6 @@
                 </register>
                 <register key="clkpr" name="CLKPR" description="Clock Prescale Register" offset="0x61" size="1">
                     <bit-field key="clkpce" name="CLKPCE" description="Clock Prescaler Change Enable" mask="0x80"/>
-                    <bit-field key="res" name="Res" description="Reserved" mask="0x70"/>
                     <bit-field key="clkps" name="CLKPS" description="Clock Prescaler Select Bits" mask="0xF"/>
                 </register>
                 <register key="prr2" name="PRR2" description="Power Reduction Register 2" offset="0x63" size="1">
@@ -1398,7 +1349,6 @@
         <module key="flash" name="FLASH" description="FLASH Controller">
             <register-group key="flash" name="FLASH">
                 <register key="bgcr" name="BGCR" description="Reference Voltage Calibration Register" offset="0x67" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="bgcal_fine" name="BGCAL_FINE" description="Fine Calibration Bits" mask="0x78"/>
                     <bit-field key="bgcal" name="BGCAL" description="Coarse Calibration Bits" mask="0x7"/>
                 </register>
@@ -1414,7 +1364,6 @@
                     <bit-field key="pud" name="PUD" description="Pull-up Disable" mask="0x10"/>
                 </register>
                 <register key="llcr" name="LLCR" description="Low Leakage Voltage Regulator Control Register" offset="0x12F" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="lldone" name="LLDONE" description="Calibration Done" mask="0x20"/>
                     <bit-field key="llcomp" name="LLCOMP" description="Comparator Output" mask="0x10"/>
                     <bit-field key="llcal" name="LLCAL" description="Calibration Active" mask="0x8"/>
@@ -1423,30 +1372,24 @@
                     <bit-field key="llencal" name="LLENCAL" description="Enable Automatic Calibration" mask="0x1"/>
                 </register>
                 <register key="lldrl" name="LLDRL" description="Low Leakage Voltage Regulator Data Register (Low-Byte)" offset="0x130" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF0"/>
                     <bit-field key="lldrl" name="LLDRL" description="Low-Byte Data Register Bits" mask="0xF"/>
                 </register>
                 <register key="lldrh" name="LLDRH" description="Low Leakage Voltage Regulator Data Register (High-Byte)" offset="0x131" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xE0"/>
                     <bit-field key="lldrh" name="LLDRH" description="High-Byte Data Register Bits" mask="0x1F"/>
                 </register>
                 <register key="drtram3" name="DRTRAM3" description="Data Retention Configuration Register of SRAM 3" offset="0x132" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC0"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram2" name="DRTRAM2" description="Data Retention Configuration Register of SRAM 2" offset="0x133" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x40"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram1" name="DRTRAM1" description="Data Retention Configuration Register of SRAM 1" offset="0x134" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC0"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram0" name="DRTRAM0" description="Data Retention Configuration Register of SRAM 0" offset="0x135" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xC0"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
@@ -1457,11 +1400,9 @@
                     <bit-field key="pbdrv" name="PBDRV" description="Driver Strength Port B" mask="0x3"/>
                 </register>
                 <register key="dpds1" name="DPDS1" description="Port Driver Strength Register 1" offset="0x137" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xFC"/>
                     <bit-field key="pgdrv" name="PGDRV" description="Driver Strength Port G" mask="0x3"/>
                 </register>
                 <register key="trxpr" name="TRXPR" description="Transceiver Pin Register" offset="0x139" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xF0"/>
                     <bit-field key="slptr" name="SLPTR" description="Multi-purpose Transceiver Control Bit" mask="0x2"/>
                     <bit-field key="trxrst" name="TRXRST" description="Force Transceiver Reset" mask="0x1"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
index a1490d65..8b06b4e2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
@@ -456,7 +456,6 @@
                 <register key="twbr" name="TWBR" description="TWI Bit Rate Register" offset="0xB8" size="1"/>
                 <register key="twsr" name="TWSR" description="TWI Status Register" offset="0xB9" size="1">
                     <bit-field key="tws" name="TWS" description="TWI Status" mask="0xF8"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x4"/>
                     <bit-field key="twps" name="TWPS" description="TWI Prescaler Bits" mask="0x3"/>
                 </register>
                 <register key="twar" name="TWAR" description="TWI (Slave) Address Register" offset="0xBA" size="1">
@@ -471,12 +470,10 @@
                     <bit-field key="twsto" name="TWSTO" description="TWI STOP Condition Bit" mask="0x10"/>
                     <bit-field key="twwc" name="TWWC" description="TWI Write Collision Flag" mask="0x8"/>
                     <bit-field key="twen" name="TWEN" description="TWI Enable Bit" mask="0x4"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x2"/>
                     <bit-field key="twie" name="TWIE" description="TWI Interrupt Enable" mask="0x1"/>
                 </register>
                 <register key="twamr" name="TWAMR" description="TWI (Slave) Address Mask Register" offset="0xBD" size="1">
                     <bit-field key="twam" name="TWAM" description="TWI Address Mask" mask="0xFE"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x1"/>
                 </register>
             </register-group>
         </module>
@@ -589,13 +586,11 @@
                 <register key="tccr0a" name="TCCR0A" description="Timer/Counter0 Control Register A" offset="0x44" size="1">
                     <bit-field key="com0a" name="COM0A" description="Compare Match Output A Mode" mask="0xC0"/>
                     <bit-field key="com0b" name="COM0B" description="Compare Match Output B Mode" mask="0x30"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC"/>
                     <bit-field key="wgm0" name="WGM0" description="Waveform Generation Mode" mask="0x3"/>
                 </register>
                 <register key="tccr0b" name="TCCR0B" description="Timer/Counter0 Control Register B" offset="0x45" size="1">
                     <bit-field key="foc0a" name="FOC0A" description="Force Output Compare A" mask="0x80"/>
                     <bit-field key="foc0b" name="FOC0B" description="Force Output Compare B" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x30"/>
                     <bit-field key="wgm02" name="WGM02" mask="0x8"/>
                     <bit-field key="cs0" name="CS0" description="Clock Select" mask="0x7"/>
                 </register>
@@ -612,7 +607,6 @@
         <module key="tc8_async" name="TC8_ASYNC" description="Timer/Counter, 8-bit Async">
             <register-group key="tc2" name="TC2">
                 <register key="tifr2" name="TIFR2" description="Timer/Counter Interrupt Flag Register" offset="0x37" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocf2b" name="OCF2B" description="Output Compare Flag 2 B" mask="0x4"/>
                     <bit-field key="ocf2a" name="OCF2A" description="Output Compare Flag 2 A" mask="0x2"/>
                     <bit-field key="tov2" name="TOV2" description="Timer/Counter2 Overflow Flag" mask="0x1"/>
@@ -622,7 +616,6 @@
                     <bit-field key="psrasy" name="PSRASY" description="Prescaler Reset Timer/Counter2" mask="0x2"/>
                 </register>
                 <register key="timsk2" name="TIMSK2" description="Timer/Counter Interrupt Mask register" offset="0x70" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocie2b" name="OCIE2B" description="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x4"/>
                     <bit-field key="ocie2a" name="OCIE2A" description="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x2"/>
                     <bit-field key="toie2" name="TOIE2" description="Timer/Counter2 Overflow Interrupt Enable" mask="0x1"/>
@@ -689,7 +682,6 @@
                 <register key="tccr5b" name="TCCR5B" description="Timer/Counter5 Control Register B" offset="0x121" size="1">
                     <bit-field key="icnc5" name="ICNC5" description="Input Capture 5 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices5" name="ICES5" description="Input Capture 5 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm5" name="WGM5" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs5" name="CS5" description="Clock Select" mask="0x7"/>
                 </register>
@@ -728,7 +720,6 @@
                 <register key="tccr4b" name="TCCR4B" description="Timer/Counter4 Control Register B" offset="0xA1" size="1">
                     <bit-field key="icnc4" name="ICNC4" description="Input Capture 4 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices4" name="ICES4" description="Input Capture 4 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm4" name="WGM4" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs4" name="CS4" description="Clock Select" mask="0x7"/>
                 </register>
@@ -767,7 +758,6 @@
                 <register key="tccr3b" name="TCCR3B" description="Timer/Counter3 Control Register B" offset="0x91" size="1">
                     <bit-field key="icnc3" name="ICNC3" description="Input Capture 3 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices3" name="ICES3" description="Input Capture 3 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm3" name="WGM3" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs3" name="CS3" description="Clock Select" mask="0x7"/>
                 </register>
@@ -806,7 +796,6 @@
                 <register key="tccr1b" name="TCCR1B" description="Timer/Counter1 Control Register B" offset="0x81" size="1">
                     <bit-field key="icnc1" name="ICNC1" description="Input Capture 1 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices1" name="ICES1" description="Input Capture 1 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm1" name="WGM1" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs1" name="CS1" description="Clock Select" mask="0x7"/>
                 </register>
@@ -825,7 +814,6 @@
         <module key="trx24" name="TRX24" description="Low-Power 2.4 GHz Transceiver">
             <register-group key="trx24" name="TRX24">
                 <register key="irq_mask1" name="IRQ_MASK1" description="Transceiver Interrupt Enable Register 1" offset="0xBE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami_en" name="MAF_3_AMI_EN" description="Address Match Interrupt enable Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami_en" name="MAF_2_AMI_EN" description="Address Match Interrupt enable Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami_en" name="MAF_1_AMI_EN" description="Address Match Interrupt enable Address filter 1" mask="0x4"/>
@@ -833,7 +821,6 @@
                     <bit-field key="tx_start_en" name="TX_START_EN" description="Transmit Start Interrupt enable" mask="0x1"/>
                 </register>
                 <register key="irq_status1" name="IRQ_STATUS1" description="Transceiver Interrupt Status Register 1" offset="0xBF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami" name="MAF_3_AMI" description="Address Match Interrupt Status Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami" name="MAF_2_AMI" description="Address Match Interrupt Status Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami" name="MAF_1_AMI" description="Address Match Interrupt Status Address filter 1" mask="0x4"/>
@@ -841,7 +828,6 @@
                     <bit-field key="tx_start" name="TX_START" description="Transmit Start Interrupt Status" mask="0x1"/>
                 </register>
                 <register key="mafcr0" name="MAFCR0" description="Multiple Address Filter Configuration Register 0" offset="0x10C" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF0"/>
                     <bit-field key="maf3en" name="MAF3EN" description="Multiple Address Filter 3 Enable" mask="0x8"/>
                     <bit-field key="maf2en" name="MAF2EN" description="Multiple Address Filter 2 Enable" mask="0x4"/>
                     <bit-field key="maf1en" name="MAF1EN" description="Multiple Address Filter 1 Enable" mask="0x2"/>
@@ -938,7 +924,6 @@
                     <bit-field key="trx_cmd" name="TRX_CMD" description="State Control Command" mask="0x1F"/>
                 </register>
                 <register key="trx_ctrl_0" name="TRX_CTRL_0" description="Reserved" offset="0x143" size="1">
-                    <bit-field key="res7" name="Res7" description="Reserved" mask="0x80"/>
                     <bit-field key="pmu_en" name="PMU_EN" description="Enable Phase Measurement Unit" mask="0x40"/>
                     <bit-field key="pmu_start" name="PMU_START" description="Start of Phase Measurement Unit" mask="0x20"/>
                     <bit-field key="pmu_if_inv" name="PMU_IF_INV" description="PMU IF Inverse" mask="0x10"/>
@@ -1038,7 +1023,6 @@
                     <bit-field key="rx_rpc_en" name="RX_RPC_EN" description="Reciver Smart Receiving Mode Enable" mask="0x20"/>
                     <bit-field key="pdt_rpc_en" name="PDT_RPC_EN" description="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10"/>
                     <bit-field key="pll_rpc_en" name="PLL_RPC_EN" description="PLL Smart Receiving Mode Enable" mask="0x8"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x4"/>
                     <bit-field key="ipan_rpc_en" name="IPAN_RPC_EN" description="Smart Receiving Mode IPAN Handling Enable" mask="0x2"/>
                     <bit-field key="xah_rpc_en" name="XAH_RPC_EN" description="Smart Receiving in Extended Operating Modes Enable" mask="0x1"/>
                 </register>
@@ -1184,7 +1168,6 @@
                     <bit-field key="scrstrhh" name="SCRSTRHH" description="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"/>
                 </register>
                 <register key="sccsr" name="SCCSR" description="Symbol Counter Compare Source Register" offset="0xDB" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="sccs3" name="SCCS3" description="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"/>
                     <bit-field key="sccs2" name="SCCS2" description="Symbol Counter Compare Source select register for Compare Unit 2" mask="0xC"/>
                     <bit-field key="sccs1" name="SCCS1" description="Symbol Counter Compare Source select register for Compare Units" mask="0x3"/>
@@ -1198,24 +1181,20 @@
                     <bit-field key="sccmp" name="SCCMP" description="Symbol Counter Compare Unit 3 Mode select" mask="0x7"/>
                 </register>
                 <register key="sccr1" name="SCCR1" description="Symbol Counter Control Register 1" offset="0xDD" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="scbtsm" name="SCBTSM" description="Symbol Counter Beacon Timestamp Mask Register" mask="0x20"/>
                     <bit-field key="scckdiv" name="SCCKDIV" description="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"/>
                     <bit-field key="sceeclk" name="SCEECLK" description="Enable External Clock Source on PG2" mask="0x2"/>
                     <bit-field key="scenbo" name="SCENBO" description="Backoff Slot Counter enable" mask="0x1"/>
                 </register>
                 <register key="scsr" name="SCSR" description="Symbol Counter Status Register" offset="0xDE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xFE"/>
                     <bit-field key="scbsy" name="SCBSY" description="Symbol Counter busy" mask="0x1"/>
                 </register>
                 <register key="scirqm" name="SCIRQM" description="Symbol Counter Interrupt Mask Register" offset="0xDF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqmbo" name="IRQMBO" description="Backoff Slot Counter IRQ enable" mask="0x10"/>
                     <bit-field key="irqmof" name="IRQMOF" description="Symbol Counter Overflow IRQ enable" mask="0x8"/>
                     <bit-field key="irqmcp" name="IRQMCP" description="Symbol Counter Compare Match 3 IRQ enable" mask="0x7"/>
                 </register>
                 <register key="scirqs" name="SCIRQS" description="Symbol Counter Interrupt Status Register" offset="0xE0" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqsbo" name="IRQSBO" description="Backoff Slot Counter IRQ" mask="0x10"/>
                     <bit-field key="irqsof" name="IRQSOF" description="Symbol Counter Overflow IRQ" mask="0x8"/>
                     <bit-field key="irqscp" name="IRQSCP" description="Compare Unit 3 Compare Match IRQ" mask="0x7"/>
@@ -1335,7 +1314,6 @@
         <module key="exint" name="EXINT" description="External Interrupts">
             <register-group key="exint" name="EXINT">
                 <register key="pcifr" name="PCIFR" description="Pin Change Interrupt Flag Register" offset="0x3B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcif" name="PCIF" description="Pin Change Interrupt Flags" mask="0x7"/>
                 </register>
                 <register key="eifr" name="EIFR" description="External Interrupt Flag Register" offset="0x3C" size="1">
@@ -1345,7 +1323,6 @@
                     <bit-field key="int" name="INT" description="External Interrupt Request Enable" mask="0xFF"/>
                 </register>
                 <register key="pcicr" name="PCICR" description="Pin Change Interrupt Control Register" offset="0x68" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcie" name="PCIE" description="Pin Change Interrupt Enables" mask="0x7"/>
                 </register>
                 <register key="eicra" name="EICRA" description="External Interrupt Control Register A" offset="0x69" size="1">
@@ -1375,7 +1352,6 @@
             <register-group key="adc" name="ADC">
                 <register key="adcsrc" name="ADCSRC" description="The ADC Control and Status Register C" offset="0x77" size="1">
                     <bit-field key="adtht" name="ADTHT" description="ADC Track-and-Hold Time" mask="0xC0"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x20"/>
                     <bit-field key="adsut" name="ADSUT" description="ADC Start-up Time" mask="0x1F"/>
                 </register>
                 <register key="adc" name="ADC" description="ADC Data Register Bytes" offset="0x78" size="2"/>
@@ -1400,16 +1376,7 @@
                     <bit-field key="adlar" name="ADLAR" description="ADC Left Adjust Result" mask="0x20"/>
                     <bit-field key="mux" name="MUX" description="Analog Channel and Gain Selection Bits" mask="0x1F"/>
                 </register>
-                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1">
-                    <bit-field key="adc15d" name="ADC15D" description="Reserved Bits" mask="0x80"/>
-                    <bit-field key="adc14d" name="ADC14D" description="Reserved Bits" mask="0x40"/>
-                    <bit-field key="adc13d" name="ADC13D" description="Reserved Bits" mask="0x20"/>
-                    <bit-field key="adc12d" name="ADC12D" description="Reserved Bits" mask="0x10"/>
-                    <bit-field key="adc11d" name="ADC11D" description="Reserved Bits" mask="0x8"/>
-                    <bit-field key="adc10d" name="ADC10D" description="Reserved Bits" mask="0x4"/>
-                    <bit-field key="adc9d" name="ADC9D" description="Reserved Bits" mask="0x2"/>
-                    <bit-field key="adc8d" name="ADC8D" description="Reserved Bits" mask="0x1"/>
-                </register>
+                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1"/>
                 <register key="didr0" name="DIDR0" description="Digital Input Disable Register 0" offset="0x7E" size="1">
                     <bit-field key="adc7d" name="ADC7D" description="Disable ADC7:0 Digital Input" mask="0x80"/>
                     <bit-field key="adc6d" name="ADC6D" description="Disable ADC7:0 Digital Input" mask="0x40"/>
@@ -1490,7 +1457,6 @@
                     <bit-field key="clkps" name="CLKPS" description="Clock Prescaler Select Bits" mask="0xF"/>
                 </register>
                 <register key="prr2" name="PRR2" description="Power Reduction Register 2" offset="0x63" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF0"/>
                     <bit-field key="prram3" name="PRRAM3" description="Power Reduction SRAM3" mask="0x8"/>
                     <bit-field key="prram2" name="PRRAM2" description="Power Reduction SRAM2" mask="0x4"/>
                     <bit-field key="prram1" name="PRRAM1" description="Power Reduction SRAM1" mask="0x2"/>
@@ -1507,7 +1473,6 @@
                     <bit-field key="pradc" name="PRADC" description="Power Reduction ADC" mask="0x1"/>
                 </register>
                 <register key="prr1" name="PRR1" description="Power Reduction Register 1" offset="0x65" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="prtrx24" name="PRTRX24" description="Power Reduction Transceiver" mask="0x40"/>
                     <bit-field key="prtim5" name="PRTIM5" description="Power Reduction Timer/Counter5" mask="0x20"/>
                     <bit-field key="prtim4" name="PRTIM4" description="Power Reduction Timer/Counter4" mask="0x10"/>
@@ -1523,7 +1488,6 @@
         <module key="flash" name="FLASH" description="FLASH Controller">
             <register-group key="flash" name="FLASH">
                 <register key="bgcr" name="BGCR" description="Reference Voltage Calibration Register" offset="0x67" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="bgcal_fine" name="BGCAL_FINE" description="Fine Calibration Bits" mask="0x78"/>
                     <bit-field key="bgcal" name="BGCAL" description="Coarse Calibration Bits" mask="0x7"/>
                 </register>
@@ -1539,7 +1503,6 @@
                     <bit-field key="pud" name="PUD" description="Pull-up Disable" mask="0x10"/>
                 </register>
                 <register key="llcr" name="LLCR" description="Low Leakage Voltage Regulator Control Register" offset="0x12F" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="lldone" name="LLDONE" description="Calibration Done" mask="0x20"/>
                     <bit-field key="llcomp" name="LLCOMP" description="Comparator Output" mask="0x10"/>
                     <bit-field key="llcal" name="LLCAL" description="Calibration Active" mask="0x8"/>
@@ -1558,7 +1521,6 @@
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram2" name="DRTRAM2" description="Data Retention Configuration Register #2" offset="0x133" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x40"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
index a1e6554f..21c3de71 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
@@ -452,7 +452,6 @@
                 <register key="twbr" name="TWBR" description="TWI Bit Rate Register" offset="0xB8" size="1"/>
                 <register key="twsr" name="TWSR" description="TWI Status Register" offset="0xB9" size="1">
                     <bit-field key="tws" name="TWS" description="TWI Status" mask="0xF8"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x4"/>
                     <bit-field key="twps" name="TWPS" description="TWI Prescaler Bits" mask="0x3"/>
                 </register>
                 <register key="twar" name="TWAR" description="TWI (Slave) Address Register" offset="0xBA" size="1">
@@ -467,12 +466,10 @@
                     <bit-field key="twsto" name="TWSTO" description="TWI STOP Condition Bit" mask="0x10"/>
                     <bit-field key="twwc" name="TWWC" description="TWI Write Collision Flag" mask="0x8"/>
                     <bit-field key="twen" name="TWEN" description="TWI Enable Bit" mask="0x4"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x2"/>
                     <bit-field key="twie" name="TWIE" description="TWI Interrupt Enable" mask="0x1"/>
                 </register>
                 <register key="twamr" name="TWAMR" description="TWI (Slave) Address Mask Register" offset="0xBD" size="1">
                     <bit-field key="twam" name="TWAM" description="TWI Address Mask" mask="0xFE"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x1"/>
                 </register>
             </register-group>
         </module>
@@ -585,13 +582,11 @@
                 <register key="tccr0a" name="TCCR0A" description="Timer/Counter0 Control Register A" offset="0x44" size="1">
                     <bit-field key="com0a" name="COM0A" description="Compare Match Output A Mode" mask="0xC0"/>
                     <bit-field key="com0b" name="COM0B" description="Compare Match Output B Mode" mask="0x30"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC"/>
                     <bit-field key="wgm0" name="WGM0" description="Waveform Generation Mode" mask="0x3"/>
                 </register>
                 <register key="tccr0b" name="TCCR0B" description="Timer/Counter0 Control Register B" offset="0x45" size="1">
                     <bit-field key="foc0a" name="FOC0A" description="Force Output Compare A" mask="0x80"/>
                     <bit-field key="foc0b" name="FOC0B" description="Force Output Compare B" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x30"/>
                     <bit-field key="wgm02" name="WGM02" mask="0x8"/>
                     <bit-field key="cs0" name="CS0" description="Clock Select" mask="0x7"/>
                 </register>
@@ -608,7 +603,6 @@
         <module key="tc8_async" name="TC8_ASYNC" description="Timer/Counter, 8-bit Async">
             <register-group key="tc2" name="TC2">
                 <register key="tifr2" name="TIFR2" description="Timer/Counter Interrupt Flag Register" offset="0x37" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocf2b" name="OCF2B" description="Output Compare Flag 2 B" mask="0x4"/>
                     <bit-field key="ocf2a" name="OCF2A" description="Output Compare Flag 2 A" mask="0x2"/>
                     <bit-field key="tov2" name="TOV2" description="Timer/Counter2 Overflow Flag" mask="0x1"/>
@@ -618,7 +612,6 @@
                     <bit-field key="psrasy" name="PSRASY" description="Prescaler Reset Timer/Counter2" mask="0x2"/>
                 </register>
                 <register key="timsk2" name="TIMSK2" description="Timer/Counter Interrupt Mask register" offset="0x70" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocie2b" name="OCIE2B" description="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x4"/>
                     <bit-field key="ocie2a" name="OCIE2A" description="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x2"/>
                     <bit-field key="toie2" name="TOIE2" description="Timer/Counter2 Overflow Interrupt Enable" mask="0x1"/>
@@ -685,7 +678,6 @@
                 <register key="tccr5b" name="TCCR5B" description="Timer/Counter5 Control Register B" offset="0x121" size="1">
                     <bit-field key="icnc5" name="ICNC5" description="Input Capture 5 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices5" name="ICES5" description="Input Capture 5 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm5" name="WGM5" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs5" name="CS5" description="Clock Select" mask="0x7"/>
                 </register>
@@ -724,7 +716,6 @@
                 <register key="tccr4b" name="TCCR4B" description="Timer/Counter4 Control Register B" offset="0xA1" size="1">
                     <bit-field key="icnc4" name="ICNC4" description="Input Capture 4 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices4" name="ICES4" description="Input Capture 4 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm4" name="WGM4" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs4" name="CS4" description="Clock Select" mask="0x7"/>
                 </register>
@@ -763,7 +754,6 @@
                 <register key="tccr3b" name="TCCR3B" description="Timer/Counter3 Control Register B" offset="0x91" size="1">
                     <bit-field key="icnc3" name="ICNC3" description="Input Capture 3 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices3" name="ICES3" description="Input Capture 3 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm3" name="WGM3" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs3" name="CS3" description="Clock Select" mask="0x7"/>
                 </register>
@@ -802,7 +792,6 @@
                 <register key="tccr1b" name="TCCR1B" description="Timer/Counter1 Control Register B" offset="0x81" size="1">
                     <bit-field key="icnc1" name="ICNC1" description="Input Capture 1 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices1" name="ICES1" description="Input Capture 1 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm1" name="WGM1" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs1" name="CS1" description="Clock Select" mask="0x7"/>
                 </register>
@@ -821,7 +810,6 @@
         <module key="trx24" name="TRX24" description="Low-Power 2.4 GHz Transceiver">
             <register-group key="trx24" name="TRX24">
                 <register key="irq_mask1" name="IRQ_MASK1" description="Transceiver Interrupt Enable Register 1" offset="0xBE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami_en" name="MAF_3_AMI_EN" description="Address Match Interrupt enable Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami_en" name="MAF_2_AMI_EN" description="Address Match Interrupt enable Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami_en" name="MAF_1_AMI_EN" description="Address Match Interrupt enable Address filter 1" mask="0x4"/>
@@ -829,7 +817,6 @@
                     <bit-field key="tx_start_en" name="TX_START_EN" description="Transmit Start Interrupt enable" mask="0x1"/>
                 </register>
                 <register key="irq_status1" name="IRQ_STATUS1" description="Transceiver Interrupt Status Register 1" offset="0xBF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami" name="MAF_3_AMI" description="Address Match Interrupt Status Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami" name="MAF_2_AMI" description="Address Match Interrupt Status Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami" name="MAF_1_AMI" description="Address Match Interrupt Status Address filter 1" mask="0x4"/>
@@ -837,7 +824,6 @@
                     <bit-field key="tx_start" name="TX_START" description="Transmit Start Interrupt Status" mask="0x1"/>
                 </register>
                 <register key="mafcr0" name="MAFCR0" description="Multiple Address Filter Configuration Register 0" offset="0x10C" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF0"/>
                     <bit-field key="maf3en" name="MAF3EN" description="Multiple Address Filter 3 Enable" mask="0x8"/>
                     <bit-field key="maf2en" name="MAF2EN" description="Multiple Address Filter 2 Enable" mask="0x4"/>
                     <bit-field key="maf1en" name="MAF1EN" description="Multiple Address Filter 1 Enable" mask="0x2"/>
@@ -934,7 +920,6 @@
                     <bit-field key="trx_cmd" name="TRX_CMD" description="State Control Command" mask="0x1F"/>
                 </register>
                 <register key="trx_ctrl_0" name="TRX_CTRL_0" description="Reserved" offset="0x143" size="1">
-                    <bit-field key="res7" name="Res7" description="Reserved" mask="0x80"/>
                     <bit-field key="pmu_en" name="PMU_EN" description="Enable Phase Measurement Unit" mask="0x40"/>
                     <bit-field key="pmu_start" name="PMU_START" description="Start of Phase Measurement Unit" mask="0x20"/>
                     <bit-field key="pmu_if_inv" name="PMU_IF_INV" description="PMU IF Inverse" mask="0x10"/>
@@ -1034,7 +1019,6 @@
                     <bit-field key="rx_rpc_en" name="RX_RPC_EN" description="Reciver Smart Receiving Mode Enable" mask="0x20"/>
                     <bit-field key="pdt_rpc_en" name="PDT_RPC_EN" description="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10"/>
                     <bit-field key="pll_rpc_en" name="PLL_RPC_EN" description="PLL Smart Receiving Mode Enable" mask="0x8"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x4"/>
                     <bit-field key="ipan_rpc_en" name="IPAN_RPC_EN" description="Smart Receiving Mode IPAN Handling Enable" mask="0x2"/>
                     <bit-field key="xah_rpc_en" name="XAH_RPC_EN" description="Smart Receiving in Extended Operating Modes Enable" mask="0x1"/>
                 </register>
@@ -1180,7 +1164,6 @@
                     <bit-field key="scrstrhh" name="SCRSTRHH" description="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"/>
                 </register>
                 <register key="sccsr" name="SCCSR" description="Symbol Counter Compare Source Register" offset="0xDB" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="sccs3" name="SCCS3" description="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"/>
                     <bit-field key="sccs2" name="SCCS2" description="Symbol Counter Compare Source select register for Compare Unit 2" mask="0xC"/>
                     <bit-field key="sccs1" name="SCCS1" description="Symbol Counter Compare Source select register for Compare Units" mask="0x3"/>
@@ -1194,24 +1177,20 @@
                     <bit-field key="sccmp" name="SCCMP" description="Symbol Counter Compare Unit 3 Mode select" mask="0x7"/>
                 </register>
                 <register key="sccr1" name="SCCR1" description="Symbol Counter Control Register 1" offset="0xDD" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="scbtsm" name="SCBTSM" description="Symbol Counter Beacon Timestamp Mask Register" mask="0x20"/>
                     <bit-field key="scckdiv" name="SCCKDIV" description="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"/>
                     <bit-field key="sceeclk" name="SCEECLK" description="Enable External Clock Source on PG2" mask="0x2"/>
                     <bit-field key="scenbo" name="SCENBO" description="Backoff Slot Counter enable" mask="0x1"/>
                 </register>
                 <register key="scsr" name="SCSR" description="Symbol Counter Status Register" offset="0xDE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xFE"/>
                     <bit-field key="scbsy" name="SCBSY" description="Symbol Counter busy" mask="0x1"/>
                 </register>
                 <register key="scirqm" name="SCIRQM" description="Symbol Counter Interrupt Mask Register" offset="0xDF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqmbo" name="IRQMBO" description="Backoff Slot Counter IRQ enable" mask="0x10"/>
                     <bit-field key="irqmof" name="IRQMOF" description="Symbol Counter Overflow IRQ enable" mask="0x8"/>
                     <bit-field key="irqmcp" name="IRQMCP" description="Symbol Counter Compare Match 3 IRQ enable" mask="0x7"/>
                 </register>
                 <register key="scirqs" name="SCIRQS" description="Symbol Counter Interrupt Status Register" offset="0xE0" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqsbo" name="IRQSBO" description="Backoff Slot Counter IRQ" mask="0x10"/>
                     <bit-field key="irqsof" name="IRQSOF" description="Symbol Counter Overflow IRQ" mask="0x8"/>
                     <bit-field key="irqscp" name="IRQSCP" description="Compare Unit 3 Compare Match IRQ" mask="0x7"/>
@@ -1331,7 +1310,6 @@
         <module key="exint" name="EXINT" description="External Interrupts">
             <register-group key="exint" name="EXINT">
                 <register key="pcifr" name="PCIFR" description="Pin Change Interrupt Flag Register" offset="0x3B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcif" name="PCIF" description="Pin Change Interrupt Flags" mask="0x7"/>
                 </register>
                 <register key="eifr" name="EIFR" description="External Interrupt Flag Register" offset="0x3C" size="1">
@@ -1341,7 +1319,6 @@
                     <bit-field key="int" name="INT" description="External Interrupt Request Enable" mask="0xFF"/>
                 </register>
                 <register key="pcicr" name="PCICR" description="Pin Change Interrupt Control Register" offset="0x68" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcie" name="PCIE" description="Pin Change Interrupt Enables" mask="0x7"/>
                 </register>
                 <register key="eicra" name="EICRA" description="External Interrupt Control Register A" offset="0x69" size="1">
@@ -1371,7 +1348,6 @@
             <register-group key="adc" name="ADC">
                 <register key="adcsrc" name="ADCSRC" description="The ADC Control and Status Register C" offset="0x77" size="1">
                     <bit-field key="adtht" name="ADTHT" description="ADC Track-and-Hold Time" mask="0xC0"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x20"/>
                     <bit-field key="adsut" name="ADSUT" description="ADC Start-up Time" mask="0x1F"/>
                 </register>
                 <register key="adc" name="ADC" description="ADC Data Register Bytes" offset="0x78" size="2"/>
@@ -1396,16 +1372,7 @@
                     <bit-field key="adlar" name="ADLAR" description="ADC Left Adjust Result" mask="0x20"/>
                     <bit-field key="mux" name="MUX" description="Analog Channel and Gain Selection Bits" mask="0x1F"/>
                 </register>
-                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1">
-                    <bit-field key="adc15d" name="ADC15D" description="Reserved Bits" mask="0x80"/>
-                    <bit-field key="adc14d" name="ADC14D" description="Reserved Bits" mask="0x40"/>
-                    <bit-field key="adc13d" name="ADC13D" description="Reserved Bits" mask="0x20"/>
-                    <bit-field key="adc12d" name="ADC12D" description="Reserved Bits" mask="0x10"/>
-                    <bit-field key="adc11d" name="ADC11D" description="Reserved Bits" mask="0x8"/>
-                    <bit-field key="adc10d" name="ADC10D" description="Reserved Bits" mask="0x4"/>
-                    <bit-field key="adc9d" name="ADC9D" description="Reserved Bits" mask="0x2"/>
-                    <bit-field key="adc8d" name="ADC8D" description="Reserved Bits" mask="0x1"/>
-                </register>
+                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1"/>
                 <register key="didr0" name="DIDR0" description="Digital Input Disable Register 0" offset="0x7E" size="1">
                     <bit-field key="adc7d" name="ADC7D" description="Disable ADC7:0 Digital Input" mask="0x80"/>
                     <bit-field key="adc6d" name="ADC6D" description="Disable ADC7:0 Digital Input" mask="0x40"/>
@@ -1503,7 +1470,6 @@
                     <bit-field key="pradc" name="PRADC" description="Power Reduction ADC" mask="0x1"/>
                 </register>
                 <register key="prr1" name="PRR1" description="Power Reduction Register 1" offset="0x65" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="prtrx24" name="PRTRX24" description="Power Reduction Transceiver" mask="0x40"/>
                     <bit-field key="prtim5" name="PRTIM5" description="Power Reduction Timer/Counter5" mask="0x20"/>
                     <bit-field key="prtim4" name="PRTIM4" description="Power Reduction Timer/Counter4" mask="0x10"/>
@@ -1518,7 +1484,6 @@
         <module key="flash" name="FLASH" description="FLASH Controller">
             <register-group key="flash" name="FLASH">
                 <register key="bgcr" name="BGCR" description="Reference Voltage Calibration Register" offset="0x67" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="bgcal_fine" name="BGCAL_FINE" description="Fine Calibration Bits" mask="0x78"/>
                     <bit-field key="bgcal" name="BGCAL" description="Coarse Calibration Bits" mask="0x7"/>
                 </register>
@@ -1534,7 +1499,6 @@
                     <bit-field key="pud" name="PUD" description="Pull-up Disable" mask="0x10"/>
                 </register>
                 <register key="llcr" name="LLCR" description="Low Leakage Voltage Regulator Control Register" offset="0x12F" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="lldone" name="LLDONE" description="Calibration Done" mask="0x20"/>
                     <bit-field key="llcomp" name="LLCOMP" description="Comparator Output" mask="0x10"/>
                     <bit-field key="llcal" name="LLCAL" description="Calibration Active" mask="0x8"/>
@@ -1553,7 +1517,6 @@
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram2" name="DRTRAM2" description="Data Retention Configuration Register #2" offset="0x133" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x40"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
index d2a5928f..2118715b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
@@ -456,7 +456,6 @@
                 <register key="twbr" name="TWBR" description="TWI Bit Rate Register" offset="0xB8" size="1"/>
                 <register key="twsr" name="TWSR" description="TWI Status Register" offset="0xB9" size="1">
                     <bit-field key="tws" name="TWS" description="TWI Status" mask="0xF8"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x4"/>
                     <bit-field key="twps" name="TWPS" description="TWI Prescaler Bits" mask="0x3"/>
                 </register>
                 <register key="twar" name="TWAR" description="TWI (Slave) Address Register" offset="0xBA" size="1">
@@ -471,12 +470,10 @@
                     <bit-field key="twsto" name="TWSTO" description="TWI STOP Condition Bit" mask="0x10"/>
                     <bit-field key="twwc" name="TWWC" description="TWI Write Collision Flag" mask="0x8"/>
                     <bit-field key="twen" name="TWEN" description="TWI Enable Bit" mask="0x4"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x2"/>
                     <bit-field key="twie" name="TWIE" description="TWI Interrupt Enable" mask="0x1"/>
                 </register>
                 <register key="twamr" name="TWAMR" description="TWI (Slave) Address Mask Register" offset="0xBD" size="1">
                     <bit-field key="twam" name="TWAM" description="TWI Address Mask" mask="0xFE"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x1"/>
                 </register>
             </register-group>
         </module>
@@ -589,13 +586,11 @@
                 <register key="tccr0a" name="TCCR0A" description="Timer/Counter0 Control Register A" offset="0x44" size="1">
                     <bit-field key="com0a" name="COM0A" description="Compare Match Output A Mode" mask="0xC0"/>
                     <bit-field key="com0b" name="COM0B" description="Compare Match Output B Mode" mask="0x30"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC"/>
                     <bit-field key="wgm0" name="WGM0" description="Waveform Generation Mode" mask="0x3"/>
                 </register>
                 <register key="tccr0b" name="TCCR0B" description="Timer/Counter0 Control Register B" offset="0x45" size="1">
                     <bit-field key="foc0a" name="FOC0A" description="Force Output Compare A" mask="0x80"/>
                     <bit-field key="foc0b" name="FOC0B" description="Force Output Compare B" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x30"/>
                     <bit-field key="wgm02" name="WGM02" mask="0x8"/>
                     <bit-field key="cs0" name="CS0" description="Clock Select" mask="0x7"/>
                 </register>
@@ -612,7 +607,6 @@
         <module key="tc8_async" name="TC8_ASYNC" description="Timer/Counter, 8-bit Async">
             <register-group key="tc2" name="TC2">
                 <register key="tifr2" name="TIFR2" description="Timer/Counter Interrupt Flag Register" offset="0x37" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocf2b" name="OCF2B" description="Output Compare Flag 2 B" mask="0x4"/>
                     <bit-field key="ocf2a" name="OCF2A" description="Output Compare Flag 2 A" mask="0x2"/>
                     <bit-field key="tov2" name="TOV2" description="Timer/Counter2 Overflow Flag" mask="0x1"/>
@@ -622,7 +616,6 @@
                     <bit-field key="psrasy" name="PSRASY" description="Prescaler Reset Timer/Counter2" mask="0x2"/>
                 </register>
                 <register key="timsk2" name="TIMSK2" description="Timer/Counter Interrupt Mask register" offset="0x70" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocie2b" name="OCIE2B" description="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x4"/>
                     <bit-field key="ocie2a" name="OCIE2A" description="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x2"/>
                     <bit-field key="toie2" name="TOIE2" description="Timer/Counter2 Overflow Interrupt Enable" mask="0x1"/>
@@ -689,7 +682,6 @@
                 <register key="tccr5b" name="TCCR5B" description="Timer/Counter5 Control Register B" offset="0x121" size="1">
                     <bit-field key="icnc5" name="ICNC5" description="Input Capture 5 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices5" name="ICES5" description="Input Capture 5 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm5" name="WGM5" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs5" name="CS5" description="Clock Select" mask="0x7"/>
                 </register>
@@ -728,7 +720,6 @@
                 <register key="tccr4b" name="TCCR4B" description="Timer/Counter4 Control Register B" offset="0xA1" size="1">
                     <bit-field key="icnc4" name="ICNC4" description="Input Capture 4 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices4" name="ICES4" description="Input Capture 4 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm4" name="WGM4" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs4" name="CS4" description="Clock Select" mask="0x7"/>
                 </register>
@@ -767,7 +758,6 @@
                 <register key="tccr3b" name="TCCR3B" description="Timer/Counter3 Control Register B" offset="0x91" size="1">
                     <bit-field key="icnc3" name="ICNC3" description="Input Capture 3 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices3" name="ICES3" description="Input Capture 3 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm3" name="WGM3" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs3" name="CS3" description="Clock Select" mask="0x7"/>
                 </register>
@@ -806,7 +796,6 @@
                 <register key="tccr1b" name="TCCR1B" description="Timer/Counter1 Control Register B" offset="0x81" size="1">
                     <bit-field key="icnc1" name="ICNC1" description="Input Capture 1 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices1" name="ICES1" description="Input Capture 1 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm1" name="WGM1" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs1" name="CS1" description="Clock Select" mask="0x7"/>
                 </register>
@@ -825,7 +814,6 @@
         <module key="trx24" name="TRX24" description="Low-Power 2.4 GHz Transceiver">
             <register-group key="trx24" name="TRX24">
                 <register key="irq_mask1" name="IRQ_MASK1" description="Transceiver Interrupt Enable Register 1" offset="0xBE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami_en" name="MAF_3_AMI_EN" description="Address Match Interrupt enable Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami_en" name="MAF_2_AMI_EN" description="Address Match Interrupt enable Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami_en" name="MAF_1_AMI_EN" description="Address Match Interrupt enable Address filter 1" mask="0x4"/>
@@ -833,7 +821,6 @@
                     <bit-field key="tx_start_en" name="TX_START_EN" description="Transmit Start Interrupt enable" mask="0x1"/>
                 </register>
                 <register key="irq_status1" name="IRQ_STATUS1" description="Transceiver Interrupt Status Register 1" offset="0xBF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami" name="MAF_3_AMI" description="Address Match Interrupt Status Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami" name="MAF_2_AMI" description="Address Match Interrupt Status Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami" name="MAF_1_AMI" description="Address Match Interrupt Status Address filter 1" mask="0x4"/>
@@ -841,7 +828,6 @@
                     <bit-field key="tx_start" name="TX_START" description="Transmit Start Interrupt Status" mask="0x1"/>
                 </register>
                 <register key="mafcr0" name="MAFCR0" description="Multiple Address Filter Configuration Register 0" offset="0x10C" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF0"/>
                     <bit-field key="maf3en" name="MAF3EN" description="Multiple Address Filter 3 Enable" mask="0x8"/>
                     <bit-field key="maf2en" name="MAF2EN" description="Multiple Address Filter 2 Enable" mask="0x4"/>
                     <bit-field key="maf1en" name="MAF1EN" description="Multiple Address Filter 1 Enable" mask="0x2"/>
@@ -938,7 +924,6 @@
                     <bit-field key="trx_cmd" name="TRX_CMD" description="State Control Command" mask="0x1F"/>
                 </register>
                 <register key="trx_ctrl_0" name="TRX_CTRL_0" description="Reserved" offset="0x143" size="1">
-                    <bit-field key="res7" name="Res7" description="Reserved" mask="0x80"/>
                     <bit-field key="pmu_en" name="PMU_EN" description="Enable Phase Measurement Unit" mask="0x40"/>
                     <bit-field key="pmu_start" name="PMU_START" description="Start of Phase Measurement Unit" mask="0x20"/>
                     <bit-field key="pmu_if_inv" name="PMU_IF_INV" description="PMU IF Inverse" mask="0x10"/>
@@ -1038,7 +1023,6 @@
                     <bit-field key="rx_rpc_en" name="RX_RPC_EN" description="Reciver Smart Receiving Mode Enable" mask="0x20"/>
                     <bit-field key="pdt_rpc_en" name="PDT_RPC_EN" description="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10"/>
                     <bit-field key="pll_rpc_en" name="PLL_RPC_EN" description="PLL Smart Receiving Mode Enable" mask="0x8"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x4"/>
                     <bit-field key="ipan_rpc_en" name="IPAN_RPC_EN" description="Smart Receiving Mode IPAN Handling Enable" mask="0x2"/>
                     <bit-field key="xah_rpc_en" name="XAH_RPC_EN" description="Smart Receiving in Extended Operating Modes Enable" mask="0x1"/>
                 </register>
@@ -1184,7 +1168,6 @@
                     <bit-field key="scrstrhh" name="SCRSTRHH" description="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"/>
                 </register>
                 <register key="sccsr" name="SCCSR" description="Symbol Counter Compare Source Register" offset="0xDB" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="sccs3" name="SCCS3" description="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"/>
                     <bit-field key="sccs2" name="SCCS2" description="Symbol Counter Compare Source select register for Compare Unit 2" mask="0xC"/>
                     <bit-field key="sccs1" name="SCCS1" description="Symbol Counter Compare Source select register for Compare Units" mask="0x3"/>
@@ -1198,24 +1181,20 @@
                     <bit-field key="sccmp" name="SCCMP" description="Symbol Counter Compare Unit 3 Mode select" mask="0x7"/>
                 </register>
                 <register key="sccr1" name="SCCR1" description="Symbol Counter Control Register 1" offset="0xDD" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="scbtsm" name="SCBTSM" description="Symbol Counter Beacon Timestamp Mask Register" mask="0x20"/>
                     <bit-field key="scckdiv" name="SCCKDIV" description="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"/>
                     <bit-field key="sceeclk" name="SCEECLK" description="Enable External Clock Source on PG2" mask="0x2"/>
                     <bit-field key="scenbo" name="SCENBO" description="Backoff Slot Counter enable" mask="0x1"/>
                 </register>
                 <register key="scsr" name="SCSR" description="Symbol Counter Status Register" offset="0xDE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xFE"/>
                     <bit-field key="scbsy" name="SCBSY" description="Symbol Counter busy" mask="0x1"/>
                 </register>
                 <register key="scirqm" name="SCIRQM" description="Symbol Counter Interrupt Mask Register" offset="0xDF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqmbo" name="IRQMBO" description="Backoff Slot Counter IRQ enable" mask="0x10"/>
                     <bit-field key="irqmof" name="IRQMOF" description="Symbol Counter Overflow IRQ enable" mask="0x8"/>
                     <bit-field key="irqmcp" name="IRQMCP" description="Symbol Counter Compare Match 3 IRQ enable" mask="0x7"/>
                 </register>
                 <register key="scirqs" name="SCIRQS" description="Symbol Counter Interrupt Status Register" offset="0xE0" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqsbo" name="IRQSBO" description="Backoff Slot Counter IRQ" mask="0x10"/>
                     <bit-field key="irqsof" name="IRQSOF" description="Symbol Counter Overflow IRQ" mask="0x8"/>
                     <bit-field key="irqscp" name="IRQSCP" description="Compare Unit 3 Compare Match IRQ" mask="0x7"/>
@@ -1335,7 +1314,6 @@
         <module key="exint" name="EXINT" description="External Interrupts">
             <register-group key="exint" name="EXINT">
                 <register key="pcifr" name="PCIFR" description="Pin Change Interrupt Flag Register" offset="0x3B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcif" name="PCIF" description="Pin Change Interrupt Flags" mask="0x7"/>
                 </register>
                 <register key="eifr" name="EIFR" description="External Interrupt Flag Register" offset="0x3C" size="1">
@@ -1345,7 +1323,6 @@
                     <bit-field key="int" name="INT" description="External Interrupt Request Enable" mask="0xFF"/>
                 </register>
                 <register key="pcicr" name="PCICR" description="Pin Change Interrupt Control Register" offset="0x68" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcie" name="PCIE" description="Pin Change Interrupt Enables" mask="0x7"/>
                 </register>
                 <register key="eicra" name="EICRA" description="External Interrupt Control Register A" offset="0x69" size="1">
@@ -1375,7 +1352,6 @@
             <register-group key="adc" name="ADC">
                 <register key="adcsrc" name="ADCSRC" description="The ADC Control and Status Register C" offset="0x77" size="1">
                     <bit-field key="adtht" name="ADTHT" description="ADC Track-and-Hold Time" mask="0xC0"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x20"/>
                     <bit-field key="adsut" name="ADSUT" description="ADC Start-up Time" mask="0x1F"/>
                 </register>
                 <register key="adc" name="ADC" description="ADC Data Register Bytes" offset="0x78" size="2"/>
@@ -1400,16 +1376,7 @@
                     <bit-field key="adlar" name="ADLAR" description="ADC Left Adjust Result" mask="0x20"/>
                     <bit-field key="mux" name="MUX" description="Analog Channel and Gain Selection Bits" mask="0x1F"/>
                 </register>
-                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1">
-                    <bit-field key="adc15d" name="ADC15D" description="Reserved Bits" mask="0x80"/>
-                    <bit-field key="adc14d" name="ADC14D" description="Reserved Bits" mask="0x40"/>
-                    <bit-field key="adc13d" name="ADC13D" description="Reserved Bits" mask="0x20"/>
-                    <bit-field key="adc12d" name="ADC12D" description="Reserved Bits" mask="0x10"/>
-                    <bit-field key="adc11d" name="ADC11D" description="Reserved Bits" mask="0x8"/>
-                    <bit-field key="adc10d" name="ADC10D" description="Reserved Bits" mask="0x4"/>
-                    <bit-field key="adc9d" name="ADC9D" description="Reserved Bits" mask="0x2"/>
-                    <bit-field key="adc8d" name="ADC8D" description="Reserved Bits" mask="0x1"/>
-                </register>
+                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1"/>
                 <register key="didr0" name="DIDR0" description="Digital Input Disable Register 0" offset="0x7E" size="1">
                     <bit-field key="adc7d" name="ADC7D" description="Disable ADC7:0 Digital Input" mask="0x80"/>
                     <bit-field key="adc6d" name="ADC6D" description="Disable ADC7:0 Digital Input" mask="0x40"/>
@@ -1507,7 +1474,6 @@
                     <bit-field key="pradc" name="PRADC" description="Power Reduction ADC" mask="0x1"/>
                 </register>
                 <register key="prr1" name="PRR1" description="Power Reduction Register 1" offset="0x65" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="prtrx24" name="PRTRX24" description="Power Reduction Transceiver" mask="0x40"/>
                     <bit-field key="prtim5" name="PRTIM5" description="Power Reduction Timer/Counter5" mask="0x20"/>
                     <bit-field key="prtim4" name="PRTIM4" description="Power Reduction Timer/Counter4" mask="0x10"/>
@@ -1523,7 +1489,6 @@
         <module key="flash" name="FLASH" description="FLASH Controller">
             <register-group key="flash" name="FLASH">
                 <register key="bgcr" name="BGCR" description="Reference Voltage Calibration Register" offset="0x67" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="bgcal_fine" name="BGCAL_FINE" description="Fine Calibration Bits" mask="0x78"/>
                     <bit-field key="bgcal" name="BGCAL" description="Coarse Calibration Bits" mask="0x7"/>
                 </register>
@@ -1539,7 +1504,6 @@
                     <bit-field key="pud" name="PUD" description="Pull-up Disable" mask="0x10"/>
                 </register>
                 <register key="llcr" name="LLCR" description="Low Leakage Voltage Regulator Control Register" offset="0x12F" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="lldone" name="LLDONE" description="Calibration Done" mask="0x20"/>
                     <bit-field key="llcomp" name="LLCOMP" description="Comparator Output" mask="0x10"/>
                     <bit-field key="llcal" name="LLCAL" description="Calibration Active" mask="0x8"/>
@@ -1558,7 +1522,6 @@
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram2" name="DRTRAM2" description="Data Retention Configuration Register #2" offset="0x133" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x40"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml
index 753a4381..7b8757b9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml
@@ -874,7 +874,6 @@
                     <bit-field key="ivce" name="IVCE" description="Interrupt Vector Change Enable" mask="0x1"/>
                 </register>
                 <register key="rampz" name="RAMPZ" description="Extended Z-pointer Register for ELPM/SPM" offset="0x5B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved" mask="0xFC"/>
                     <bit-field key="rampz" name="RAMPZ" description="Extended Z-Pointer Value" mask="0x3"/>
                 </register>
                 <register key="eind" name="EIND" description="Extended Indirect Register" offset="0x5C" size="1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
index 00179cd0..cee20091 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
@@ -452,7 +452,6 @@
                 <register key="twbr" name="TWBR" description="TWI Bit Rate Register" offset="0xB8" size="1"/>
                 <register key="twsr" name="TWSR" description="TWI Status Register" offset="0xB9" size="1">
                     <bit-field key="tws" name="TWS" description="TWI Status" mask="0xF8"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x4"/>
                     <bit-field key="twps" name="TWPS" description="TWI Prescaler Bits" mask="0x3"/>
                 </register>
                 <register key="twar" name="TWAR" description="TWI (Slave) Address Register" offset="0xBA" size="1">
@@ -467,12 +466,10 @@
                     <bit-field key="twsto" name="TWSTO" description="TWI STOP Condition Bit" mask="0x10"/>
                     <bit-field key="twwc" name="TWWC" description="TWI Write Collision Flag" mask="0x8"/>
                     <bit-field key="twen" name="TWEN" description="TWI Enable Bit" mask="0x4"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x2"/>
                     <bit-field key="twie" name="TWIE" description="TWI Interrupt Enable" mask="0x1"/>
                 </register>
                 <register key="twamr" name="TWAMR" description="TWI (Slave) Address Mask Register" offset="0xBD" size="1">
                     <bit-field key="twam" name="TWAM" description="TWI Address Mask" mask="0xFE"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x1"/>
                 </register>
             </register-group>
         </module>
@@ -585,13 +582,11 @@
                 <register key="tccr0a" name="TCCR0A" description="Timer/Counter0 Control Register A" offset="0x44" size="1">
                     <bit-field key="com0a" name="COM0A" description="Compare Match Output A Mode" mask="0xC0"/>
                     <bit-field key="com0b" name="COM0B" description="Compare Match Output B Mode" mask="0x30"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC"/>
                     <bit-field key="wgm0" name="WGM0" description="Waveform Generation Mode" mask="0x3"/>
                 </register>
                 <register key="tccr0b" name="TCCR0B" description="Timer/Counter0 Control Register B" offset="0x45" size="1">
                     <bit-field key="foc0a" name="FOC0A" description="Force Output Compare A" mask="0x80"/>
                     <bit-field key="foc0b" name="FOC0B" description="Force Output Compare B" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x30"/>
                     <bit-field key="wgm02" name="WGM02" mask="0x8"/>
                     <bit-field key="cs0" name="CS0" description="Clock Select" mask="0x7"/>
                 </register>
@@ -608,7 +603,6 @@
         <module key="tc8_async" name="TC8_ASYNC" description="Timer/Counter, 8-bit Async">
             <register-group key="tc2" name="TC2">
                 <register key="tifr2" name="TIFR2" description="Timer/Counter Interrupt Flag Register" offset="0x37" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocf2b" name="OCF2B" description="Output Compare Flag 2 B" mask="0x4"/>
                     <bit-field key="ocf2a" name="OCF2A" description="Output Compare Flag 2 A" mask="0x2"/>
                     <bit-field key="tov2" name="TOV2" description="Timer/Counter2 Overflow Flag" mask="0x1"/>
@@ -618,7 +612,6 @@
                     <bit-field key="psrasy" name="PSRASY" description="Prescaler Reset Timer/Counter2" mask="0x2"/>
                 </register>
                 <register key="timsk2" name="TIMSK2" description="Timer/Counter Interrupt Mask register" offset="0x70" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="ocie2b" name="OCIE2B" description="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x4"/>
                     <bit-field key="ocie2a" name="OCIE2A" description="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x2"/>
                     <bit-field key="toie2" name="TOIE2" description="Timer/Counter2 Overflow Interrupt Enable" mask="0x1"/>
@@ -685,7 +678,6 @@
                 <register key="tccr5b" name="TCCR5B" description="Timer/Counter5 Control Register B" offset="0x121" size="1">
                     <bit-field key="icnc5" name="ICNC5" description="Input Capture 5 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices5" name="ICES5" description="Input Capture 5 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm5" name="WGM5" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs5" name="CS5" description="Clock Select" mask="0x7"/>
                 </register>
@@ -724,7 +716,6 @@
                 <register key="tccr4b" name="TCCR4B" description="Timer/Counter4 Control Register B" offset="0xA1" size="1">
                     <bit-field key="icnc4" name="ICNC4" description="Input Capture 4 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices4" name="ICES4" description="Input Capture 4 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm4" name="WGM4" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs4" name="CS4" description="Clock Select" mask="0x7"/>
                 </register>
@@ -763,7 +754,6 @@
                 <register key="tccr3b" name="TCCR3B" description="Timer/Counter3 Control Register B" offset="0x91" size="1">
                     <bit-field key="icnc3" name="ICNC3" description="Input Capture 3 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices3" name="ICES3" description="Input Capture 3 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm3" name="WGM3" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs3" name="CS3" description="Clock Select" mask="0x7"/>
                 </register>
@@ -802,7 +792,6 @@
                 <register key="tccr1b" name="TCCR1B" description="Timer/Counter1 Control Register B" offset="0x81" size="1">
                     <bit-field key="icnc1" name="ICNC1" description="Input Capture 1 Noise Canceller" mask="0x80"/>
                     <bit-field key="ices1" name="ICES1" description="Input Capture 1 Edge Select" mask="0x40"/>
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x20"/>
                     <bit-field key="wgm1" name="WGM1" description="Waveform Generation Mode" mask="0x18"/>
                     <bit-field key="cs1" name="CS1" description="Clock Select" mask="0x7"/>
                 </register>
@@ -821,7 +810,6 @@
         <module key="trx24" name="TRX24" description="Low-Power 2.4 GHz Transceiver">
             <register-group key="trx24" name="TRX24">
                 <register key="irq_mask1" name="IRQ_MASK1" description="Transceiver Interrupt Enable Register 1" offset="0xBE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami_en" name="MAF_3_AMI_EN" description="Address Match Interrupt enable Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami_en" name="MAF_2_AMI_EN" description="Address Match Interrupt enable Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami_en" name="MAF_1_AMI_EN" description="Address Match Interrupt enable Address filter 1" mask="0x4"/>
@@ -829,7 +817,6 @@
                     <bit-field key="tx_start_en" name="TX_START_EN" description="Transmit Start Interrupt enable" mask="0x1"/>
                 </register>
                 <register key="irq_status1" name="IRQ_STATUS1" description="Transceiver Interrupt Status Register 1" offset="0xBF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="maf_3_ami" name="MAF_3_AMI" description="Address Match Interrupt Status Address filter 3" mask="0x10"/>
                     <bit-field key="maf_2_ami" name="MAF_2_AMI" description="Address Match Interrupt Status Address filter 2" mask="0x8"/>
                     <bit-field key="maf_1_ami" name="MAF_1_AMI" description="Address Match Interrupt Status Address filter 1" mask="0x4"/>
@@ -837,7 +824,6 @@
                     <bit-field key="tx_start" name="TX_START" description="Transmit Start Interrupt Status" mask="0x1"/>
                 </register>
                 <register key="mafcr0" name="MAFCR0" description="Multiple Address Filter Configuration Register 0" offset="0x10C" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF0"/>
                     <bit-field key="maf3en" name="MAF3EN" description="Multiple Address Filter 3 Enable" mask="0x8"/>
                     <bit-field key="maf2en" name="MAF2EN" description="Multiple Address Filter 2 Enable" mask="0x4"/>
                     <bit-field key="maf1en" name="MAF1EN" description="Multiple Address Filter 1 Enable" mask="0x2"/>
@@ -934,7 +920,6 @@
                     <bit-field key="trx_cmd" name="TRX_CMD" description="State Control Command" mask="0x1F"/>
                 </register>
                 <register key="trx_ctrl_0" name="TRX_CTRL_0" description="Reserved" offset="0x143" size="1">
-                    <bit-field key="res7" name="Res7" description="Reserved" mask="0x80"/>
                     <bit-field key="pmu_en" name="PMU_EN" description="Enable Phase Measurement Unit" mask="0x40"/>
                     <bit-field key="pmu_start" name="PMU_START" description="Start of Phase Measurement Unit" mask="0x20"/>
                     <bit-field key="pmu_if_inv" name="PMU_IF_INV" description="PMU IF Inverse" mask="0x10"/>
@@ -1034,7 +1019,6 @@
                     <bit-field key="rx_rpc_en" name="RX_RPC_EN" description="Reciver Smart Receiving Mode Enable" mask="0x20"/>
                     <bit-field key="pdt_rpc_en" name="PDT_RPC_EN" description="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10"/>
                     <bit-field key="pll_rpc_en" name="PLL_RPC_EN" description="PLL Smart Receiving Mode Enable" mask="0x8"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x4"/>
                     <bit-field key="ipan_rpc_en" name="IPAN_RPC_EN" description="Smart Receiving Mode IPAN Handling Enable" mask="0x2"/>
                     <bit-field key="xah_rpc_en" name="XAH_RPC_EN" description="Smart Receiving in Extended Operating Modes Enable" mask="0x1"/>
                 </register>
@@ -1180,7 +1164,6 @@
                     <bit-field key="scrstrhh" name="SCRSTRHH" description="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"/>
                 </register>
                 <register key="sccsr" name="SCCSR" description="Symbol Counter Compare Source Register" offset="0xDB" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="sccs3" name="SCCS3" description="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"/>
                     <bit-field key="sccs2" name="SCCS2" description="Symbol Counter Compare Source select register for Compare Unit 2" mask="0xC"/>
                     <bit-field key="sccs1" name="SCCS1" description="Symbol Counter Compare Source select register for Compare Units" mask="0x3"/>
@@ -1194,18 +1177,15 @@
                     <bit-field key="sccmp" name="SCCMP" description="Symbol Counter Compare Unit 3 Mode select" mask="0x7"/>
                 </register>
                 <register key="sccr1" name="SCCR1" description="Symbol Counter Control Register 1" offset="0xDD" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="scbtsm" name="SCBTSM" description="Symbol Counter Beacon Timestamp Mask Register" mask="0x20"/>
                     <bit-field key="scckdiv" name="SCCKDIV" description="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"/>
                     <bit-field key="sceeclk" name="SCEECLK" description="Enable External Clock Source on PG2" mask="0x2"/>
                     <bit-field key="scenbo" name="SCENBO" description="Backoff Slot Counter enable" mask="0x1"/>
                 </register>
                 <register key="scsr" name="SCSR" description="Symbol Counter Status Register" offset="0xDE" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xFE"/>
                     <bit-field key="scbsy" name="SCBSY" description="Symbol Counter busy" mask="0x1"/>
                 </register>
                 <register key="scirqm" name="SCIRQM" description="Symbol Counter Interrupt Mask Register" offset="0xDF" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xE0"/>
                     <bit-field key="irqmbo" name="IRQMBO" description="Backoff Slot Counter IRQ enable" mask="0x10"/>
                     <bit-field key="irqmof" name="IRQMOF" description="Symbol Counter Overflow IRQ enable" mask="0x8"/>
                     <bit-field key="irqmcp" name="IRQMCP" description="Symbol Counter Compare Match 3 IRQ enable" mask="0x7"/>
@@ -1330,7 +1310,6 @@
         <module key="exint" name="EXINT" description="External Interrupts">
             <register-group key="exint" name="EXINT">
                 <register key="pcifr" name="PCIFR" description="Pin Change Interrupt Flag Register" offset="0x3B" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcif" name="PCIF" description="Pin Change Interrupt Flags" mask="0x7"/>
                 </register>
                 <register key="eifr" name="EIFR" description="External Interrupt Flag Register" offset="0x3C" size="1">
@@ -1340,7 +1319,6 @@
                     <bit-field key="int" name="INT" description="External Interrupt Request Enable" mask="0xFF"/>
                 </register>
                 <register key="pcicr" name="PCICR" description="Pin Change Interrupt Control Register" offset="0x68" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xF8"/>
                     <bit-field key="pcie" name="PCIE" description="Pin Change Interrupt Enables" mask="0x7"/>
                 </register>
                 <register key="eicra" name="EICRA" description="External Interrupt Control Register A" offset="0x69" size="1">
@@ -1370,7 +1348,6 @@
             <register-group key="adc" name="ADC">
                 <register key="adcsrc" name="ADCSRC" description="The ADC Control and Status Register C" offset="0x77" size="1">
                     <bit-field key="adtht" name="ADTHT" description="ADC Track-and-Hold Time" mask="0xC0"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x20"/>
                     <bit-field key="adsut" name="ADSUT" description="ADC Start-up Time" mask="0x1F"/>
                 </register>
                 <register key="adc" name="ADC" description="ADC Data Register Bytes" offset="0x78" size="2"/>
@@ -1395,16 +1372,7 @@
                     <bit-field key="adlar" name="ADLAR" description="ADC Left Adjust Result" mask="0x20"/>
                     <bit-field key="mux" name="MUX" description="Analog Channel and Gain Selection Bits" mask="0x1F"/>
                 </register>
-                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1">
-                    <bit-field key="adc15d" name="ADC15D" description="Reserved Bits" mask="0x80"/>
-                    <bit-field key="adc14d" name="ADC14D" description="Reserved Bits" mask="0x40"/>
-                    <bit-field key="adc13d" name="ADC13D" description="Reserved Bits" mask="0x20"/>
-                    <bit-field key="adc12d" name="ADC12D" description="Reserved Bits" mask="0x10"/>
-                    <bit-field key="adc11d" name="ADC11D" description="Reserved Bits" mask="0x8"/>
-                    <bit-field key="adc10d" name="ADC10D" description="Reserved Bits" mask="0x4"/>
-                    <bit-field key="adc9d" name="ADC9D" description="Reserved Bits" mask="0x2"/>
-                    <bit-field key="adc8d" name="ADC8D" description="Reserved Bits" mask="0x1"/>
-                </register>
+                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1"/>
                 <register key="didr0" name="DIDR0" description="Digital Input Disable Register 0" offset="0x7E" size="1">
                     <bit-field key="adc7d" name="ADC7D" description="Disable ADC7:0 Digital Input" mask="0x80"/>
                     <bit-field key="adc6d" name="ADC6D" description="Disable ADC7:0 Digital Input" mask="0x40"/>
@@ -1498,7 +1466,6 @@
                     <bit-field key="pradc" name="PRADC" description="Power Reduction ADC" mask="0x1"/>
                 </register>
                 <register key="prr1" name="PRR1" description="Power Reduction Register 1" offset="0x65" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="prtrx24" name="PRTRX24" description="Power Reduction Transceiver" mask="0x40"/>
                     <bit-field key="prtim5" name="PRTIM5" description="Power Reduction Timer/Counter5" mask="0x20"/>
                     <bit-field key="prtim4" name="PRTIM4" description="Power Reduction Timer/Counter4" mask="0x10"/>
@@ -1513,7 +1480,6 @@
         <module key="flash" name="FLASH" description="FLASH Controller">
             <register-group key="flash" name="FLASH">
                 <register key="bgcr" name="BGCR" description="Reference Voltage Calibration Register" offset="0x67" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x80"/>
                     <bit-field key="bgcal_fine" name="BGCAL_FINE" description="Fine Calibration Bits" mask="0x78"/>
                     <bit-field key="bgcal" name="BGCAL" description="Coarse Calibration Bits" mask="0x7"/>
                 </register>
@@ -1529,7 +1495,6 @@
                     <bit-field key="pud" name="PUD" description="Pull-up Disable" mask="0x10"/>
                 </register>
                 <register key="llcr" name="LLCR" description="Low Leakage Voltage Regulator Control Register" offset="0x12F" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="lldone" name="LLDONE" description="Calibration Done" mask="0x20"/>
                     <bit-field key="llcomp" name="LLCOMP" description="Comparator Output" mask="0x10"/>
                     <bit-field key="llcal" name="LLCAL" description="Calibration Active" mask="0x8"/>
@@ -1548,7 +1513,6 @@
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
                 <register key="drtram2" name="DRTRAM2" description="Data Retention Configuration Register #2" offset="0x133" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0x40"/>
                     <bit-field key="drtswok" name="DRTSWOK" description="DRT Switch OK" mask="0x20"/>
                     <bit-field key="endrt" name="ENDRT" description="Enable SRAM Data Retention" mask="0x10"/>
                 </register>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
index 1aa56194..5755ed2b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
@@ -924,7 +924,6 @@
                     <bit-field key="trx_cmd" name="TRX_CMD" description="State Control Command" mask="0x1F"/>
                 </register>
                 <register key="trx_ctrl_0" name="TRX_CTRL_0" description="Reserved" offset="0x143" size="1">
-                    <bit-field key="res7" name="Res7" description="Reserved" mask="0x80"/>
                     <bit-field key="pmu_en" name="PMU_EN" description="Enable Phase Measurement Unit" mask="0x40"/>
                     <bit-field key="pmu_start" name="PMU_START" description="Start of Phase Measurement Unit" mask="0x20"/>
                     <bit-field key="pmu_if_inv" name="PMU_IF_INV" description="PMU IF Inverse" mask="0x10"/>
@@ -1024,7 +1023,6 @@
                     <bit-field key="rx_rpc_en" name="RX_RPC_EN" description="Reciver Smart Receiving Mode Enable" mask="0x20"/>
                     <bit-field key="pdt_rpc_en" name="PDT_RPC_EN" description="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10"/>
                     <bit-field key="pll_rpc_en" name="PLL_RPC_EN" description="PLL Smart Receiving Mode Enable" mask="0x8"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x4"/>
                     <bit-field key="ipan_rpc_en" name="IPAN_RPC_EN" description="Smart Receiving Mode IPAN Handling Enable" mask="0x2"/>
                     <bit-field key="xah_rpc_en" name="XAH_RPC_EN" description="Smart Receiving in Extended Operating Modes Enable" mask="0x1"/>
                 </register>
@@ -1183,7 +1181,6 @@
                     <bit-field key="sccmp" name="SCCMP" description="Symbol Counter Compare Unit 3 Mode select" mask="0x7"/>
                 </register>
                 <register key="sccr1" name="SCCR1" description="Symbol Counter Control Register 1" offset="0xDD" size="1">
-                    <bit-field key="res" name="Res" description="Reserved Bit" mask="0xC0"/>
                     <bit-field key="scbtsm" name="SCBTSM" description="Symbol Counter Beacon Timestamp Mask Register" mask="0x20"/>
                     <bit-field key="scckdiv" name="SCCKDIV" description="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"/>
                     <bit-field key="sceeclk" name="SCEECLK" description="Enable External Clock Source on PG2" mask="0x2"/>
@@ -1355,7 +1352,6 @@
             <register-group key="adc" name="ADC">
                 <register key="adcsrc" name="ADCSRC" description="The ADC Control and Status Register C" offset="0x77" size="1">
                     <bit-field key="adtht" name="ADTHT" description="ADC Track-and-Hold Time" mask="0xC0"/>
-                    <bit-field key="res0" name="Res0" description="Reserved" mask="0x20"/>
                     <bit-field key="adsut" name="ADSUT" description="ADC Start-up Time" mask="0x1F"/>
                 </register>
                 <register key="adc" name="ADC" description="ADC Data Register Bytes" offset="0x78" size="2"/>
@@ -1380,16 +1376,7 @@
                     <bit-field key="adlar" name="ADLAR" description="ADC Left Adjust Result" mask="0x20"/>
                     <bit-field key="mux" name="MUX" description="Analog Channel and Gain Selection Bits" mask="0x1F"/>
                 </register>
-                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1">
-                    <bit-field key="adc15d" name="ADC15D" description="Reserved Bits" mask="0x80"/>
-                    <bit-field key="adc14d" name="ADC14D" description="Reserved Bits" mask="0x40"/>
-                    <bit-field key="adc13d" name="ADC13D" description="Reserved Bits" mask="0x20"/>
-                    <bit-field key="adc12d" name="ADC12D" description="Reserved Bits" mask="0x10"/>
-                    <bit-field key="adc11d" name="ADC11D" description="Reserved Bits" mask="0x8"/>
-                    <bit-field key="adc10d" name="ADC10D" description="Reserved Bits" mask="0x4"/>
-                    <bit-field key="adc9d" name="ADC9D" description="Reserved Bits" mask="0x2"/>
-                    <bit-field key="adc8d" name="ADC8D" description="Reserved Bits" mask="0x1"/>
-                </register>
+                <register key="didr2" name="DIDR2" description="Digital Input Disable Register 2" offset="0x7D" size="1"/>
                 <register key="didr0" name="DIDR0" description="Digital Input Disable Register 0" offset="0x7E" size="1">
                     <bit-field key="adc7d" name="ADC7D" description="Disable ADC7:0 Digital Input" mask="0x80"/>
                     <bit-field key="adc6d" name="ADC6D" description="Disable ADC7:0 Digital Input" mask="0x40"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml
index 927aa3df..0368004c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml
@@ -621,7 +621,7 @@
                     <bit-field key="frqrange" name="FRQRANGE" description="Frequency Range" mask="0xC0"/>
                     <bit-field key="x32klpm" name="X32KLPM" description="32.768 kHz XTAL OSC Low-power Mode" mask="0x20"/>
                     <bit-field key="xoscpwr" name="XOSCPWR" description="16 MHz Crystal Oscillator High Power mode" mask="0x10"/>
-                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0x0F"/>
+                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0xF"/>
                 </register>
                 <register key="xoscfail" name="XOSCFAIL" description="Oscillator Failure Detection Register" offset="0x3" size="1">
                     <bit-field key="pllfdif" name="PLLFDIF" description="PLL Failure Detection Interrupt Flag" mask="0x8"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml
index 5f294157..db51d336 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml
@@ -499,7 +499,7 @@
                     <bit-field key="frqrange" name="FRQRANGE" description="Frequency Range" mask="0xC0"/>
                     <bit-field key="x32klpm" name="X32KLPM" description="32.768 kHz XTAL OSC Low-power Mode" mask="0x20"/>
                     <bit-field key="xoscpwr" name="XOSCPWR" description="16 MHz Crystal Oscillator High Power mode" mask="0x10"/>
-                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0x0F"/>
+                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0xF"/>
                 </register>
                 <register key="xoscfail" name="XOSCFAIL" description="Oscillator Failure Detection Register" offset="0x3" size="1">
                     <bit-field key="pllfdif" name="PLLFDIF" description="PLL Failure Detection Interrupt Flag" mask="0x8"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml
index 1ff8cd5a..0b953261 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml
@@ -508,7 +508,7 @@
                     <bit-field key="frqrange" name="FRQRANGE" description="Frequency Range" mask="0xC0"/>
                     <bit-field key="x32klpm" name="X32KLPM" description="32.768 kHz XTAL OSC Low-power Mode" mask="0x20"/>
                     <bit-field key="xoscpwr" name="XOSCPWR" description="16 MHz Crystal Oscillator High Power mode" mask="0x10"/>
-                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0x0F"/>
+                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0xF"/>
                 </register>
                 <register key="xoscfail" name="XOSCFAIL" description="Oscillator Failure Detection Register" offset="0x3" size="1">
                     <bit-field key="pllfdif" name="PLLFDIF" description="PLL Failure Detection Interrupt Flag" mask="0x8"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml
index 23c63c88..e2a9c8ed 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml
@@ -508,7 +508,7 @@
                     <bit-field key="frqrange" name="FRQRANGE" description="Frequency Range" mask="0xC0"/>
                     <bit-field key="x32klpm" name="X32KLPM" description="32.768 kHz XTAL OSC Low-power Mode" mask="0x20"/>
                     <bit-field key="xoscpwr" name="XOSCPWR" description="16 MHz Crystal Oscillator High Power mode" mask="0x10"/>
-                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0x0F"/>
+                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0xF"/>
                 </register>
                 <register key="xoscfail" name="XOSCFAIL" description="Oscillator Failure Detection Register" offset="0x3" size="1">
                     <bit-field key="pllfdif" name="PLLFDIF" description="PLL Failure Detection Interrupt Flag" mask="0x8"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml
index 8c6ddd56..c9da8988 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml
@@ -621,7 +621,7 @@
                     <bit-field key="frqrange" name="FRQRANGE" description="Frequency Range" mask="0xC0"/>
                     <bit-field key="x32klpm" name="X32KLPM" description="32.768 kHz XTAL OSC Low-power Mode" mask="0x20"/>
                     <bit-field key="xoscpwr" name="XOSCPWR" description="16 MHz Crystal Oscillator High Power mode" mask="0x10"/>
-                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0x0F"/>
+                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0xF"/>
                 </register>
                 <register key="xoscfail" name="XOSCFAIL" description="Oscillator Failure Detection Register" offset="0x3" size="1">
                     <bit-field key="pllfdif" name="PLLFDIF" description="PLL Failure Detection Interrupt Flag" mask="0x8"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml
index 2c41a284..2abb91f0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml
@@ -499,7 +499,7 @@
                     <bit-field key="frqrange" name="FRQRANGE" description="Frequency Range" mask="0xC0"/>
                     <bit-field key="x32klpm" name="X32KLPM" description="32.768 kHz XTAL OSC Low-power Mode" mask="0x20"/>
                     <bit-field key="xoscpwr" name="XOSCPWR" description="16 MHz Crystal Oscillator High Power mode" mask="0x10"/>
-                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0x0F"/>
+                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0xF"/>
                 </register>
                 <register key="xoscfail" name="XOSCFAIL" description="Oscillator Failure Detection Register" offset="0x3" size="1">
                     <bit-field key="pllfdif" name="PLLFDIF" description="PLL Failure Detection Interrupt Flag" mask="0x8"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml
index 1c277bf7..3dbc96f0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml
@@ -508,7 +508,7 @@
                     <bit-field key="frqrange" name="FRQRANGE" description="Frequency Range" mask="0xC0"/>
                     <bit-field key="x32klpm" name="X32KLPM" description="32.768 kHz XTAL OSC Low-power Mode" mask="0x20"/>
                     <bit-field key="xoscpwr" name="XOSCPWR" description="16 MHz Crystal Oscillator High Power mode" mask="0x10"/>
-                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0x0F"/>
+                    <bit-field key="xoscsel" name="XOSCSEL" description="External Oscillator Selection and Startup Time" mask="0xF"/>
                 </register>
                 <register key="xoscfail" name="XOSCFAIL" description="Oscillator Failure Detection Register" offset="0x3" size="1">
                     <bit-field key="pllfdif" name="PLLFDIF" description="PLL Failure Detection Interrupt Flag" mask="0x8"/>