From 779e938746012944d4cca8422a4837cd1722426b Mon Sep 17 00:00:00 2001 From: Nav Date: Sat, 18 Jan 2025 18:45:07 +0000 Subject: [PATCH] Included RISC-V CSRs in WCH TDFs --- src/Targets/RiscV/RiscV.cpp | 299 +----------------- src/Targets/RiscV/RiscV.hpp | 7 +- src/Targets/RiscV/Wch/WchRiscV.cpp | 2 + .../RiscV/Wch/CH32V003.xml | 57 +++- .../RiscV/Wch/CH32X035.xml | 60 +++- 5 files changed, 122 insertions(+), 303 deletions(-) diff --git a/src/Targets/RiscV/RiscV.cpp b/src/Targets/RiscV/RiscV.cpp index 9f33e46a..5f35f5c4 100644 --- a/src/Targets/RiscV/RiscV.cpp +++ b/src/Targets/RiscV/RiscV.cpp @@ -25,17 +25,16 @@ namespace Targets::RiscV , csrMemorySegmentDescriptor(this->csrAddressSpaceDescriptor.getMemorySegmentDescriptor("csr")) , gprAddressSpaceDescriptor(this->targetDescriptionFile.getGprAddressSpaceDescriptor()) , gprMemorySegmentDescriptor(this->gprAddressSpaceDescriptor.getMemorySegmentDescriptor("gpr")) - , cpuPeripheralDescriptor( - RiscV::generateCpuPeripheralDescriptor( + , cpuPeripheralDescriptor(this->targetDescriptionFile.getTargetPeripheralDescriptor("cpu")) + , csrGroupDescriptor(this->cpuPeripheralDescriptor.getRegisterGroupDescriptor("csr")) + , gprGroupDescriptor( + RiscV::generateGeneralPurposeRegisterGroupDescriptor( this->isaDescriptor, - this->csrAddressSpaceDescriptor, this->gprAddressSpaceDescriptor, - this->csrMemorySegmentDescriptor, - this->gprMemorySegmentDescriptor + this->gprMemorySegmentDescriptor, + this->cpuPeripheralDescriptor ) ) - , csrGroupDescriptor(this->cpuPeripheralDescriptor.getRegisterGroupDescriptor("csr")) - , gprGroupDescriptor(this->cpuPeripheralDescriptor.getRegisterGroupDescriptor("gpr")) , pcRegisterDescriptor(this->csrGroupDescriptor.getRegisterDescriptor("dpc")) , spRegisterDescriptor(this->gprGroupDescriptor.getRegisterDescriptor("x2")) , sysAddressSpaceDescriptor(this->targetDescriptionFile.getSystemAddressSpaceDescriptor()) @@ -394,21 +393,12 @@ namespace Targets::RiscV return *(segmentDescriptors.front()); } - TargetPeripheralDescriptor RiscV::generateCpuPeripheralDescriptor( + const TargetRegisterGroupDescriptor& RiscV::generateGeneralPurposeRegisterGroupDescriptor( const IsaDescriptor& isaDescriptor, - const TargetAddressSpaceDescriptor& csrAddressSpaceDescriptor, const TargetAddressSpaceDescriptor& gprAddressSpaceDescriptor, - const TargetMemorySegmentDescriptor& csrMemorySegmentDescriptor, - const TargetMemorySegmentDescriptor& gprMemorySegmentDescriptor + const TargetMemorySegmentDescriptor& gprMemorySegmentDescriptor, + TargetPeripheralDescriptor& cpuPeripheralDescriptor ) { - auto cpuPeripheralDescriptor = TargetPeripheralDescriptor{ - "cpu", - "CPU", - "RISC-V GPRs and CSRs", - {}, - {} - }; - auto& gprGroup = cpuPeripheralDescriptor.registerGroupDescriptorsByKey.emplace( "gpr", TargetRegisterGroupDescriptor{ @@ -443,275 +433,6 @@ namespace Targets::RiscV ); } - auto& csrGroup = cpuPeripheralDescriptor.registerGroupDescriptorsByKey.emplace( - "csr", - TargetRegisterGroupDescriptor{ - "csr", - "csr", - "CSR", - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - std::nullopt, - {}, - {} - } - ).first->second; - - csrGroup.registerDescriptorsByKey.emplace( - "marchid", - TargetRegisterDescriptor{ - "marchid", - "MARCHID", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0xF12, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, false}, - "Architecture ID", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mimpid", - TargetRegisterDescriptor{ - "mimpid", - "MIMPID", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0xF13, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, false}, - "Implementation ID", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mstatus", - TargetRegisterDescriptor{ - "mstatus", - "MSTATUS", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x300, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Machine status", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "misa", - TargetRegisterDescriptor{ - "misa", - "MISA", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x301, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "ISA and extensions", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mtvec", - TargetRegisterDescriptor{ - "mtvec", - "MTVEC", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x305, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Machine trap-handler base address", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mcounteren", - TargetRegisterDescriptor{ - "mcounteren", - "MCOUNTEREN", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x306, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Machine counter enable", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mscratch", - TargetRegisterDescriptor{ - "mscratch", - "MSCRATCH", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x340, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Scratch register for machine trap handlers", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mepc", - TargetRegisterDescriptor{ - "mepc", - "MEPC", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x341, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Machine exception program counter", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mcause", - TargetRegisterDescriptor{ - "mcause", - "MCAUSE", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x342, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Machine trap cause", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mtval", - TargetRegisterDescriptor{ - "mtval", - "MTVAL", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x343, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Machine bad address or instruction", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "mip", - TargetRegisterDescriptor{ - "mip", - "MIP", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x344, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Machine interrupt pending", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "dcsr", - TargetRegisterDescriptor{ - "dcsr", - "DCSR", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x7B0, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Debug control and status", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "dpc", - TargetRegisterDescriptor{ - "dpc", - "DPC", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x7B1, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Debug program counter", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "dscratch0", - TargetRegisterDescriptor{ - "dscratch0", - "DSCRATCH0", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x7B2, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Debug scratch 0", - {} - } - ); - - csrGroup.registerDescriptorsByKey.emplace( - "dscratch1", - TargetRegisterDescriptor{ - "dscratch1", - "DSCRATCH1", - csrGroup.absoluteKey, - cpuPeripheralDescriptor.key, - csrAddressSpaceDescriptor.key, - csrMemorySegmentDescriptor.addressRange.startAddress + 0x7B3, - 4, - TargetRegisterType::OTHER, - TargetRegisterAccess{true, true}, - "Debug scratch 1", - {} - } - ); - - return cpuPeripheralDescriptor; + return gprGroup; } } diff --git a/src/Targets/RiscV/RiscV.hpp b/src/Targets/RiscV/RiscV.hpp index b6a8e3d5..4fd09a25 100644 --- a/src/Targets/RiscV/RiscV.hpp +++ b/src/Targets/RiscV/RiscV.hpp @@ -126,12 +126,11 @@ namespace Targets::RiscV const TargetAddressSpaceDescriptor& addressSpaceDescriptor ); - static TargetPeripheralDescriptor generateCpuPeripheralDescriptor( + static const TargetRegisterGroupDescriptor& generateGeneralPurposeRegisterGroupDescriptor( const IsaDescriptor& isaDescriptor, - const TargetAddressSpaceDescriptor& csrAddressSpaceDescriptor, const TargetAddressSpaceDescriptor& gprAddressSpaceDescriptor, - const TargetMemorySegmentDescriptor& csrMemorySegmentDescriptor, - const TargetMemorySegmentDescriptor& gprMemorySegmentDescriptor + const TargetMemorySegmentDescriptor& gprMemorySegmentDescriptor, + TargetPeripheralDescriptor& cpuPeripheralDescriptor ); }; } diff --git a/src/Targets/RiscV/Wch/WchRiscV.cpp b/src/Targets/RiscV/Wch/WchRiscV.cpp index 7ea06c24..6f926c32 100644 --- a/src/Targets/RiscV/Wch/WchRiscV.cpp +++ b/src/Targets/RiscV/Wch/WchRiscV.cpp @@ -135,6 +135,8 @@ namespace Targets::RiscV::Wch descriptor.breakpointResources.reservedHardwareBreakpoints = 1; } + // Replace the TDF CPU peripheral descriptor with the mutated copy (see RiscV base class) + descriptor.peripheralDescriptorsByKey.erase(this->cpuPeripheralDescriptor.key); descriptor.peripheralDescriptorsByKey.emplace( this->cpuPeripheralDescriptor.key, this->cpuPeripheralDescriptor.clone() diff --git a/src/Targets/TargetDescriptionFiles/RiscV/Wch/CH32V003.xml b/src/Targets/TargetDescriptionFiles/RiscV/Wch/CH32V003.xml index f94a36cb..dca7762a 100644 --- a/src/Targets/TargetDescriptionFiles/RiscV/Wch/CH32V003.xml +++ b/src/Targets/TargetDescriptionFiles/RiscV/Wch/CH32V003.xml @@ -196,8 +196,8 @@ - - + + @@ -1985,9 +1985,51 @@ - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -1995,6 +2037,11 @@ + + + + + diff --git a/src/Targets/TargetDescriptionFiles/RiscV/Wch/CH32X035.xml b/src/Targets/TargetDescriptionFiles/RiscV/Wch/CH32X035.xml index 79bc31f8..6da41ce9 100644 --- a/src/Targets/TargetDescriptionFiles/RiscV/Wch/CH32X035.xml +++ b/src/Targets/TargetDescriptionFiles/RiscV/Wch/CH32X035.xml @@ -420,8 +420,8 @@ - - + + @@ -3339,9 +3339,52 @@ - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -3351,6 +3394,13 @@ + + + + + + +