From 71f312f925717b4eba836732dede297d77e6226b Mon Sep 17 00:00:00 2001
From: Nav <nav@navnav.me>
Date: Tue, 6 Apr 2021 23:21:37 +0100
Subject: [PATCH] Added NVM base address extraction for XMega AVR8 targets

---
 .../VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp  |  8 ++++++--
 src/Targets/Microchip/AVR/AVR8/Avr8.cpp            | 14 ++++++++++++++
 .../Microchip/AVR/AVR8/TargetParameters.hpp        |  2 +-
 3 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp
index 428502fb..ddac9179 100644
--- a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp
@@ -163,6 +163,10 @@ void EdbgAvr8Interface::setTargetParameters(const Avr8Bit::TargetParameters& con
             throw Exception("Missing required parameter: EEPROM_PAGE_SIZE");
         }
 
+        if (!config.nvmBaseAddress.has_value()) {
+            throw Exception("Missing required parameter: NVM_BASE");
+        }
+
         Logger::debug("Setting APPL_BASE_ADDR AVR8 parameter");
         this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_APPL_BASE_ADDR, config.appSectionPdiOffset.value());
 
@@ -202,8 +206,8 @@ void EdbgAvr8Interface::setTargetParameters(const Avr8Bit::TargetParameters& con
         Logger::debug("Setting EEPROM_PAGE_SIZE AVR8 parameter");
         this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_EEPROM_PAGE_SIZE, static_cast<unsigned char>(config.eepromPageSize.value()));
 
-        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_NVM_BASE, static_cast<std::uint16_t>(0x01c0));
-//        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_SIGNATURE_OFFSET, static_cast<std::uint16_t>(0x0090));
+        Logger::debug("Setting NVM_BASE AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_NVM_BASE, config.nvmBaseAddress.value());
 
     } else {
         if (config.flashPageSize.has_value()) {
diff --git a/src/Targets/Microchip/AVR/AVR8/Avr8.cpp b/src/Targets/Microchip/AVR/AVR8/Avr8.cpp
index 99a80dd8..3a5a8314 100644
--- a/src/Targets/Microchip/AVR/AVR8/Avr8.cpp
+++ b/src/Targets/Microchip/AVR/AVR8/Avr8.cpp
@@ -357,6 +357,20 @@ TargetParameters& Avr8::getTargetParameters() {
                 this->targetParameters->lockRegistersPdiOffset = pdiInterfaceProperties
                     .at("lock_registers_offset").value.toInt(nullptr, 16);
             }
+
+            auto& peripheralModules = this->partDescription->getPeripheralModulesMappedByName();
+
+            if (peripheralModules.contains("nvm")) {
+                auto& nvmModule = peripheralModules.at("nvm");
+
+                if (nvmModule.instancesMappedByName.contains("nvm")) {
+                    auto& nvmInstance = nvmModule.instancesMappedByName.at("nvm");
+
+                    if (nvmInstance.registerGroupsMappedByName.contains("nvm")) {
+                        this->targetParameters->nvmBaseAddress = nvmInstance.registerGroupsMappedByName.at("nvm").offset;
+                    }
+                }
+            }
         }
     }
 
diff --git a/src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp b/src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp
index 9a6dcfeb..03fd7918 100644
--- a/src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp
+++ b/src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp
@@ -46,7 +46,7 @@ namespace Bloom::Targets::Microchip::Avr::Avr8Bit
         std::optional<std::uint32_t> lockRegistersPdiOffset;
         std::optional<std::uint32_t> userSignaturesPdiOffset;
         std::optional<std::uint32_t> productSignaturesPdiOffset;
-
+        std::optional<std::uint16_t> nvmBaseAddress;
 
         std::optional<std::uint32_t> ioPortAddressRangeStart;
         std::optional<std::uint32_t> ioPortAddressRangeEnd;