Massive refactor to accommodate RISC-V targets

- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here

src/Targets/RiscV/TargetDescriptionFile.hpp

@@ -0,0 +1,26 @@
+#pragma once
+
+#include "src/Targets/TargetDescription/TargetDescriptionFile.hpp"
+
+namespace Targets::RiscV
+{
+    /**
+     * Represents an RISC-V TDF.
+     *
+     * For more information of TDFs, see src/Targets/TargetDescription/README.md
+     */
+    class TargetDescriptionFile: public Targets::TargetDescription::TargetDescriptionFile
+    {
+    public:
+        explicit TargetDescriptionFile(const std::string& xmlFilePath);
+
+        /**
+         * Returns the RISC-V target ID from the TDF.
+         *
+         * @return
+         */
+        [[nodiscard]] std::string getTargetId() const;
+
+        [[nodiscard]] TargetAddressSpaceDescriptor getSystemAddressSpaceDescriptor() const;
+    };
+}