Massive refactor to accommodate RISC-V targets

- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here

src/Targets/RiscV/RiscVTargetConfig.hpp

@@ -0,0 +1,15 @@
+#pragma once
+
+#include "src/ProjectConfig.hpp"
+
+namespace Targets::RiscV
+{
+    /**
+     * Extending the generic TargetConfig struct to accommodate RISC-V target configuration parameters.
+     */
+    struct RiscVTargetConfig: public TargetConfig
+    {
+    public:
+        explicit RiscVTargetConfig(const TargetConfig& targetConfig);
+    };
+}