Massive refactor to accommodate RISC-V targets

- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here
This commit is contained in:
Nav
2024-07-23 21:14:22 +01:00
parent 2986934485
commit 6cdbfbe950
331 changed files with 8815 additions and 8565 deletions

View File

@@ -2,24 +2,10 @@
namespace Services
{
using Targets::Microchip::Avr::Avr8Bit::OpcodeDecoder::Decoder;
Decoder::InstructionMapping Avr8InstructionService::fetchInstructions(
const Targets::TargetMemoryAddressRange& addressRange,
const Targets::TargetDescriptor& targetDescriptor,
TargetControllerService& targetControllerService
) {
const auto programMemory = targetControllerService.readMemory(
targetDescriptor.programMemoryType,
addressRange.startAddress,
addressRange.endAddress - addressRange.startAddress
);
return Decoder::decode(addressRange.startAddress, programMemory);
}
using Targets::Microchip::Avr8::OpcodeDecoder::Decoder;
std::optional<Targets::TargetMemoryAddress> Avr8InstructionService::resolveProgramDestinationAddress(
const Targets::Microchip::Avr::Avr8Bit::OpcodeDecoder::Instruction& instruction,
const Targets::Microchip::Avr8::OpcodeDecoder::Instruction& instruction,
Targets::TargetMemoryAddress instructionAddress,
const Decoder::InstructionMapping& instructions
) {