Massive refactor to accommodate RISC-V targets
- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR) - Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website - Added unit size property to address spaces - Many other changes which I couldn't be bothered to describe here
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@@ -1,99 +1,57 @@
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#pragma once
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#include <cstdint>
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#include <set>
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#include <vector>
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#include <optional>
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#include "src/Targets/RiscV/RiscVGeneric.hpp"
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#include "src/Targets/RiscV/DebugModule/DebugModule.hpp"
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#include "src/Targets/RiscV/DebugModule/Registers/RegisterAddresses.hpp"
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#include "src/Targets/RiscV/TargetParameters.hpp"
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#include "src/Targets/TargetDescriptor.hpp"
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#include "src/Targets/TargetAddressSpaceDescriptor.hpp"
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#include "src/Targets/TargetMemorySegmentDescriptor.hpp"
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#include "src/Targets/TargetState.hpp"
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#include "src/Targets/TargetRegisterDescriptor.hpp"
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#include "src/Targets/TargetMemory.hpp"
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namespace DebugToolDrivers::TargetInterfaces::RiscV
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{
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class RiscVDebugInterface
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{
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public:
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RiscVDebugInterface() = default;
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virtual ~RiscVDebugInterface() = default;
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RiscVDebugInterface(const RiscVDebugInterface& other) = default;
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RiscVDebugInterface(RiscVDebugInterface&& other) = default;
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RiscVDebugInterface& operator = (const RiscVDebugInterface& other) = default;
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RiscVDebugInterface& operator = (RiscVDebugInterface&& other) = default;
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/**
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* Should prepare for and then activate the physical interface between the debug tool and the RISC-V target.
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*
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* Should throw an exception if activation fails. The error will be considered fatal, and result in a shutdown.
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*
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* Unless otherwise stated, it can be assumed that this function will be called (and must succeed)
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* before any of the other functions below this point are called. In other words, we can assume that the
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* interface has been activated in the implementations of any of the functions below this point.
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*
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* @param targetParameters
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* Parameters for the RISC-V target. These can be ignored if a particular implementation does not require
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* any target parameters for activation.
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*/
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virtual void activate(const Targets::RiscV::TargetParameters& targetParameters) = 0;
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/**
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* Should deactivate the physical interface between the debug tool and the RISC-V target.
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*
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* CAUTION: This function **CAN** be called before activate(), or in instances where activate() failed (threw
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* an exception). Implementations must accommodate this.
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*/
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virtual void init() = 0;
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virtual void activate() = 0;
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virtual void deactivate() = 0;
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/**
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* Should retrieve the RISC-V target ID in string form.
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*
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* @return
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* The target ID, in the form of a string.
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*/
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virtual std::string getDeviceId() = 0;
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virtual Targets::TargetExecutionState getExecutionState() = 0;
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/**
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* Should read the value of a debug module register.
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*
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* @param address
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* The address of the debug module register to read.
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*
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* @return
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* The register value.
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*/
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virtual Targets::RiscV::DebugModule::RegisterValue readDebugModuleRegister(
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Targets::RiscV::DebugModule::RegisterAddress address
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virtual void stop() = 0;
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virtual void run() = 0;
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virtual void step() = 0;
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virtual void reset() = 0;
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virtual void setSoftwareBreakpoint(Targets::TargetMemoryAddress address) = 0;
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virtual void clearSoftwareBreakpoint(Targets::TargetMemoryAddress address) = 0;
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virtual void setHardwareBreakpoint(Targets::TargetMemoryAddress address) = 0;
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virtual void clearHardwareBreakpoint(Targets::TargetMemoryAddress address) = 0;
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virtual void clearAllBreakpoints() = 0;
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virtual Targets::TargetRegisterDescriptorAndValuePairs readCpuRegisters(
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const Targets::TargetRegisterDescriptors& descriptors
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) = 0;
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virtual void writeCpuRegisters(const Targets::TargetRegisterDescriptorAndValuePairs& registers) = 0;
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Targets::RiscV::DebugModule::RegisterValue readDebugModuleRegister(
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Targets::RiscV::DebugModule::Registers::RegisterAddress address
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) {
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return this->readDebugModuleRegister(static_cast<Targets::RiscV::DebugModule::RegisterAddress>(address));
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};
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/**
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* Should write a value to a debug module register.
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*
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* @param address
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* The address of the debug module to update.
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*
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* @param value
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* The value to write.
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*/
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virtual void writeDebugModuleRegister(
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Targets::RiscV::DebugModule::RegisterAddress address,
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Targets::RiscV::DebugModule::RegisterValue value
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virtual Targets::TargetMemoryBuffer readMemory(
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const Targets::TargetAddressSpaceDescriptor& addressSpaceDescriptor,
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const Targets::TargetMemorySegmentDescriptor& memorySegmentDescriptor,
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Targets::TargetMemoryAddress startAddress,
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Targets::TargetMemorySize bytes,
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const std::set<Targets::TargetMemoryAddressRange>& excludedAddressRanges = {}
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) = 0;
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virtual void writeMemory(
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const Targets::TargetAddressSpaceDescriptor& addressSpaceDescriptor,
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const Targets::TargetMemorySegmentDescriptor& memorySegmentDescriptor,
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Targets::TargetMemoryAddress startAddress,
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const Targets::TargetMemoryBuffer& buffer
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) = 0;
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void writeDebugModuleRegister(
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Targets::RiscV::DebugModule::Registers::RegisterAddress address,
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Targets::RiscV::DebugModule::RegisterValue value
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) {
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return this->writeDebugModuleRegister(
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static_cast<Targets::RiscV::DebugModule::RegisterAddress>(address),
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value
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);
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};
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};
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}
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@@ -0,0 +1,18 @@
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#pragma once
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#include <string>
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namespace DebugToolDrivers::TargetInterfaces::RiscV
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{
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class RiscVIdentificationInterface
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{
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public:
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/**
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* Should retrieve the RISC-V target ID in string form.
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*
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* @return
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* The target ID, in the form of a string.
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*/
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virtual std::string getDeviceId() = 0;
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};
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}
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