Massive refactor to accommodate RISC-V targets
- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR) - Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website - Added unit size property to address spaces - Many other changes which I couldn't be bothered to describe here
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#include "DebugTranslator.hpp"
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#include <string>
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#include <thread>
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#include <chrono>
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#include <limits>
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#include <cassert>
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#include "Registers/CpuRegisterNumbers.hpp"
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#include "DebugModule/Registers/RegisterAddresses.hpp"
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#include "DebugModule/Registers/RegisterAccessControlField.hpp"
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#include "DebugModule/Registers/MemoryAccessControlField.hpp"
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#include "src/Exceptions/Exception.hpp"
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#include "src/Exceptions/InvalidConfig.hpp"
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#include "src/TargetController/Exceptions/DeviceInitializationFailure.hpp"
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#include "src/TargetController/Exceptions/TargetOperationFailure.hpp"
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#include "src/Logger/Logger.hpp"
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namespace DebugToolDrivers::Protocols::RiscVDebugSpec
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{
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using Registers::DebugControlStatusRegister;
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using DebugModule::Registers::RegisterAddress;
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using DebugModule::Registers::ControlRegister;
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using DebugModule::Registers::StatusRegister;
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using DebugModule::Registers::AbstractControlStatusRegister;
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using DebugModule::Registers::AbstractCommandRegister;
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using Registers::CpuRegisterNumber;
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using namespace ::Targets::RiscV;
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using ::Targets::TargetExecutionState;
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using ::Targets::TargetMemoryAddress;
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using ::Targets::TargetMemoryAddressRange;
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using ::Targets::TargetMemorySize;
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using ::Targets::TargetMemoryBuffer;
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using ::Targets::TargetStackPointer;
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using ::Targets::TargetAddressSpaceDescriptor;
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using ::Targets::TargetMemorySegmentDescriptor;
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using ::Targets::TargetRegisterDescriptors;
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using ::Targets::TargetRegisterDescriptorAndValuePairs;
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DebugTranslator::DebugTranslator(
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DebugTransportModuleInterface& dtmInterface,
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const TargetDescriptionFile& targetDescriptionFile,
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const RiscVTargetConfig& targetConfig
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)
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: dtmInterface(dtmInterface)
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, targetDescriptionFile(targetDescriptionFile)
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, targetConfig(targetConfig)
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{}
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void DebugTranslator::init() {
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// No pre-activation initialisation required.
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return;
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}
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void DebugTranslator::activate() {
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this->dtmInterface.activate();
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this->hartIndices = this->discoverHartIndices();
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if (this->hartIndices.empty()) {
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throw Exceptions::TargetOperationFailure{"Failed to discover any RISC-V harts"};
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}
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Logger::debug("Discovered RISC-V harts: " + std::to_string(this->hartIndices.size()));
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/*
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* We only support debugging a single RISC-V hart, for now.
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*
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* If we discover more than one, we select the first one and ensure that this is explicitly communicated to the
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* user.
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*/
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if (this->hartIndices.size() > 1) {
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Logger::warning("Bloom only supports debugging a single RISC-V hart - selecting first available");
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}
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this->selectedHartIndex = this->hartIndices.front();
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Logger::info("Selected RISC-V hart index: " + std::to_string(this->selectedHartIndex));
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/*
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* Disabling the debug module before enabling it will clear any state from a previous debug session that
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* wasn't terminated properly.
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*/
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this->disableDebugModule();
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this->enableDebugModule();
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this->stop();
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this->reset();
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auto debugControlStatusRegister = this->readDebugControlStatusRegister();
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debugControlStatusRegister.breakUMode = true;
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debugControlStatusRegister.breakSMode = true;
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debugControlStatusRegister.breakMMode = true;
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this->writeDebugControlStatusRegister(debugControlStatusRegister);
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}
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void DebugTranslator::deactivate() {
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this->disableDebugModule();
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this->dtmInterface.deactivate();
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}
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TargetExecutionState DebugTranslator::getExecutionState() {
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return this->readDebugModuleStatusRegister().anyRunning
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? TargetExecutionState::RUNNING
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: TargetExecutionState::STOPPED;
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}
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void DebugTranslator::stop() {
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auto controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = true;
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controlRegister.selectedHartIndex = this->selectedHartIndex;
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controlRegister.haltRequest = true;
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this->writeDebugModuleControlRegister(controlRegister);
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constexpr auto maxAttempts = 10;
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auto statusRegister = this->readDebugModuleStatusRegister();
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for (auto attempts = 1; !statusRegister.allHalted && attempts <= maxAttempts; ++attempts) {
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std::this_thread::sleep_for(std::chrono::microseconds{10});
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statusRegister = this->readDebugModuleStatusRegister();
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}
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controlRegister.haltRequest = false;
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this->writeDebugModuleControlRegister(controlRegister);
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if (!statusRegister.allHalted) {
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throw Exceptions::Exception{"Target took too long to halt selected harts"};
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}
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}
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void DebugTranslator::run() {
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auto controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = true;
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controlRegister.selectedHartIndex = this->selectedHartIndex;
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controlRegister.resumeRequest = true;
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this->writeDebugModuleControlRegister(controlRegister);
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constexpr auto maxAttempts = 10;
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auto statusRegister = this->readDebugModuleStatusRegister();
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for (auto attempts = 1; !statusRegister.allResumeAcknowledge && attempts <= maxAttempts; ++attempts) {
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std::this_thread::sleep_for(std::chrono::microseconds{10});
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statusRegister = this->readDebugModuleStatusRegister();
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}
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controlRegister.resumeRequest = false;
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this->writeDebugModuleControlRegister(controlRegister);
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if (!statusRegister.allResumeAcknowledge) {
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throw Exceptions::Exception{"Target took too long to acknowledge resume request"};
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}
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}
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void DebugTranslator::step() {
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auto debugControlStatusRegister = this->readDebugControlStatusRegister();
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debugControlStatusRegister.step = true;
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this->writeDebugControlStatusRegister(debugControlStatusRegister);
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auto controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = true;
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controlRegister.selectedHartIndex = this->selectedHartIndex;
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controlRegister.resumeRequest = true;
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this->writeDebugModuleControlRegister(controlRegister);
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controlRegister.resumeRequest = false;
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this->writeDebugModuleControlRegister(controlRegister);
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debugControlStatusRegister.step = false;
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this->writeDebugControlStatusRegister(debugControlStatusRegister);
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}
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void DebugTranslator::reset() {
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auto controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = true;
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controlRegister.selectedHartIndex = this->selectedHartIndex;
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controlRegister.setResetHaltRequest = true;
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controlRegister.haltRequest = true;
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controlRegister.ndmReset = true;
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this->writeDebugModuleControlRegister(controlRegister);
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controlRegister.ndmReset = false;
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this->writeDebugModuleControlRegister(controlRegister);
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constexpr auto maxAttempts = 10;
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auto statusRegister = this->readDebugModuleStatusRegister();
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for (auto attempts = 1; !statusRegister.allHaveReset && attempts <= maxAttempts; ++attempts) {
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std::this_thread::sleep_for(std::chrono::microseconds{10});
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statusRegister = this->readDebugModuleStatusRegister();
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}
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controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = true;
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controlRegister.selectedHartIndex = this->selectedHartIndex;
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controlRegister.clearResetHaltRequest = true;
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controlRegister.acknowledgeHaveReset = true;
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this->writeDebugModuleControlRegister(controlRegister);
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if (!statusRegister.allHaveReset) {
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throw Exceptions::Exception{"Target took too long to reset"};
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}
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}
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void DebugTranslator::setSoftwareBreakpoint(TargetMemoryAddress address) {
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}
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void DebugTranslator::clearSoftwareBreakpoint(TargetMemoryAddress address) {
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}
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void DebugTranslator::setHardwareBreakpoint(TargetMemoryAddress address) {
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}
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void DebugTranslator::clearHardwareBreakpoint(TargetMemoryAddress address) {
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}
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void DebugTranslator::clearAllBreakpoints() {
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}
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TargetRegisterDescriptorAndValuePairs DebugTranslator::readCpuRegisters(
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const TargetRegisterDescriptors& descriptors
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) {
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auto output = TargetRegisterDescriptorAndValuePairs{};
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for (const auto& descriptor : descriptors) {
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const auto registerValue = this->readCpuRegister(static_cast<RegisterNumber>(descriptor->startAddress));
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output.emplace_back(
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*descriptor,
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TargetMemoryBuffer{
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static_cast<unsigned char>(registerValue >> 24),
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static_cast<unsigned char>(registerValue >> 16),
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static_cast<unsigned char>(registerValue >> 8),
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static_cast<unsigned char>(registerValue),
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}
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);
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}
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return output;
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}
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void DebugTranslator::writeCpuRegisters(const TargetRegisterDescriptorAndValuePairs& registers) {
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for (const auto& [descriptor, value] : registers) {
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assert((value.size() * 8) > std::numeric_limits<RegisterValue>::digits);
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auto registerValue = RegisterValue{0};
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for (const auto& registerByte : value) {
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registerValue = (registerValue << 8) | registerByte;
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}
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this->writeCpuRegister(static_cast<RegisterNumber>(descriptor.startAddress), registerValue);
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}
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}
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TargetMemoryBuffer DebugTranslator::readMemory(
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const TargetAddressSpaceDescriptor& addressSpaceDescriptor,
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const TargetMemorySegmentDescriptor& memorySegmentDescriptor,
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TargetMemoryAddress startAddress,
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TargetMemorySize bytes,
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const std::set<TargetMemoryAddressRange>& excludedAddressRanges
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) {
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using DebugModule::Registers::MemoryAccessControlField;
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// TODO: excluded addresses
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const auto pageSize = 4;
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if ((startAddress % pageSize) != 0 || (bytes % pageSize) != 0) {
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// Alignment required
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const auto alignedStartAddress = this->alignMemoryAddress(startAddress, pageSize);
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const auto alignedBytes = this->alignMemorySize(bytes + (startAddress - alignedStartAddress), pageSize);
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const auto memoryBuffer = this->readMemory(
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addressSpaceDescriptor,
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memorySegmentDescriptor,
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alignedStartAddress,
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alignedBytes,
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excludedAddressRanges
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);
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const auto offset = memoryBuffer.begin() + (startAddress - alignedStartAddress);
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return TargetMemoryBuffer{offset, offset + bytes};
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}
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auto output = TargetMemoryBuffer{};
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output.reserve(bytes);
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/*
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* We only need to set the address once. No need to update it as we use the post-increment function to
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* increment the address. See MemoryAccessControlField::postIncrement
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*/
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this->dtmInterface.writeDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_1, startAddress);
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constexpr auto command = AbstractCommandRegister{
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MemoryAccessControlField{
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false,
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true,
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MemoryAccessControlField::MemorySize::SIZE_32,
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false
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}.value(),
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AbstractCommandRegister::CommandType::MEMORY_ACCESS
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};
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for (auto address = startAddress; address <= (startAddress + bytes - 1); address += 4) {
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this->executeAbstractCommand(command);
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const auto data = this->dtmInterface.readDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_0);
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output.emplace_back(static_cast<unsigned char>(data));
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output.emplace_back(static_cast<unsigned char>(data >> 8));
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output.emplace_back(static_cast<unsigned char>(data >> 16));
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output.emplace_back(static_cast<unsigned char>(data >> 24));
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}
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return output;
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}
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void DebugTranslator::writeMemory(
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const TargetAddressSpaceDescriptor& addressSpaceDescriptor,
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const TargetMemorySegmentDescriptor& memorySegmentDescriptor,
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TargetMemoryAddress startAddress,
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const TargetMemoryBuffer& buffer
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) {
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using DebugModule::Registers::MemoryAccessControlField;
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constexpr auto alignTo = TargetMemorySize{4};
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const auto bytes = static_cast<TargetMemorySize>(buffer.size());
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if ((startAddress % alignTo) != 0 || (bytes % alignTo) != 0) {
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/*
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* Alignment required
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*
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* To align the write operation, we read the front and back offset bytes and use them to construct an
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* aligned buffer.
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*/
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const auto alignedStartAddress = this->alignMemoryAddress(startAddress, alignTo);
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const auto alignedBytes = this->alignMemorySize(bytes + (startAddress - alignedStartAddress), alignTo);
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assert(alignedBytes > bytes);
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auto alignedBuffer = (alignedStartAddress < startAddress)
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? this->readMemory(
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addressSpaceDescriptor,
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memorySegmentDescriptor,
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alignedStartAddress,
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(startAddress - alignedStartAddress)
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)
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: TargetMemoryBuffer{};
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alignedBuffer.reserve(alignedBytes);
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// Read the offset bytes required to align the buffer size
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const auto dataBack = this->readMemory(
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addressSpaceDescriptor,
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memorySegmentDescriptor,
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startAddress + bytes,
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alignedBytes - bytes - (startAddress - alignedStartAddress)
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);
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alignedBuffer.insert(alignedBuffer.end(), dataBack.begin(), dataBack.end());
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return this->writeMemory(
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addressSpaceDescriptor,
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memorySegmentDescriptor,
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alignedStartAddress,
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alignedBuffer
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);
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}
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this->dtmInterface.writeDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_1, startAddress);
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constexpr auto command = AbstractCommandRegister{
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MemoryAccessControlField{
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true,
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true,
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MemoryAccessControlField::MemorySize::SIZE_32,
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false
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}.value(),
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AbstractCommandRegister::CommandType::MEMORY_ACCESS
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};
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for (TargetMemoryAddress offset = 0; offset < buffer.size(); offset += 4) {
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this->dtmInterface.writeDebugModuleRegister(
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RegisterAddress::ABSTRACT_DATA_0,
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static_cast<RegisterValue>(
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(buffer[offset + 3] << 24)
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| (buffer[offset + 2] << 16)
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| (buffer[offset + 1] << 8)
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| (buffer[offset])
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)
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);
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this->executeAbstractCommand(command);
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}
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}
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std::vector<DebugModule::HartIndex> DebugTranslator::discoverHartIndices() {
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auto hartIndices = std::vector<DebugModule::HartIndex>{};
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/*
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* We can obtain the maximum hart index by setting all of the hartsel bits in the control register and then
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* read the value back.
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*/
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auto controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = true;
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controlRegister.selectedHartIndex = 0xFFFFF;
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this->writeDebugModuleControlRegister(controlRegister);
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const auto maxHartIndex = this->readDebugModuleControlRegister().selectedHartIndex;
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for (auto hartIndex = DebugModule::HartIndex{0}; hartIndex <= maxHartIndex; ++hartIndex) {
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/*
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* We can't just assume that everything between 0 and the maximum hart index are valid hart indices. We
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* have to test each index until we find one that is non-existent.
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*/
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auto controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = true;
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controlRegister.selectedHartIndex = hartIndex;
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this->writeDebugModuleControlRegister(controlRegister);
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/*
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* It's worth noting that some RISC-V targets **do not** set the non-existent flags. I'm not sure why.
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* Maybe hartsel has been hardwired to 0 on targets that only support a single hart, preventing the
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* selection of non-existent harts.
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*
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* Relying on the maximum hart index seems to be all we can do in this case.
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*/
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if (this->readDebugModuleStatusRegister().anyNonExistent) {
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break;
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}
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hartIndices.emplace_back(hartIndex);
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}
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return hartIndices;
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}
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ControlRegister DebugTranslator::readDebugModuleControlRegister() {
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return ControlRegister{this->dtmInterface.readDebugModuleRegister(RegisterAddress::CONTROL_REGISTER)};
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}
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StatusRegister DebugTranslator::readDebugModuleStatusRegister() {
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return StatusRegister{this->dtmInterface.readDebugModuleRegister(RegisterAddress::STATUS_REGISTER)};
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}
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AbstractControlStatusRegister DebugTranslator::readDebugModuleAbstractControlStatusRegister() {
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return AbstractControlStatusRegister{
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this->dtmInterface.readDebugModuleRegister(RegisterAddress::ABSTRACT_CONTROL_STATUS_REGISTER)
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};
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}
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DebugControlStatusRegister DebugTranslator::readDebugControlStatusRegister() {
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return DebugControlStatusRegister{
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this->readCpuRegister(static_cast<RegisterNumber>(CpuRegisterNumber::DEBUG_CONTROL_STATUS_REGISTER))
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};
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}
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void DebugTranslator::enableDebugModule() {
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auto controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = true;
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controlRegister.selectedHartIndex = this->selectedHartIndex;
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this->writeDebugModuleControlRegister(controlRegister);
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constexpr auto maxAttempts = 10;
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controlRegister = this->readDebugModuleControlRegister();
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for (auto attempts = 1; !controlRegister.debugModuleActive && attempts <= maxAttempts; ++attempts) {
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std::this_thread::sleep_for(std::chrono::microseconds{10});
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controlRegister = this->readDebugModuleControlRegister();
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}
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if (!controlRegister.debugModuleActive) {
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throw Exceptions::Exception{"Took too long to enable debug module"};
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}
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}
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void DebugTranslator::disableDebugModule() {
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auto controlRegister = ControlRegister{};
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controlRegister.debugModuleActive = false;
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controlRegister.selectedHartIndex = this->selectedHartIndex;
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this->writeDebugModuleControlRegister(controlRegister);
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constexpr auto maxAttempts = 10;
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controlRegister = this->readDebugModuleControlRegister();
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for (auto attempts = 1; controlRegister.debugModuleActive && attempts <= maxAttempts; ++attempts) {
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std::this_thread::sleep_for(std::chrono::microseconds{10});
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controlRegister = this->readDebugModuleControlRegister();
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}
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if (controlRegister.debugModuleActive) {
|
||||
throw Exceptions::Exception{"Took too long to disable debug module"};
|
||||
}
|
||||
}
|
||||
|
||||
RegisterValue DebugTranslator::readCpuRegister(RegisterNumber number) {
|
||||
using DebugModule::Registers::RegisterAccessControlField;
|
||||
|
||||
this->executeAbstractCommand(AbstractCommandRegister{
|
||||
RegisterAccessControlField{
|
||||
number,
|
||||
false,
|
||||
true,
|
||||
false,
|
||||
false,
|
||||
RegisterAccessControlField::RegisterSize::SIZE_32
|
||||
}.value(),
|
||||
AbstractCommandRegister::CommandType::REGISTER_ACCESS
|
||||
});
|
||||
|
||||
return this->dtmInterface.readDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_0);
|
||||
}
|
||||
|
||||
void DebugTranslator::writeCpuRegister(RegisterNumber number, RegisterValue value) {
|
||||
using DebugModule::Registers::RegisterAccessControlField;
|
||||
|
||||
this->dtmInterface.writeDebugModuleRegister(RegisterAddress::ABSTRACT_DATA_0, value);
|
||||
this->executeAbstractCommand(AbstractCommandRegister{
|
||||
RegisterAccessControlField{
|
||||
number,
|
||||
true,
|
||||
true,
|
||||
false,
|
||||
false,
|
||||
RegisterAccessControlField::RegisterSize::SIZE_32
|
||||
}.value(),
|
||||
AbstractCommandRegister::CommandType::REGISTER_ACCESS
|
||||
});
|
||||
}
|
||||
|
||||
void DebugTranslator::writeDebugModuleControlRegister(const ControlRegister& controlRegister) {
|
||||
this->dtmInterface.writeDebugModuleRegister(RegisterAddress::CONTROL_REGISTER, controlRegister.value());
|
||||
}
|
||||
|
||||
void DebugTranslator::writeDebugControlStatusRegister(const DebugControlStatusRegister& controlRegister) {
|
||||
this->writeCpuRegister(
|
||||
static_cast<RegisterNumber>(CpuRegisterNumber::DEBUG_CONTROL_STATUS_REGISTER),
|
||||
controlRegister.value()
|
||||
);
|
||||
}
|
||||
|
||||
void DebugTranslator::executeAbstractCommand(
|
||||
const DebugModule::Registers::AbstractCommandRegister& abstractCommandRegister
|
||||
) {
|
||||
this->dtmInterface.writeDebugModuleRegister(
|
||||
RegisterAddress::ABSTRACT_COMMAND_REGISTER,
|
||||
abstractCommandRegister.value()
|
||||
);
|
||||
|
||||
auto abstractStatusRegister = this->readDebugModuleAbstractControlStatusRegister();
|
||||
if (abstractStatusRegister.commandError != AbstractControlStatusRegister::CommandError::NONE) {
|
||||
throw Exceptions::Exception{
|
||||
"Failed to execute abstract command - error: "
|
||||
+ Services::StringService::toHex(abstractStatusRegister.commandError)
|
||||
};
|
||||
}
|
||||
|
||||
constexpr auto maxAttempts = 10;
|
||||
for (auto attempts = 1; abstractStatusRegister.busy && attempts <= maxAttempts; ++attempts) {
|
||||
std::this_thread::sleep_for(std::chrono::microseconds{10});
|
||||
abstractStatusRegister = this->readDebugModuleAbstractControlStatusRegister();
|
||||
}
|
||||
|
||||
if (abstractStatusRegister.busy) {
|
||||
throw Exceptions::Exception{"Abstract command took too long to execute"};
|
||||
}
|
||||
}
|
||||
|
||||
TargetMemoryAddress DebugTranslator::alignMemoryAddress(TargetMemoryAddress address, TargetMemoryAddress alignTo) {
|
||||
return static_cast<TargetMemoryAddress>(
|
||||
std::floor(static_cast<float>(address) / static_cast<float>(alignTo))
|
||||
) * alignTo;
|
||||
}
|
||||
|
||||
TargetMemorySize DebugTranslator::alignMemorySize(TargetMemorySize size, TargetMemorySize alignTo) {
|
||||
return static_cast<TargetMemorySize>(
|
||||
std::ceil(static_cast<float>(size) / static_cast<float>(alignTo))
|
||||
) * alignTo;
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user