Massive refactor to accommodate RISC-V targets

- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here

src/DebugServer/Gdb/AvrGdb/CommandPackets/VContStepExecution.cpp

@@ -14,16 +14,21 @@ namespace DebugServer::Gdb::AvrGdb::CommandPackets
         : CommandPacket(rawPacket)
     {}
 
-    void VContStepExecution::handle(Gdb::DebugSession& debugSession, TargetControllerService& targetControllerService) {
+    void VContStepExecution::handle(
+        Gdb::DebugSession& debugSession,
+        const Gdb::TargetDescriptor& gdbTargetDescriptor,
+        const Targets::TargetDescriptor& targetDescriptor,
+        TargetControllerService& targetControllerService
+    ) {
         Logger::info("Handling VContStepExecution packet");
 
         try {
-            targetControllerService.stepTargetExecution(std::nullopt);
+            targetControllerService.stepTargetExecution();
             debugSession.waitingForBreak = true;
 
         } catch (const Exception& exception) {
             Logger::error("Failed to step execution on target - " + exception.getMessage());
-            debugSession.connection.writePacket(ErrorResponsePacket());
+            debugSession.connection.writePacket(ErrorResponsePacket{});
         }
     }
 }