Massive refactor to accommodate RISC-V targets
- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR) - Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website - Added unit size property to address spaces - Many other changes which I couldn't be bothered to describe here
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@@ -93,10 +93,7 @@ class MemorySegment
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&& $endAddress !== null
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&& $other->startAddress !== null
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&& $otherEndAddress !== null
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&& (
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($other->startAddress <= $this->startAddress && $otherEndAddress >= $this->startAddress)
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|| ($other->startAddress >= $this->startAddress && $other->startAddress <= $endAddress)
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)
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&& $this->startAddress <= $otherEndAddress && $other->startAddress <= $endAddress
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;
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}
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