Massive refactor to accommodate RISC-V targets

- Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR)
- Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website
- Added unit size property to address spaces
- Many other changes which I couldn't be bothered to describe here
This commit is contained in:
Nav
2024-07-23 21:14:22 +01:00
parent 2986934485
commit 6cdbfbe950
331 changed files with 8815 additions and 8565 deletions

View File

@@ -93,10 +93,7 @@ class MemorySegment
&& $endAddress !== null
&& $other->startAddress !== null
&& $otherEndAddress !== null
&& (
($other->startAddress <= $this->startAddress && $otherEndAddress >= $this->startAddress)
|| ($other->startAddress >= $this->startAddress && $other->startAddress <= $endAddress)
)
&& $this->startAddress <= $otherEndAddress && $other->startAddress <= $endAddress
;
}