From 6a7e69f56758bb58b4567ac148340b44e1be7cb2 Mon Sep 17 00:00:00 2001
From: Nav <nav@navnav.me>
Date: Sat, 19 Jun 2021 23:55:40 +0100
Subject: [PATCH] More TDF corrections

---
 .../AVR8/MEGA/AT90PWM216.xml                  |  55 ++++-
 .../AVR8/MEGA/AT90PWM316.xml                  | 108 +++++++++-
 .../AVR8/MEGA/ATMEGA1284RFR2.xml              | 116 ++++++++++-
 .../AVR8/MEGA/ATMEGA128RFR2.xml               | 136 +++++++++++-
 .../AVR8/MEGA/ATMEGA1608.xml                  |   4 +-
 .../AVR8/MEGA/ATMEGA2564RFR2.xml              | 116 ++++++++++-
 .../AVR8/MEGA/ATMEGA256RFR2.xml               | 136 +++++++++++-
 .../AVR8/MEGA/ATMEGA3208.xml                  |   4 +-
 .../AVR8/MEGA/ATMEGA3290.xml                  | 193 +++++++++++++++++-
 .../AVR8/MEGA/ATMEGA4808.xml                  |   4 +-
 .../AVR8/MEGA/ATMEGA644RFR2.xml               | 116 ++++++++++-
 .../AVR8/MEGA/ATMEGA6490.xml                  | 193 +++++++++++++++++-
 .../AVR8/MEGA/ATMEGA64RFR2.xml                | 136 +++++++++++-
 .../AVR8/MEGA/ATMEGA808.xml                   |   4 +-
 14 files changed, 1249 insertions(+), 72 deletions(-)

diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM216.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM216.xml
index 71f8cadc..54b9114c 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM216.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM216.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90PWM216-16SU" package="SOIC24" pinout="SOIC24" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="AT90PWM216" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -45,14 +45,39 @@
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                    </signals>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
@@ -1210,4 +1235,32 @@
             </register-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="SOIC24">
+            <pin pad="PD0" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PD1" position="3"/>
+            <pin pad="PD2" position="4"/>
+            <pin pad="PD3" position="5"/>
+            <pin pad="VCC" position="6"/>
+            <pin pad="GND" position="7"/>
+            <pin pad="PB0" position="8"/>
+            <pin pad="PB1" position="9"/>
+            <pin pad="PE1" position="10"/>
+            <pin pad="PE2" position="11"/>
+            <pin pad="PD4" position="12"/>
+            <pin pad="PD5" position="13"/>
+            <pin pad="PD6" position="14"/>
+            <pin pad="PD7" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="AVCC" position="17"/>
+            <pin pad="AGND" position="18"/>
+            <pin pad="AREF" position="19"/>
+            <pin pad="PB3" position="20"/>
+            <pin pad="PB4" position="21"/>
+            <pin pad="PB5" position="22"/>
+            <pin pad="PB6" position="23"/>
+            <pin pad="PB7" position="24"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM316.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM316.xml
index 938aecc1..f8f19e79 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM316.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM316.xml
@@ -1,7 +1,8 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90PWM316-16SU" package="SOIC32" pinout="SOIC32" tempmax="85" tempmin="-40"/>
+        <variant ordercode="AT90PWM316-16MU" package="VQFN32" pinout="QFN32" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="AT90PWM316" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -45,18 +46,53 @@
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                    </signals>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
@@ -1303,4 +1339,74 @@
             </register-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="SOIC32">
+            <pin pad="PD0" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="PE0" position="3"/>
+            <pin pad="PD1" position="4"/>
+            <pin pad="PD2" position="5"/>
+            <pin pad="PD3" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="VCC" position="8"/>
+            <pin pad="GND" position="9"/>
+            <pin pad="PC2" position="10"/>
+            <pin pad="PC3" position="11"/>
+            <pin pad="PB0" position="12"/>
+            <pin pad="PB1" position="13"/>
+            <pin pad="PE1" position="14"/>
+            <pin pad="PE2" position="15"/>
+            <pin pad="PD4" position="16"/>
+            <pin pad="PD5" position="17"/>
+            <pin pad="PD6" position="18"/>
+            <pin pad="PD7" position="19"/>
+            <pin pad="PB2" position="20"/>
+            <pin pad="PC4" position="21"/>
+            <pin pad="PC5" position="22"/>
+            <pin pad="AVCC" position="23"/>
+            <pin pad="AGND" position="24"/>
+            <pin pad="AREF" position="25"/>
+            <pin pad="PC6" position="26"/>
+            <pin pad="PB3" position="27"/>
+            <pin pad="PB4" position="28"/>
+            <pin pad="PC7" position="29"/>
+            <pin pad="PB5" position="30"/>
+            <pin pad="PB6" position="31"/>
+            <pin pad="PB7" position="32"/>
+        </pinout>
+        <pinout name="QFN32">
+            <pin pad="PD2" position="1"/>
+            <pin pad="PD3" position="2"/>
+            <pin pad="PC1" position="3"/>
+            <pin pad="VCC" position="4"/>
+            <pin pad="GND" position="5"/>
+            <pin pad="PC2" position="6"/>
+            <pin pad="PC3" position="7"/>
+            <pin pad="PB0" position="8"/>
+            <pin pad="PB1" position="9"/>
+            <pin pad="PE1" position="10"/>
+            <pin pad="PE2" position="11"/>
+            <pin pad="PD4" position="12"/>
+            <pin pad="PD5" position="13"/>
+            <pin pad="PD6" position="14"/>
+            <pin pad="PD7" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="PC4" position="17"/>
+            <pin pad="PC5" position="18"/>
+            <pin pad="AVCC" position="19"/>
+            <pin pad="AGND" position="20"/>
+            <pin pad="AREF" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PB3" position="23"/>
+            <pin pad="PB4" position="24"/>
+            <pin pad="PC7" position="25"/>
+            <pin pad="PB5" position="26"/>
+            <pin pad="PB6" position="27"/>
+            <pin pad="PB7" position="28"/>
+            <pin pad="PD0" position="29"/>
+            <pin pad="PC0" position="30"/>
+            <pin pad="PE0" position="31"/>
+            <pin pad="PD1" position="32"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
index d239e554..e9aa0b95 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
@@ -1,14 +1,14 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega1284RFR2-ZU" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega1284RFR2-ZUR" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega1284RFR2-ZF" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega1284RFR2-ZFR" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega1284RFR2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -90,33 +90,77 @@
                 </instance>
             </module>
             <module name="PORT">
-                <instance name="PORTA" caption="I/O Port">
+                <instance name="MISSING_PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
-                <instance name="PORTC" caption="I/O Port">
+                <instance name="MISSING_PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3/4"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4/4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -2792,4 +2836,56 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFN48">
+            <pin pad="PF3/4" position="1"/>
+            <pin pad="PF5" position="2"/>
+            <pin pad="PF6" position="3"/>
+            <pin pad="PF7" position="4"/>
+            <pin pad="AVSS_RFP" position="5"/>
+            <pin pad="RFP" position="6"/>
+            <pin pad="RFN" position="7"/>
+            <pin pad="AVSS_RFN" position="8"/>
+            <pin pad="TST" position="9"/>
+            <pin pad="RSTN" position="10"/>
+            <pin pad="PG1" position="11"/>
+            <pin pad="PG3" position="12"/>
+            <pin pad="PG4" position="13"/>
+            <pin pad="DVSS" position="14"/>
+            <pin pad="DVDD" position="15"/>
+            <pin pad="DEVDD" position="16"/>
+            <pin pad="PD0" position="17"/>
+            <pin pad="PD1" position="18"/>
+            <pin pad="PD2" position="19"/>
+            <pin pad="PD3" position="20"/>
+            <pin pad="PD4" position="21"/>
+            <pin pad="PD5" position="22"/>
+            <pin pad="PD6" position="23"/>
+            <pin pad="PD7" position="24"/>
+            <pin pad="CLKI" position="25"/>
+            <pin pad="PB0" position="26"/>
+            <pin pad="PB1" position="27"/>
+            <pin pad="PB2" position="28"/>
+            <pin pad="PB3" position="29"/>
+            <pin pad="PB4" position="30"/>
+            <pin pad="PB5" position="31"/>
+            <pin pad="PB6" position="32"/>
+            <pin pad="PB7" position="33"/>
+            <pin pad="PE0" position="34"/>
+            <pin pad="PE1" position="35"/>
+            <pin pad="PE2" position="36"/>
+            <pin pad="PE3" position="37"/>
+            <pin pad="PE4" position="38"/>
+            <pin pad="PE5" position="39"/>
+            <pin pad="PE7" position="40"/>
+            <pin pad="XTAL2" position="41"/>
+            <pin pad="XTAL1" position="42"/>
+            <pin pad="AVSS" position="43"/>
+            <pin pad="EVDD" position="44"/>
+            <pin pad="AVDD" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
index c713d691..a67acf22 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
@@ -1,14 +1,14 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega128RFR2-ZU" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega128RFR2-ZUR" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega128RFR2-ZF" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega128RFR2-ZFR" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega128RFR2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -90,33 +90,81 @@
                 </instance>
             </module>
             <module name="PORT">
-                <instance name="PORTA" caption="I/O Port">
+                <instance name="MISSING_PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
-                <instance name="PORTC" caption="I/O Port">
+                <instance name="MISSING_PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -2762,4 +2810,72 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFN64">
+            <pin pad="PF2" position="1"/>
+            <pin pad="PF3" position="2"/>
+            <pin pad="PF4" position="3"/>
+            <pin pad="PF5" position="4"/>
+            <pin pad="PF6" position="5"/>
+            <pin pad="PF7" position="6"/>
+            <pin pad="AVSS_RFP" position="7"/>
+            <pin pad="RFP" position="8"/>
+            <pin pad="RFN" position="9"/>
+            <pin pad="AVSS_RFN" position="10"/>
+            <pin pad="TST" position="11"/>
+            <pin pad="RSTN" position="12"/>
+            <pin pad="RSTON" position="13"/>
+            <pin pad="PG0" position="14"/>
+            <pin pad="PG1" position="15"/>
+            <pin pad="PG2" position="16"/>
+            <pin pad="PG3" position="17"/>
+            <pin pad="PG4" position="18"/>
+            <pin pad="PG5" position="19"/>
+            <pin pad="DVSS" position="20"/>
+            <pin pad="DVDD" position="21"/>
+            <pin pad="DVDD" position="22"/>
+            <pin pad="DEVDD" position="23"/>
+            <pin pad="DVSS" position="24"/>
+            <pin pad="PD0" position="25"/>
+            <pin pad="PD1" position="26"/>
+            <pin pad="PD2" position="27"/>
+            <pin pad="PD3" position="28"/>
+            <pin pad="PD4" position="29"/>
+            <pin pad="PD5" position="30"/>
+            <pin pad="PD6" position="31"/>
+            <pin pad="PD7" position="32"/>
+            <pin pad="CLKI" position="33"/>
+            <pin pad="DEVDD" position="34"/>
+            <pin pad="DVSS" position="35"/>
+            <pin pad="PB0" position="36"/>
+            <pin pad="PB1" position="37"/>
+            <pin pad="PB2" position="38"/>
+            <pin pad="PB3" position="39"/>
+            <pin pad="PB4" position="40"/>
+            <pin pad="PB5" position="41"/>
+            <pin pad="PB6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="DEVDD" position="44"/>
+            <pin pad="DVSS" position="45"/>
+            <pin pad="PE0" position="46"/>
+            <pin pad="PE1" position="47"/>
+            <pin pad="PE2" position="48"/>
+            <pin pad="PE3" position="49"/>
+            <pin pad="PE4" position="50"/>
+            <pin pad="PE5" position="51"/>
+            <pin pad="PE6" position="52"/>
+            <pin pad="PE7" position="53"/>
+            <pin pad="DEVDD" position="54"/>
+            <pin pad="DVSS" position="55"/>
+            <pin pad="XTAL2" position="56"/>
+            <pin pad="XTAL1" position="57"/>
+            <pin pad="AVSS" position="58"/>
+            <pin pad="EVDD" position="59"/>
+            <pin pad="AVDD" position="60"/>
+            <pin pad="AVSS" position="61"/>
+            <pin pad="AREF" position="62"/>
+            <pin pad="PF0" position="63"/>
+            <pin pad="PF1" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml
index 4235b4e9..baed8b1b 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml
@@ -184,7 +184,7 @@
                         <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
                     </signals>
                 </instance>
-                <instance name="PORTB">
+                <instance name="MISSING_PORTB">
                     <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
                 </instance>
                 <instance name="PORTC">
@@ -209,7 +209,7 @@
                         <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
                     </signals>
                 </instance>
-                <instance name="PORTE">
+                <instance name="MISSING_PORTE">
                     <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
                 </instance>
                 <instance name="PORTF">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
index 9740df0e..2f665a65 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
@@ -1,14 +1,14 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega2564RFR2-ZU" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega2564RFR2-ZUR" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega2564RFR2-ZF" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega2564RFR2-ZFR" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega2564RFR2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -90,33 +90,77 @@
                 </instance>
             </module>
             <module name="PORT">
-                <instance name="PORTA" caption="I/O Port">
+                <instance name="MISSING_PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
-                <instance name="PORTC" caption="I/O Port">
+                <instance name="MISSING_PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3/4"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4/4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -2770,4 +2814,56 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFN48">
+            <pin pad="PF3/4" position="1"/>
+            <pin pad="PF5" position="2"/>
+            <pin pad="PF6" position="3"/>
+            <pin pad="PF7" position="4"/>
+            <pin pad="AVSS_RFP" position="5"/>
+            <pin pad="RFP" position="6"/>
+            <pin pad="RFN" position="7"/>
+            <pin pad="AVSS_RFN" position="8"/>
+            <pin pad="TST" position="9"/>
+            <pin pad="RSTN" position="10"/>
+            <pin pad="PG1" position="11"/>
+            <pin pad="PG3" position="12"/>
+            <pin pad="PG4" position="13"/>
+            <pin pad="DVSS" position="14"/>
+            <pin pad="DVDD" position="15"/>
+            <pin pad="DEVDD" position="16"/>
+            <pin pad="PD0" position="17"/>
+            <pin pad="PD1" position="18"/>
+            <pin pad="PD2" position="19"/>
+            <pin pad="PD3" position="20"/>
+            <pin pad="PD4" position="21"/>
+            <pin pad="PD5" position="22"/>
+            <pin pad="PD6" position="23"/>
+            <pin pad="PD7" position="24"/>
+            <pin pad="CLKI" position="25"/>
+            <pin pad="PB0" position="26"/>
+            <pin pad="PB1" position="27"/>
+            <pin pad="PB2" position="28"/>
+            <pin pad="PB3" position="29"/>
+            <pin pad="PB4" position="30"/>
+            <pin pad="PB5" position="31"/>
+            <pin pad="PB6" position="32"/>
+            <pin pad="PB7" position="33"/>
+            <pin pad="PE0" position="34"/>
+            <pin pad="PE1" position="35"/>
+            <pin pad="PE2" position="36"/>
+            <pin pad="PE3" position="37"/>
+            <pin pad="PE4" position="38"/>
+            <pin pad="PE5" position="39"/>
+            <pin pad="PE7" position="40"/>
+            <pin pad="XTAL2" position="41"/>
+            <pin pad="XTAL1" position="42"/>
+            <pin pad="AVSS" position="43"/>
+            <pin pad="EVDD" position="44"/>
+            <pin pad="AVDD" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
index 0f8511e2..706b541f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
@@ -1,14 +1,14 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega256RFR2-ZU" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega256RFR2-ZUR" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega256RFR2-ZF" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega256RFR2-ZFR" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega256RFR2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -90,33 +90,81 @@
                 </instance>
             </module>
             <module name="PORT">
-                <instance name="PORTA" caption="I/O Port">
+                <instance name="MISSING_PORTA" caption="I/O Port" >
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
-                <instance name="PORTC" caption="I/O Port">
+                <instance name="MISSING_PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -2769,4 +2817,72 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFN64">
+            <pin pad="PF2" position="1"/>
+            <pin pad="PF3" position="2"/>
+            <pin pad="PF4" position="3"/>
+            <pin pad="PF5" position="4"/>
+            <pin pad="PF6" position="5"/>
+            <pin pad="PF7" position="6"/>
+            <pin pad="AVSS_RFP" position="7"/>
+            <pin pad="RFP" position="8"/>
+            <pin pad="RFN" position="9"/>
+            <pin pad="AVSS_RFN" position="10"/>
+            <pin pad="TST" position="11"/>
+            <pin pad="RSTN" position="12"/>
+            <pin pad="RSTON" position="13"/>
+            <pin pad="PG0" position="14"/>
+            <pin pad="PG1" position="15"/>
+            <pin pad="PG2" position="16"/>
+            <pin pad="PG3" position="17"/>
+            <pin pad="PG4" position="18"/>
+            <pin pad="PG5" position="19"/>
+            <pin pad="DVSS" position="20"/>
+            <pin pad="DVDD" position="21"/>
+            <pin pad="DVDD" position="22"/>
+            <pin pad="DEVDD" position="23"/>
+            <pin pad="DVSS" position="24"/>
+            <pin pad="PD0" position="25"/>
+            <pin pad="PD1" position="26"/>
+            <pin pad="PD2" position="27"/>
+            <pin pad="PD3" position="28"/>
+            <pin pad="PD4" position="29"/>
+            <pin pad="PD5" position="30"/>
+            <pin pad="PD6" position="31"/>
+            <pin pad="PD7" position="32"/>
+            <pin pad="CLKI" position="33"/>
+            <pin pad="DEVDD" position="34"/>
+            <pin pad="DVSS" position="35"/>
+            <pin pad="PB0" position="36"/>
+            <pin pad="PB1" position="37"/>
+            <pin pad="PB2" position="38"/>
+            <pin pad="PB3" position="39"/>
+            <pin pad="PB4" position="40"/>
+            <pin pad="PB5" position="41"/>
+            <pin pad="PB6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="DEVDD" position="44"/>
+            <pin pad="DVSS" position="45"/>
+            <pin pad="PE0" position="46"/>
+            <pin pad="PE1" position="47"/>
+            <pin pad="PE2" position="48"/>
+            <pin pad="PE3" position="49"/>
+            <pin pad="PE4" position="50"/>
+            <pin pad="PE5" position="51"/>
+            <pin pad="PE6" position="52"/>
+            <pin pad="PE7" position="53"/>
+            <pin pad="DEVDD" position="54"/>
+            <pin pad="DVSS" position="55"/>
+            <pin pad="XTAL2" position="56"/>
+            <pin pad="XTAL1" position="57"/>
+            <pin pad="AVSS" position="58"/>
+            <pin pad="EVDD" position="59"/>
+            <pin pad="AVDD" position="60"/>
+            <pin pad="AVSS" position="61"/>
+            <pin pad="AREF" position="62"/>
+            <pin pad="PF0" position="63"/>
+            <pin pad="PF1" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml
index 0b68d432..3fc9b7a1 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml
@@ -184,7 +184,7 @@
                         <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
                     </signals>
                 </instance>
-                <instance name="PORTB">
+                <instance name="MISSING_PORTB">
                     <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
                 </instance>
                 <instance name="PORTC">
@@ -209,7 +209,7 @@
                         <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
                     </signals>
                 </instance>
-                <instance name="PORTE">
+                <instance name="MISSING_PORTE">
                     <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
                 </instance>
                 <instance name="PORTF">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml
index 96b2d74c..0b937400 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega3290-16AU" package="TQFP100" pinout="QFP100" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATmega3290" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -81,38 +81,125 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
                     <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTH" group="P" index="0" pad="PH0"/>
+                        <signal function="PORTH" group="P" index="1" pad="PH1"/>
+                        <signal function="PORTH" group="P" index="2" pad="PH2"/>
+                        <signal function="PORTH" group="P" index="3" pad="PH3"/>
+                        <signal function="PORTH" group="P" index="4" pad="PH4"/>
+                        <signal function="PORTH" group="P" index="5" pad="PH5"/>
+                        <signal function="PORTH" group="P" index="6" pad="PH6"/>
+                        <signal function="PORTH" group="P" index="7" pad="PH7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
                     <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
+                        <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
+                        <signal function="PORTJ" group="P" index="2" pad="PJ2"/>
+                        <signal function="PORTJ" group="P" index="3" pad="PJ3"/>
+                        <signal function="PORTJ" group="P" index="4" pad="PJ4"/>
+                        <signal function="PORTJ" group="P" index="5" pad="PJ5"/>
+                        <signal function="PORTJ" group="P" index="6" pad="PJ6"/>
+                    </signals>
                 </instance>
             </module>
             <module name="AC">
@@ -1124,4 +1211,108 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP100">
+            <pin pad="LCDCAP" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PE1" position="3"/>
+            <pin pad="PE2" position="4"/>
+            <pin pad="PE3" position="5"/>
+            <pin pad="PE4" position="6"/>
+            <pin pad="PE5" position="7"/>
+            <pin pad="PE6" position="8"/>
+            <pin pad="PE7" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="GND" position="11"/>
+            <pin pad="NC" position="12"/>
+            <pin pad="PJ0" position="13"/>
+            <pin pad="PJ1" position="14"/>
+            <pin pad="NC" position="15"/>
+            <pin pad="NC" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="PB0" position="19"/>
+            <pin pad="PB1" position="20"/>
+            <pin pad="PB2" position="21"/>
+            <pin pad="PB3" position="22"/>
+            <pin pad="PB4" position="23"/>
+            <pin pad="PB5" position="24"/>
+            <pin pad="PB6" position="25"/>
+            <pin pad="PB7" position="26"/>
+            <pin pad="NC" position="27"/>
+            <pin pad="PG3" position="28"/>
+            <pin pad="PG4" position="29"/>
+            <pin pad="PG5" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="GND" position="32"/>
+            <pin pad="XTAL2" position="33"/>
+            <pin pad="XTAL1" position="34"/>
+            <pin pad="NC" position="35"/>
+            <pin pad="NC" position="36"/>
+            <pin pad="PJ2" position="37"/>
+            <pin pad="PJ3" position="38"/>
+            <pin pad="PJ4" position="39"/>
+            <pin pad="PJ5" position="40"/>
+            <pin pad="PJ6" position="41"/>
+            <pin pad="NC" position="42"/>
+            <pin pad="PD0" position="43"/>
+            <pin pad="PD1" position="44"/>
+            <pin pad="PD2" position="45"/>
+            <pin pad="PD3" position="46"/>
+            <pin pad="PD4" position="47"/>
+            <pin pad="PD5" position="48"/>
+            <pin pad="PD6" position="49"/>
+            <pin pad="PD7" position="50"/>
+            <pin pad="PG0" position="51"/>
+            <pin pad="PG1" position="52"/>
+            <pin pad="PC0" position="53"/>
+            <pin pad="PC1" position="54"/>
+            <pin pad="PC2" position="55"/>
+            <pin pad="PC3" position="56"/>
+            <pin pad="PC4" position="57"/>
+            <pin pad="PC5" position="58"/>
+            <pin pad="NC" position="59"/>
+            <pin pad="NC" position="60"/>
+            <pin pad="NC" position="61"/>
+            <pin pad="NC" position="62"/>
+            <pin pad="PH0" position="63"/>
+            <pin pad="PH1" position="64"/>
+            <pin pad="PH2" position="65"/>
+            <pin pad="PH3" position="66"/>
+            <pin pad="NC" position="67"/>
+            <pin pad="PC6" position="68"/>
+            <pin pad="PC7" position="69"/>
+            <pin pad="PG2" position="70"/>
+            <pin pad="PA7" position="71"/>
+            <pin pad="PA6" position="72"/>
+            <pin pad="PA5" position="73"/>
+            <pin pad="PA4" position="74"/>
+            <pin pad="PA3" position="75"/>
+            <pin pad="PA2" position="76"/>
+            <pin pad="PA1" position="77"/>
+            <pin pad="PA0" position="78"/>
+            <pin pad="NC" position="79"/>
+            <pin pad="VCC" position="80"/>
+            <pin pad="GND" position="81"/>
+            <pin pad="NC" position="82"/>
+            <pin pad="NC" position="83"/>
+            <pin pad="PH4" position="84"/>
+            <pin pad="PH5" position="85"/>
+            <pin pad="PH6" position="86"/>
+            <pin pad="PH7" position="87"/>
+            <pin pad="NC" position="88"/>
+            <pin pad="NC" position="89"/>
+            <pin pad="PF7" position="90"/>
+            <pin pad="PF6" position="91"/>
+            <pin pad="PF5" position="92"/>
+            <pin pad="PF4" position="93"/>
+            <pin pad="PF3" position="94"/>
+            <pin pad="PF2" position="95"/>
+            <pin pad="PF1" position="96"/>
+            <pin pad="PF0" position="97"/>
+            <pin pad="AREF" position="98"/>
+            <pin pad="AGND" position="99"/>
+            <pin pad="AVCC" position="100"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml
index b4c4e19f..9d40f597 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml
@@ -184,7 +184,7 @@
                         <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
                     </signals>
                 </instance>
-                <instance name="PORTB">
+                <instance name="MISSING_PORTB">
                     <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
                 </instance>
                 <instance name="PORTC">
@@ -209,7 +209,7 @@
                         <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
                     </signals>
                 </instance>
-                <instance name="PORTE">
+                <instance name="MISSING_PORTE">
                     <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
                 </instance>
                 <instance name="PORTF">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
index a8969754..9c9370d4 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
@@ -1,14 +1,14 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega644RFR2-ZU" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega644RFR2-ZUR" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega644RFR2-ZF" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega644RFR2-ZFR" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZU" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZUR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZF" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZFR" package="VQFN48" pinout="QFN48" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega644RFR2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -90,33 +90,77 @@
                 </instance>
             </module>
             <module name="PORT">
-                <instance name="PORTA" caption="I/O Port">
+                <instance name="MISSING_PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
-                <instance name="PORTC" caption="I/O Port">
+                <instance name="MISSING_PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3/4"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4/4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -2755,4 +2799,56 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFN48">
+            <pin pad="PF3/4" position="1"/>
+            <pin pad="PF5" position="2"/>
+            <pin pad="PF6" position="3"/>
+            <pin pad="PF7" position="4"/>
+            <pin pad="AVSS_RFP" position="5"/>
+            <pin pad="RFP" position="6"/>
+            <pin pad="RFN" position="7"/>
+            <pin pad="AVSS_RFN" position="8"/>
+            <pin pad="TST" position="9"/>
+            <pin pad="RSTN" position="10"/>
+            <pin pad="PG1" position="11"/>
+            <pin pad="PG3" position="12"/>
+            <pin pad="PG4" position="13"/>
+            <pin pad="DVSS" position="14"/>
+            <pin pad="DVDD" position="15"/>
+            <pin pad="DEVDD" position="16"/>
+            <pin pad="PD0" position="17"/>
+            <pin pad="PD1" position="18"/>
+            <pin pad="PD2" position="19"/>
+            <pin pad="PD3" position="20"/>
+            <pin pad="PD4" position="21"/>
+            <pin pad="PD5" position="22"/>
+            <pin pad="PD6" position="23"/>
+            <pin pad="PD7" position="24"/>
+            <pin pad="CLKI" position="25"/>
+            <pin pad="PB0" position="26"/>
+            <pin pad="PB1" position="27"/>
+            <pin pad="PB2" position="28"/>
+            <pin pad="PB3" position="29"/>
+            <pin pad="PB4" position="30"/>
+            <pin pad="PB5" position="31"/>
+            <pin pad="PB6" position="32"/>
+            <pin pad="PB7" position="33"/>
+            <pin pad="PE0" position="34"/>
+            <pin pad="PE1" position="35"/>
+            <pin pad="PE2" position="36"/>
+            <pin pad="PE3" position="37"/>
+            <pin pad="PE4" position="38"/>
+            <pin pad="PE5" position="39"/>
+            <pin pad="PE7" position="40"/>
+            <pin pad="XTAL2" position="41"/>
+            <pin pad="XTAL1" position="42"/>
+            <pin pad="AVSS" position="43"/>
+            <pin pad="EVDD" position="44"/>
+            <pin pad="AVDD" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml
index 9cf79310..06838ff9 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega6490-16AU" package="TQFP100" pinout="QFP100" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATmega6490" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -96,38 +96,125 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
                     <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTH" group="P" index="0" pad="PH0"/>
+                        <signal function="PORTH" group="P" index="1" pad="PH1"/>
+                        <signal function="PORTH" group="P" index="2" pad="PH2"/>
+                        <signal function="PORTH" group="P" index="3" pad="PH3"/>
+                        <signal function="PORTH" group="P" index="4" pad="PH4"/>
+                        <signal function="PORTH" group="P" index="5" pad="PH5"/>
+                        <signal function="PORTH" group="P" index="6" pad="PH6"/>
+                        <signal function="PORTH" group="P" index="7" pad="PH7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
                     <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
+                        <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
+                        <signal function="PORTJ" group="P" index="2" pad="PJ2"/>
+                        <signal function="PORTJ" group="P" index="3" pad="PJ3"/>
+                        <signal function="PORTJ" group="P" index="4" pad="PJ4"/>
+                        <signal function="PORTJ" group="P" index="5" pad="PJ5"/>
+                        <signal function="PORTJ" group="P" index="6" pad="PJ6"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -1113,4 +1200,108 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP100">
+            <pin pad="LCDCAP" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PE1" position="3"/>
+            <pin pad="PE2" position="4"/>
+            <pin pad="PE3" position="5"/>
+            <pin pad="PE4" position="6"/>
+            <pin pad="PE5" position="7"/>
+            <pin pad="PE6" position="8"/>
+            <pin pad="PE7" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="GND" position="11"/>
+            <pin pad="NC" position="12"/>
+            <pin pad="PJ0" position="13"/>
+            <pin pad="PJ1" position="14"/>
+            <pin pad="NC" position="15"/>
+            <pin pad="NC" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="PB0" position="19"/>
+            <pin pad="PB1" position="20"/>
+            <pin pad="PB2" position="21"/>
+            <pin pad="PB3" position="22"/>
+            <pin pad="PB4" position="23"/>
+            <pin pad="PB5" position="24"/>
+            <pin pad="PB6" position="25"/>
+            <pin pad="PB7" position="26"/>
+            <pin pad="NC" position="27"/>
+            <pin pad="PG3" position="28"/>
+            <pin pad="PG4" position="29"/>
+            <pin pad="PG5" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="GND" position="32"/>
+            <pin pad="XTAL2" position="33"/>
+            <pin pad="XTAL1" position="34"/>
+            <pin pad="NC" position="35"/>
+            <pin pad="NC" position="36"/>
+            <pin pad="PJ2" position="37"/>
+            <pin pad="PJ3" position="38"/>
+            <pin pad="PJ4" position="39"/>
+            <pin pad="PJ5" position="40"/>
+            <pin pad="PJ6" position="41"/>
+            <pin pad="NC" position="42"/>
+            <pin pad="PD0" position="43"/>
+            <pin pad="PD1" position="44"/>
+            <pin pad="PD2" position="45"/>
+            <pin pad="PD3" position="46"/>
+            <pin pad="PD4" position="47"/>
+            <pin pad="PD5" position="48"/>
+            <pin pad="PD6" position="49"/>
+            <pin pad="PD7" position="50"/>
+            <pin pad="PG0" position="51"/>
+            <pin pad="PG1" position="52"/>
+            <pin pad="PC0" position="53"/>
+            <pin pad="PC1" position="54"/>
+            <pin pad="PC2" position="55"/>
+            <pin pad="PC3" position="56"/>
+            <pin pad="PC4" position="57"/>
+            <pin pad="PC5" position="58"/>
+            <pin pad="NC" position="59"/>
+            <pin pad="NC" position="60"/>
+            <pin pad="NC" position="61"/>
+            <pin pad="NC" position="62"/>
+            <pin pad="PH0" position="63"/>
+            <pin pad="PH1" position="64"/>
+            <pin pad="PH2" position="65"/>
+            <pin pad="PH3" position="66"/>
+            <pin pad="NC" position="67"/>
+            <pin pad="PC6" position="68"/>
+            <pin pad="PC7" position="69"/>
+            <pin pad="PG2" position="70"/>
+            <pin pad="PA7" position="71"/>
+            <pin pad="PA6" position="72"/>
+            <pin pad="PA5" position="73"/>
+            <pin pad="PA4" position="74"/>
+            <pin pad="PA3" position="75"/>
+            <pin pad="PA2" position="76"/>
+            <pin pad="PA1" position="77"/>
+            <pin pad="PA0" position="78"/>
+            <pin pad="NC" position="79"/>
+            <pin pad="VCC" position="80"/>
+            <pin pad="GND" position="81"/>
+            <pin pad="NC" position="82"/>
+            <pin pad="NC" position="83"/>
+            <pin pad="PH4" position="84"/>
+            <pin pad="PH5" position="85"/>
+            <pin pad="PH6" position="86"/>
+            <pin pad="PH7" position="87"/>
+            <pin pad="NC" position="88"/>
+            <pin pad="NC" position="89"/>
+            <pin pad="PF7" position="90"/>
+            <pin pad="PF6" position="91"/>
+            <pin pad="PF5" position="92"/>
+            <pin pad="PF4" position="93"/>
+            <pin pad="PF3" position="94"/>
+            <pin pad="PF2" position="95"/>
+            <pin pad="PF1" position="96"/>
+            <pin pad="PF0" position="97"/>
+            <pin pad="AREF" position="98"/>
+            <pin pad="AGND" position="99"/>
+            <pin pad="AVCC" position="100"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
index f34869d2..29e419ff 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
@@ -1,14 +1,14 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant ordercode="ATmega64RFR2-ZU" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6"
-                 vccmin="1.8"/>
-        <variant ordercode="ATmega64RFR2-ZUR" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega64RFR2-ZF" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
-        <variant ordercode="ATmega64RFR2-ZFR" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
-                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZU" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZUR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZF" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZFR" package="QFN64" pinout="QFN64" speedmax="16000000" tempmax="125"
+                 tempmin="-40" vccmax="3.6" vccmin="1.8"/>
     </variants>
     <device name="ATmega64RFR2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -90,33 +90,81 @@
                 </instance>
             </module>
             <module name="PORT">
-                <instance name="PORTA" caption="I/O Port">
+                <instance name="MISSING_PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
-                <instance name="PORTC" caption="I/O Port">
+                <instance name="MISSING_PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -2731,4 +2779,72 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFN64">
+            <pin pad="PF2" position="1"/>
+            <pin pad="PF3" position="2"/>
+            <pin pad="PF4" position="3"/>
+            <pin pad="PF5" position="4"/>
+            <pin pad="PF6" position="5"/>
+            <pin pad="PF7" position="6"/>
+            <pin pad="AVSS_RFP" position="7"/>
+            <pin pad="RFP" position="8"/>
+            <pin pad="RFN" position="9"/>
+            <pin pad="AVSS_RFN" position="10"/>
+            <pin pad="TST" position="11"/>
+            <pin pad="RSTN" position="12"/>
+            <pin pad="RSTON" position="13"/>
+            <pin pad="PG0" position="14"/>
+            <pin pad="PG1" position="15"/>
+            <pin pad="PG2" position="16"/>
+            <pin pad="PG3" position="17"/>
+            <pin pad="PG4" position="18"/>
+            <pin pad="PG5" position="19"/>
+            <pin pad="DVSS" position="20"/>
+            <pin pad="DVDD" position="21"/>
+            <pin pad="DVDD" position="22"/>
+            <pin pad="DEVDD" position="23"/>
+            <pin pad="DVSS" position="24"/>
+            <pin pad="PD0" position="25"/>
+            <pin pad="PD1" position="26"/>
+            <pin pad="PD2" position="27"/>
+            <pin pad="PD3" position="28"/>
+            <pin pad="PD4" position="29"/>
+            <pin pad="PD5" position="30"/>
+            <pin pad="PD6" position="31"/>
+            <pin pad="PD7" position="32"/>
+            <pin pad="CLKI" position="33"/>
+            <pin pad="DEVDD" position="34"/>
+            <pin pad="DVSS" position="35"/>
+            <pin pad="PB0" position="36"/>
+            <pin pad="PB1" position="37"/>
+            <pin pad="PB2" position="38"/>
+            <pin pad="PB3" position="39"/>
+            <pin pad="PB4" position="40"/>
+            <pin pad="PB5" position="41"/>
+            <pin pad="PB6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="DEVDD" position="44"/>
+            <pin pad="DVSS" position="45"/>
+            <pin pad="PE0" position="46"/>
+            <pin pad="PE1" position="47"/>
+            <pin pad="PE2" position="48"/>
+            <pin pad="PE3" position="49"/>
+            <pin pad="PE4" position="50"/>
+            <pin pad="PE5" position="51"/>
+            <pin pad="PE6" position="52"/>
+            <pin pad="PE7" position="53"/>
+            <pin pad="DEVDD" position="54"/>
+            <pin pad="DVSS" position="55"/>
+            <pin pad="XTAL2" position="56"/>
+            <pin pad="XTAL1" position="57"/>
+            <pin pad="AVSS" position="58"/>
+            <pin pad="EVDD" position="59"/>
+            <pin pad="AVDD" position="60"/>
+            <pin pad="AVSS" position="61"/>
+            <pin pad="AREF" position="62"/>
+            <pin pad="PF0" position="63"/>
+            <pin pad="PF1" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA808.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA808.xml
index f625d921..b520ed43 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA808.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA808.xml
@@ -184,7 +184,7 @@
                         <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
                     </signals>
                 </instance>
-                <instance name="PORTB">
+                <instance name="MISSING_PORTB">
                     <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
                 </instance>
                 <instance name="PORTC">
@@ -209,7 +209,7 @@
                         <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
                     </signals>
                 </instance>
-                <instance name="PORTE">
+                <instance name="MISSING_PORTE">
                     <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
                 </instance>
                 <instance name="PORTF">