New WchRiscV target class

src/Targets/RiscV/Wch/WchRiscV.cpp

@@ -0,0 +1,84 @@
+#include "WchRiscV.hpp"
+
+#include <utility>
+#include <cassert>
+
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+
+namespace Targets::RiscV::Wch
+{
+    WchRiscV::WchRiscV(
+        const TargetConfig& targetConfig,
+        TargetDescriptionFile&& targetDescriptionFile
+    )
+        : RiscV(targetConfig, targetDescriptionFile)
+        , targetDescriptionFile(std::move(targetDescriptionFile))
+    {}
+
+    void WchRiscV::activate() {
+        RiscV::activate();
+
+        /*
+         * WCH target IDs are specific to the variant. Each variant in the TDF should have a property group that holds
+         * the variant ID.
+         */
+        const auto variantsById = this->targetDescriptionFile.getVariantsByWchVariantId();
+        const auto deviceId = this->riscVIdInterface->getDeviceId();
+
+        const auto variantIt = variantsById.find(deviceId);
+        if (variantIt == variantsById.end()) {
+            throw Exceptions::InvalidConfig{
+                "Unknown WCH variant ID \"" + deviceId + "\". Please check your configuration."
+            };
+        }
+
+        this->variant = *(variantIt->second);
+    }
+
+    void WchRiscV::postActivate() {
+        assert(this->variant.has_value());
+
+        const auto& variant = this->variant->get();
+        Logger::info("WCH variant ID: " + variant.getProperty("vendor", "variant_id").value);
+        Logger::info("WCH variant name: " + variant.name);
+
+        RiscV::postActivate();
+    }
+
+    TargetDescriptor WchRiscV::targetDescriptor() {
+        auto descriptor = TargetDescriptor{
+            this->targetDescriptionFile.getName(),
+            this->targetDescriptionFile.getFamily(),
+            this->variant->get().getProperty("vendor", "variant_id").value,
+            this->targetDescriptionFile.getVendorName(),
+            this->targetDescriptionFile.targetAddressSpaceDescriptorsByKey(),
+            this->targetDescriptionFile.targetPeripheralDescriptorsByKey(),
+            this->targetDescriptionFile.targetPadDescriptorsByKey(),
+            this->targetDescriptionFile.targetPinoutDescriptorsByKey(),
+            this->targetDescriptionFile.targetVariantDescriptorsByKey(),
+            BreakpointResources{
+                this->riscVDebugInterface->getHardwareBreakpointCount(),
+                std::nullopt,
+                static_cast<std::uint16_t>(this->targetConfig.reserveSteppingBreakpoint ? 1 : 0)
+            }
+        };
+
+        // Copy the RISC-V CPU register address space and peripheral descriptor
+        descriptor.addressSpaceDescriptorsByKey.emplace(
+            this->cpuRegisterAddressSpaceDescriptor.key,
+            this->cpuRegisterAddressSpaceDescriptor.clone()
+        );
+
+        descriptor.peripheralDescriptorsByKey.emplace(
+            this->cpuPeripheralDescriptor.key,
+            this->cpuPeripheralDescriptor.clone()
+        );
+
+        auto& sysAddressSpaceDescriptor = descriptor.getAddressSpaceDescriptor("system");
+        sysAddressSpaceDescriptor.getMemorySegmentDescriptor("internal_program_memory").inspectionEnabled = true;
+        sysAddressSpaceDescriptor.getMemorySegmentDescriptor("internal_ram").inspectionEnabled = true;
+
+        return descriptor;
+    }
+}