From 46773a82b34816c0450c10149a274f41784fefc4 Mon Sep 17 00:00:00 2001
From: Nav <nav@navnav.me>
Date: Sun, 20 Jun 2021 15:59:14 +0100
Subject: [PATCH] Final TDF corrections - Validation script now reports zero
 failures

---
 .../AVR8/MEGA/AT90PWM2B.xml                   |  55 ++++-
 .../AVR8/MEGA/AT90PWM3B.xml                   | 108 +++++++++-
 .../AVR8/MEGA/AT90USB162.xml                  |  69 ++++++-
 .../AVR8/MEGA/AT90USB82.xml                   |  68 +++++-
 .../AVR8/MEGA/ATMEGA128RFA1.xml               | 122 ++++++++++-
 .../AVR8/MEGA/ATMEGA162.xml                   | 141 ++++++++++++-
 .../AVR8/MEGA/ATMEGA165A.xml                  | 139 ++++++++++++-
 .../AVR8/MEGA/ATMEGA165P.xml                  | 139 ++++++++++++-
 .../AVR8/MEGA/ATMEGA165PA.xml                 | 139 ++++++++++++-
 .../AVR8/MEGA/ATMEGA6490A.xml                 | 193 +++++++++++++++++-
 .../AVR8/MEGA/ATMEGA6490P.xml                 | 193 +++++++++++++++++-
 11 files changed, 1353 insertions(+), 13 deletions(-)

diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml
index ad515c8a..efd070a8 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90PWM2B-16SU" package="SOIC24" pinout="SOIC24" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="AT90PWM2B" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -45,14 +45,39 @@
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                    </signals>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
@@ -1239,4 +1264,32 @@
             </register-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="SOIC24">
+            <pin pad="PD0" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PD1" position="3"/>
+            <pin pad="PD2" position="4"/>
+            <pin pad="PD3" position="5"/>
+            <pin pad="VCC" position="6"/>
+            <pin pad="GND" position="7"/>
+            <pin pad="PB0" position="8"/>
+            <pin pad="PB1" position="9"/>
+            <pin pad="PE1" position="10"/>
+            <pin pad="PE2" position="11"/>
+            <pin pad="PD4" position="12"/>
+            <pin pad="PD5" position="13"/>
+            <pin pad="PD6" position="14"/>
+            <pin pad="PD7" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="AVCC" position="17"/>
+            <pin pad="AGND" position="18"/>
+            <pin pad="AREF" position="19"/>
+            <pin pad="PB3" position="20"/>
+            <pin pad="PB4" position="21"/>
+            <pin pad="PB5" position="22"/>
+            <pin pad="PB6" position="23"/>
+            <pin pad="PB7" position="24"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml
index 6094117b..ed72b59a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml
@@ -1,7 +1,8 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90PWM3B-SU" package="SOIC32" pinout="SOIC32" tempmax="85" tempmin="-40"/>
+        <variant ordercode="AT90PWM3B-MU" package="QFN32" pinout="QFN32" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="AT90PWM3B" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -45,18 +46,53 @@
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                    </signals>
                 </instance>
             </module>
             <module name="BOOT_LOAD">
@@ -1323,4 +1359,74 @@
             </register-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="SOIC32">
+            <pin pad="PD0" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="PE0" position="3"/>
+            <pin pad="PD1" position="4"/>
+            <pin pad="PD2" position="5"/>
+            <pin pad="PD3" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="VCC" position="8"/>
+            <pin pad="GND" position="9"/>
+            <pin pad="PC2" position="10"/>
+            <pin pad="PC3" position="11"/>
+            <pin pad="PB0" position="12"/>
+            <pin pad="PB1" position="13"/>
+            <pin pad="PE1" position="14"/>
+            <pin pad="PE2" position="15"/>
+            <pin pad="PD4" position="16"/>
+            <pin pad="PD5" position="17"/>
+            <pin pad="PD6" position="18"/>
+            <pin pad="PD7" position="19"/>
+            <pin pad="PB2" position="20"/>
+            <pin pad="PC4" position="21"/>
+            <pin pad="PC5" position="22"/>
+            <pin pad="AVCC" position="23"/>
+            <pin pad="AGND" position="24"/>
+            <pin pad="AREF" position="25"/>
+            <pin pad="PC6" position="26"/>
+            <pin pad="PB3" position="27"/>
+            <pin pad="PB4" position="28"/>
+            <pin pad="PC7" position="29"/>
+            <pin pad="PB5" position="30"/>
+            <pin pad="PB6" position="31"/>
+            <pin pad="PB7" position="32"/>
+        </pinout>
+        <pinout name="QFN32">
+            <pin pad="PD2" position="1"/>
+            <pin pad="PD3" position="2"/>
+            <pin pad="PC1" position="3"/>
+            <pin pad="VCC" position="4"/>
+            <pin pad="GND" position="5"/>
+            <pin pad="PC2" position="6"/>
+            <pin pad="PC3" position="7"/>
+            <pin pad="PB0" position="8"/>
+            <pin pad="PB1" position="9"/>
+            <pin pad="PE1" position="10"/>
+            <pin pad="PE2" position="11"/>
+            <pin pad="PD4" position="12"/>
+            <pin pad="PD5" position="13"/>
+            <pin pad="PD6" position="14"/>
+            <pin pad="PD7" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="PC4" position="17"/>
+            <pin pad="PC5" position="18"/>
+            <pin pad="AVCC" position="19"/>
+            <pin pad="AGND" position="20"/>
+            <pin pad="AREF" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PB3" position="23"/>
+            <pin pad="PB4" position="24"/>
+            <pin pad="PC7" position="25"/>
+            <pin pad="PB5" position="26"/>
+            <pin pad="PB6" position="27"/>
+            <pin pad="PB7" position="28"/>
+            <pin pad="PD0" position="29"/>
+            <pin pad="PC0" position="30"/>
+            <pin pad="PE0" position="31"/>
+            <pin pad="PD1" position="32"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB162.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB162.xml
index 7ed2ec9e..fbfad2ee 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB162.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB162.xml
@@ -1,7 +1,8 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90USB162-AU" package="TQFP32" pinout="QFP_QFN_32" tempmax="85" tempmin="-40"/>
+        <variant ordercode="AT90USB162-MU" package="VQFN32" pinout="QFP_QFN_32" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="AT90USB162" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -45,14 +46,44 @@
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
             </module>
             <module name="SPI">
@@ -1010,4 +1041,40 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_32">
+            <pin pad="XTAL1" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="GND" position="3"/>
+            <pin pad="VCC" position="4"/>
+            <pin pad="PC2" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="PB0" position="14"/>
+            <pin pad="PB1" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="PB3" position="17"/>
+            <pin pad="PB4" position="18"/>
+            <pin pad="PB5" position="19"/>
+            <pin pad="PB6" position="20"/>
+            <pin pad="PB7" position="21"/>
+            <pin pad="PC7" position="22"/>
+            <pin pad="PC6" position="23"/>
+            <pin pad="RESET" position="24"/>
+            <pin pad="PC5" position="25"/>
+            <pin pad="PC4" position="26"/>
+            <pin pad="UCAP" position="27"/>
+            <pin pad="UGND" position="28"/>
+            <pin pad="D+" position="29"/>
+            <pin pad="D-" position="30"/>
+            <pin pad="UVCC" position="31"/>
+            <pin pad="AVCC" position="32"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB82.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB82.xml
index c7d42cb4..958ab252 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB82.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/AT90USB82.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90USB82-MU" package="VQFN32" pinout="QFN32" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="AT90USB82" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -45,14 +45,44 @@
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
             </module>
             <module name="SPI">
@@ -1010,4 +1040,40 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFN32">
+            <pin pad="XTAL1" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="GND" position="3"/>
+            <pin pad="VCC" position="4"/>
+            <pin pad="PC2" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="PB0" position="14"/>
+            <pin pad="PB1" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="PB3" position="17"/>
+            <pin pad="PB4" position="18"/>
+            <pin pad="PB5" position="19"/>
+            <pin pad="PB6" position="20"/>
+            <pin pad="PB7" position="21"/>
+            <pin pad="PC7" position="22"/>
+            <pin pad="PC6" position="23"/>
+            <pin pad="RESET" position="24"/>
+            <pin pad="PC5" position="25"/>
+            <pin pad="PC4" position="26"/>
+            <pin pad="UCAP" position="27"/>
+            <pin pad="UGND" position="28"/>
+            <pin pad="D+" position="29"/>
+            <pin pad="D-" position="30"/>
+            <pin pad="UVCC" position="31"/>
+            <pin pad="AVCC" position="32"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
index 300833c0..4de25932 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="3.6"/>
+        <variant ordercode="ATmega128RFA1-ZU" tempmin="-40" tempmax="85" pinout="QFN64" package="QFN64"/>
     </variants>
     <device name="ATmega128RFA1" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -78,33 +78,81 @@
                 </instance>
             </module>
             <module name="PORT">
-                <instance name="PORTA" caption="I/O Port">
+                <instance name="MISSING_PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTB" pad="PB0" index="0"/>
+                        <signal group="P" function="PORTB" pad="PB1" index="1"/>
+                        <signal group="P" function="PORTB" pad="PB2" index="2"/>
+                        <signal group="P" function="PORTB" pad="PB3" index="3"/>
+                        <signal group="P" function="PORTB" pad="PB4" index="4"/>
+                        <signal group="P" function="PORTB" pad="PB5" index="5"/>
+                        <signal group="P" function="PORTB" pad="PB6" index="6"/>
+                        <signal group="P" function="PORTB" pad="PB7" index="7"/>
+                    </signals>
                 </instance>
-                <instance name="PORTC" caption="I/O Port">
+                <instance name="MISSING_PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTD" pad="PD0" index="0"/>
+                        <signal group="P" function="PORTD" pad="PD1" index="1"/>
+                        <signal group="P" function="PORTD" pad="PD2" index="2"/>
+                        <signal group="P" function="PORTD" pad="PD3" index="3"/>
+                        <signal group="P" function="PORTD" pad="PD4" index="4"/>
+                        <signal group="P" function="PORTD" pad="PD5" index="5"/>
+                        <signal group="P" function="PORTD" pad="PD6" index="6"/>
+                        <signal group="P" function="PORTD" pad="PD7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTE" pad="PE0" index="0"/>
+                        <signal group="P" function="PORTE" pad="PE1" index="1"/>
+                        <signal group="P" function="PORTE" pad="PE2" index="2"/>
+                        <signal group="P" function="PORTE" pad="PE3" index="3"/>
+                        <signal group="P" function="PORTE" pad="PE4" index="4"/>
+                        <signal group="P" function="PORTE" pad="PE5" index="5"/>
+                        <signal group="P" function="PORTE" pad="PE6" index="6"/>
+                        <signal group="P" function="PORTE" pad="PE7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTF" pad="PF0" index="0"/>
+                        <signal group="P" function="PORTF" pad="PF1" index="1"/>
+                        <signal group="P" function="PORTF" pad="PF2" index="2"/>
+                        <signal group="P" function="PORTF" pad="PF3" index="3"/>
+                        <signal group="P" function="PORTF" pad="PF4" index="4"/>
+                        <signal group="P" function="PORTF" pad="PF5" index="5"/>
+                        <signal group="P" function="PORTF" pad="PF6" index="6"/>
+                        <signal group="P" function="PORTF" pad="PF7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTG" pad="PG0" index="0"/>
+                        <signal group="P" function="PORTG" pad="PG1" index="1"/>
+                        <signal group="P" function="PORTG" pad="PG2" index="2"/>
+                        <signal group="P" function="PORTG" pad="PG3" index="3"/>
+                        <signal group="P" function="PORTG" pad="PG4" index="4"/>
+                        <signal group="P" function="PORTG" pad="PG5" index="5"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -2478,4 +2526,72 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="PF2"/>
+            <pin position="2" pad="PF3"/>
+            <pin position="3" pad="PF4"/>
+            <pin position="4" pad="PF5"/>
+            <pin position="5" pad="PF6"/>
+            <pin position="6" pad="PF7"/>
+            <pin position="7" pad="AVSS_RFP"/>
+            <pin position="8" pad="RFP"/>
+            <pin position="9" pad="RFN"/>
+            <pin position="10" pad="AVSS_RFN"/>
+            <pin position="11" pad="TST"/>
+            <pin position="12" pad="RSTN"/>
+            <pin position="13" pad="RSTON"/>
+            <pin position="14" pad="PG0"/>
+            <pin position="15" pad="PG1"/>
+            <pin position="16" pad="PG2"/>
+            <pin position="17" pad="PG3"/>
+            <pin position="18" pad="PG4"/>
+            <pin position="19" pad="PG5"/>
+            <pin position="20" pad="DVSS"/>
+            <pin position="21" pad="DVDD"/>
+            <pin position="22" pad="DVDD"/>
+            <pin position="23" pad="DEVDD"/>
+            <pin position="24" pad="DVSS"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="CLKI"/>
+            <pin position="34" pad="DEVDD"/>
+            <pin position="35" pad="DVSS"/>
+            <pin position="36" pad="PB0"/>
+            <pin position="37" pad="PB1"/>
+            <pin position="38" pad="PB2"/>
+            <pin position="39" pad="PB3"/>
+            <pin position="40" pad="PB4"/>
+            <pin position="41" pad="PB5"/>
+            <pin position="42" pad="PB6"/>
+            <pin position="43" pad="PB7"/>
+            <pin position="44" pad="DEVDD"/>
+            <pin position="45" pad="DVSS"/>
+            <pin position="46" pad="PE0"/>
+            <pin position="47" pad="PE1"/>
+            <pin position="48" pad="PE2"/>
+            <pin position="49" pad="PE3"/>
+            <pin position="50" pad="PE4"/>
+            <pin position="51" pad="PE5"/>
+            <pin position="52" pad="PE6"/>
+            <pin position="53" pad="PE7"/>
+            <pin position="54" pad="DEVDD"/>
+            <pin position="55" pad="DVSS"/>
+            <pin position="56" pad="XTAL2"/>
+            <pin position="57" pad="XTAL1"/>
+            <pin position="58" pad="AVSS"/>
+            <pin position="59" pad="EVDD"/>
+            <pin position="60" pad="AVDD"/>
+            <pin position="61" pad="AVSS"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="PF0"/>
+            <pin position="64" pad="PF1"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA162.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA162.xml
index 8f07190b..4b83d06e 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA162.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA162.xml
@@ -1,7 +1,9 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega162-PU" tempmin="-40" tempmax="85" pinout="DIP40" package="DIP40"/>
+        <variant ordercode="ATmega162-AU" tempmin="-40" tempmax="85" pinout="QFP_QFN_44" package="TQFP44"/>
+        <variant ordercode="ATmega162-MU" tempmin="-40" tempmax="85" pinout="QFP_QFN_44" package="VQFN44"/>
     </variants>
     <device name="ATmega162" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -111,22 +113,67 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTA" pad="PA0" index="0"/>
+                        <signal group="P" function="PORTA" pad="PA1" index="1"/>
+                        <signal group="P" function="PORTA" pad="PA2" index="2"/>
+                        <signal group="P" function="PORTA" pad="PA3" index="3"/>
+                        <signal group="P" function="PORTA" pad="PA4" index="4"/>
+                        <signal group="P" function="PORTA" pad="PA5" index="5"/>
+                        <signal group="P" function="PORTA" pad="PA6" index="6"/>
+                        <signal group="P" function="PORTA" pad="PA7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTB" pad="PB0" index="0"/>
+                        <signal group="P" function="PORTB" pad="PB1" index="1"/>
+                        <signal group="P" function="PORTB" pad="PB2" index="2"/>
+                        <signal group="P" function="PORTB" pad="PB3" index="3"/>
+                        <signal group="P" function="PORTB" pad="PB4" index="4"/>
+                        <signal group="P" function="PORTB" pad="PB5" index="5"/>
+                        <signal group="P" function="PORTB" pad="PB6" index="6"/>
+                        <signal group="P" function="PORTB" pad="PB7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTC" pad="PC0" index="0"/>
+                        <signal group="P" function="PORTC" pad="PC1" index="1"/>
+                        <signal group="P" function="PORTC" pad="PC2" index="2"/>
+                        <signal group="P" function="PORTC" pad="PC3" index="3"/>
+                        <signal group="P" function="PORTC" pad="PC4" index="4"/>
+                        <signal group="P" function="PORTC" pad="PC5" index="5"/>
+                        <signal group="P" function="PORTC" pad="PC6" index="6"/>
+                        <signal group="P" function="PORTC" pad="PC7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTD" pad="PD0" index="0"/>
+                        <signal group="P" function="PORTD" pad="PD1" index="1"/>
+                        <signal group="P" function="PORTD" pad="PD2" index="2"/>
+                        <signal group="P" function="PORTD" pad="PD3" index="3"/>
+                        <signal group="P" function="PORTD" pad="PD4" index="4"/>
+                        <signal group="P" function="PORTD" pad="PD5" index="5"/>
+                        <signal group="P" function="PORTD" pad="PD6" index="6"/>
+                        <signal group="P" function="PORTD" pad="PD7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTE" pad="PE0" index="0"/>
+                        <signal group="P" function="PORTE" pad="PE1" index="1"/>
+                        <signal group="P" function="PORTE" pad="PE2" index="2"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -1067,4 +1114,96 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="DIP40" caption="DIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="PD0"/>
+            <pin position="11" pad="PD1"/>
+            <pin position="12" pad="PD2"/>
+            <pin position="13" pad="PD3"/>
+            <pin position="14" pad="PD4"/>
+            <pin position="15" pad="PD5"/>
+            <pin position="16" pad="PD6"/>
+            <pin position="17" pad="PD7"/>
+            <pin position="18" pad="XTAL2"/>
+            <pin position="19" pad="XTAL1"/>
+            <pin position="20" pad="GND"/>
+            <pin position="21" pad="PC0"/>
+            <pin position="22" pad="PC1"/>
+            <pin position="23" pad="PC2"/>
+            <pin position="24" pad="PC3"/>
+            <pin position="25" pad="PC4"/>
+            <pin position="26" pad="PC5"/>
+            <pin position="27" pad="PC6"/>
+            <pin position="28" pad="PC7"/>
+            <pin position="29" pad="PE2"/>
+            <pin position="30" pad="PE1"/>
+            <pin position="31" pad="PE0"/>
+            <pin position="32" pad="PA7"/>
+            <pin position="33" pad="PA6"/>
+            <pin position="34" pad="PA5"/>
+            <pin position="35" pad="PA4"/>
+            <pin position="36" pad="PA3"/>
+            <pin position="37" pad="PA2"/>
+            <pin position="38" pad="PA1"/>
+            <pin position="39" pad="PA0"/>
+            <pin position="40" pad="VCC"/>
+        </pinout>
+        <pinout name="QFP_QFN_44" caption="QFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="PD0"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PD1"/>
+            <pin position="8" pad="PD2"/>
+            <pin position="9" pad="PD3"/>
+            <pin position="10" pad="PD4"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="XTAL2"/>
+            <pin position="15" pad="XTAL1"/>
+            <pin position="16" pad="GND"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="PC0"/>
+            <pin position="19" pad="PC1"/>
+            <pin position="20" pad="PC2"/>
+            <pin position="21" pad="PC3"/>
+            <pin position="22" pad="PC4"/>
+            <pin position="23" pad="PC5"/>
+            <pin position="24" pad="PC6"/>
+            <pin position="25" pad="PC7"/>
+            <pin position="26" pad="PE2"/>
+            <pin position="27" pad="PE1"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="PE0"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+
+    </pinouts>
+
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml
index ab31c5c4..e24a4b41 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml
@@ -1,7 +1,8 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega165A-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
+        <variant ordercode="ATmega165A-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATmega165A" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -81,30 +82,98 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
             </module>
             <module name="AC">
@@ -1007,4 +1076,72 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="NC" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PE1" position="3"/>
+            <pin pad="PE2" position="4"/>
+            <pin pad="PE3" position="5"/>
+            <pin pad="PE4" position="6"/>
+            <pin pad="PE5" position="7"/>
+            <pin pad="PE6" position="8"/>
+            <pin pad="PE7" position="9"/>
+            <pin pad="PB0" position="10"/>
+            <pin pad="PB1" position="11"/>
+            <pin pad="PB2" position="12"/>
+            <pin pad="PB3" position="13"/>
+            <pin pad="PB4" position="14"/>
+            <pin pad="PB5" position="15"/>
+            <pin pad="PB6" position="16"/>
+            <pin pad="PB7" position="17"/>
+            <pin pad="PG3" position="18"/>
+            <pin pad="PG4" position="19"/>
+            <pin pad="PG5" position="20"/>
+            <pin pad="VCC" position="21"/>
+            <pin pad="GDN" position="22"/>
+            <pin pad="XTAL2" position="23"/>
+            <pin pad="XTAL1" position="24"/>
+            <pin pad="PD0" position="25"/>
+            <pin pad="PD1" position="26"/>
+            <pin pad="PD2" position="27"/>
+            <pin pad="PD3" position="28"/>
+            <pin pad="PD4" position="29"/>
+            <pin pad="PD5" position="30"/>
+            <pin pad="PD6" position="31"/>
+            <pin pad="PD7" position="32"/>
+            <pin pad="PG0" position="33"/>
+            <pin pad="PG1" position="34"/>
+            <pin pad="PC0" position="35"/>
+            <pin pad="PC1" position="36"/>
+            <pin pad="PC2" position="37"/>
+            <pin pad="PC3" position="38"/>
+            <pin pad="PC4" position="39"/>
+            <pin pad="PC5" position="40"/>
+            <pin pad="PC6" position="41"/>
+            <pin pad="PC7" position="42"/>
+            <pin pad="PG2" position="43"/>
+            <pin pad="PA7" position="44"/>
+            <pin pad="PA6" position="45"/>
+            <pin pad="PA5" position="46"/>
+            <pin pad="PA4" position="47"/>
+            <pin pad="PA3" position="48"/>
+            <pin pad="PA2" position="49"/>
+            <pin pad="PA1" position="50"/>
+            <pin pad="PA0" position="51"/>
+            <pin pad="VCC" position="52"/>
+            <pin pad="GND" position="53"/>
+            <pin pad="PF7" position="54"/>
+            <pin pad="PF6" position="55"/>
+            <pin pad="PF5" position="56"/>
+            <pin pad="PF4" position="57"/>
+            <pin pad="PF3" position="58"/>
+            <pin pad="PF2" position="59"/>
+            <pin pad="PF1" position="60"/>
+            <pin pad="PF0" position="61"/>
+            <pin pad="AREF" position="62"/>
+            <pin pad="GND" position="63"/>
+            <pin pad="AVCC" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml
index 3b38f319..a1d9b637 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml
@@ -1,7 +1,8 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega165P-AU" tempmin="-40" tempmax="85" pinout="QFP_QFN_64" package="TQFP64"/>
+        <variant ordercode="ATmega165P-MU" tempmin="-40" tempmax="85" pinout="QFP_QFN_64" package="VQFN64"/>
     </variants>
     <device name="ATmega165P" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -81,30 +82,98 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTA" pad="PA0" index="0"/>
+                        <signal group="P" function="PORTA" pad="PA1" index="1"/>
+                        <signal group="P" function="PORTA" pad="PA2" index="2"/>
+                        <signal group="P" function="PORTA" pad="PA3" index="3"/>
+                        <signal group="P" function="PORTA" pad="PA4" index="4"/>
+                        <signal group="P" function="PORTA" pad="PA5" index="5"/>
+                        <signal group="P" function="PORTA" pad="PA6" index="6"/>
+                        <signal group="P" function="PORTA" pad="PA7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTB" pad="PB0" index="0"/>
+                        <signal group="P" function="PORTB" pad="PB1" index="1"/>
+                        <signal group="P" function="PORTB" pad="PB2" index="2"/>
+                        <signal group="P" function="PORTB" pad="PB3" index="3"/>
+                        <signal group="P" function="PORTB" pad="PB4" index="4"/>
+                        <signal group="P" function="PORTB" pad="PB5" index="5"/>
+                        <signal group="P" function="PORTB" pad="PB6" index="6"/>
+                        <signal group="P" function="PORTB" pad="PB7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTC" pad="PC0" index="0"/>
+                        <signal group="P" function="PORTC" pad="PC1" index="1"/>
+                        <signal group="P" function="PORTC" pad="PC2" index="2"/>
+                        <signal group="P" function="PORTC" pad="PC3" index="3"/>
+                        <signal group="P" function="PORTC" pad="PC4" index="4"/>
+                        <signal group="P" function="PORTC" pad="PC5" index="5"/>
+                        <signal group="P" function="PORTC" pad="PC6" index="6"/>
+                        <signal group="P" function="PORTC" pad="PC7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTD" pad="PD0" index="0"/>
+                        <signal group="P" function="PORTD" pad="PD1" index="1"/>
+                        <signal group="P" function="PORTD" pad="PD2" index="2"/>
+                        <signal group="P" function="PORTD" pad="PD3" index="3"/>
+                        <signal group="P" function="PORTD" pad="PD4" index="4"/>
+                        <signal group="P" function="PORTD" pad="PD5" index="5"/>
+                        <signal group="P" function="PORTD" pad="PD6" index="6"/>
+                        <signal group="P" function="PORTD" pad="PD7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTE" pad="PE0" index="0"/>
+                        <signal group="P" function="PORTE" pad="PE1" index="1"/>
+                        <signal group="P" function="PORTE" pad="PE2" index="2"/>
+                        <signal group="P" function="PORTE" pad="PE3" index="3"/>
+                        <signal group="P" function="PORTE" pad="PE4" index="4"/>
+                        <signal group="P" function="PORTE" pad="PE5" index="5"/>
+                        <signal group="P" function="PORTE" pad="PE6" index="6"/>
+                        <signal group="P" function="PORTE" pad="PE7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTF" pad="PF0" index="0"/>
+                        <signal group="P" function="PORTF" pad="PF1" index="1"/>
+                        <signal group="P" function="PORTF" pad="PF2" index="2"/>
+                        <signal group="P" function="PORTF" pad="PF3" index="3"/>
+                        <signal group="P" function="PORTF" pad="PF4" index="4"/>
+                        <signal group="P" function="PORTF" pad="PF5" index="5"/>
+                        <signal group="P" function="PORTF" pad="PF6" index="6"/>
+                        <signal group="P" function="PORTF" pad="PF7" index="7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal group="P" function="PORTG" pad="PG0" index="0"/>
+                        <signal group="P" function="PORTG" pad="PG1" index="1"/>
+                        <signal group="P" function="PORTG" pad="PG2" index="2"/>
+                        <signal group="P" function="PORTG" pad="PG3" index="3"/>
+                        <signal group="P" function="PORTG" pad="PG4" index="4"/>
+                        <signal group="P" function="PORTG" pad="PG5" index="5"/>
+                    </signals>
                 </instance>
             </module>
             <module name="AC">
@@ -1007,4 +1076,72 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64" caption="QFP_QFN_64">
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml
index 6b4f1f91..27e19db4 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml
@@ -1,7 +1,8 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega165PA-AU" package="TQFP64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
+        <variant ordercode="ATmega165PA-MU" package="VQFN64" pinout="QFP_QFN_64" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATmega165PA" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -81,30 +82,98 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
             </module>
             <module name="AC">
@@ -1009,4 +1078,72 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="NC" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PE1" position="3"/>
+            <pin pad="PE2" position="4"/>
+            <pin pad="PE3" position="5"/>
+            <pin pad="PE4" position="6"/>
+            <pin pad="PE5" position="7"/>
+            <pin pad="PE6" position="8"/>
+            <pin pad="PE7" position="9"/>
+            <pin pad="PB0" position="10"/>
+            <pin pad="PB1" position="11"/>
+            <pin pad="PB2" position="12"/>
+            <pin pad="PB3" position="13"/>
+            <pin pad="PB4" position="14"/>
+            <pin pad="PB5" position="15"/>
+            <pin pad="PB6" position="16"/>
+            <pin pad="PB7" position="17"/>
+            <pin pad="PG3" position="18"/>
+            <pin pad="PG4" position="19"/>
+            <pin pad="PG5" position="20"/>
+            <pin pad="VCC" position="21"/>
+            <pin pad="GDN" position="22"/>
+            <pin pad="XTAL2" position="23"/>
+            <pin pad="XTAL1" position="24"/>
+            <pin pad="PD0" position="25"/>
+            <pin pad="PD1" position="26"/>
+            <pin pad="PD2" position="27"/>
+            <pin pad="PD3" position="28"/>
+            <pin pad="PD4" position="29"/>
+            <pin pad="PD5" position="30"/>
+            <pin pad="PD6" position="31"/>
+            <pin pad="PD7" position="32"/>
+            <pin pad="PG0" position="33"/>
+            <pin pad="PG1" position="34"/>
+            <pin pad="PC0" position="35"/>
+            <pin pad="PC1" position="36"/>
+            <pin pad="PC2" position="37"/>
+            <pin pad="PC3" position="38"/>
+            <pin pad="PC4" position="39"/>
+            <pin pad="PC5" position="40"/>
+            <pin pad="PC6" position="41"/>
+            <pin pad="PC7" position="42"/>
+            <pin pad="PG2" position="43"/>
+            <pin pad="PA7" position="44"/>
+            <pin pad="PA6" position="45"/>
+            <pin pad="PA5" position="46"/>
+            <pin pad="PA4" position="47"/>
+            <pin pad="PA3" position="48"/>
+            <pin pad="PA2" position="49"/>
+            <pin pad="PA1" position="50"/>
+            <pin pad="PA0" position="51"/>
+            <pin pad="VCC" position="52"/>
+            <pin pad="GND" position="53"/>
+            <pin pad="PF7" position="54"/>
+            <pin pad="PF6" position="55"/>
+            <pin pad="PF5" position="56"/>
+            <pin pad="PF4" position="57"/>
+            <pin pad="PF3" position="58"/>
+            <pin pad="PF2" position="59"/>
+            <pin pad="PF1" position="60"/>
+            <pin pad="PF0" position="61"/>
+            <pin pad="AREF" position="62"/>
+            <pin pad="GND" position="63"/>
+            <pin pad="AVCC" position="64"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml
index 89015284..88228f3f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega6490A-AU" package="TQFP100" pinout="QFP100" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATmega6490A" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -96,38 +96,125 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
                     <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTH" group="P" index="0" pad="PH0"/>
+                        <signal function="PORTH" group="P" index="1" pad="PH1"/>
+                        <signal function="PORTH" group="P" index="2" pad="PH2"/>
+                        <signal function="PORTH" group="P" index="3" pad="PH3"/>
+                        <signal function="PORTH" group="P" index="4" pad="PH4"/>
+                        <signal function="PORTH" group="P" index="5" pad="PH5"/>
+                        <signal function="PORTH" group="P" index="6" pad="PH6"/>
+                        <signal function="PORTH" group="P" index="7" pad="PH7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
                     <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
+                        <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
+                        <signal function="PORTJ" group="P" index="2" pad="PJ2"/>
+                        <signal function="PORTJ" group="P" index="3" pad="PJ3"/>
+                        <signal function="PORTJ" group="P" index="4" pad="PJ4"/>
+                        <signal function="PORTJ" group="P" index="5" pad="PJ5"/>
+                        <signal function="PORTJ" group="P" index="6" pad="PJ6"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -1113,4 +1200,108 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP100">
+            <pin pad="LCDCAP" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PE1" position="3"/>
+            <pin pad="PE2" position="4"/>
+            <pin pad="PE3" position="5"/>
+            <pin pad="PE4" position="6"/>
+            <pin pad="PE5" position="7"/>
+            <pin pad="PE6" position="8"/>
+            <pin pad="PE7" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="GND" position="11"/>
+            <pin pad="NC" position="12"/>
+            <pin pad="PJ0" position="13"/>
+            <pin pad="PJ1" position="14"/>
+            <pin pad="NC" position="15"/>
+            <pin pad="NC" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="PB0" position="19"/>
+            <pin pad="PB1" position="20"/>
+            <pin pad="PB2" position="21"/>
+            <pin pad="PB3" position="22"/>
+            <pin pad="PB4" position="23"/>
+            <pin pad="PB5" position="24"/>
+            <pin pad="PB6" position="25"/>
+            <pin pad="PB7" position="26"/>
+            <pin pad="NC" position="27"/>
+            <pin pad="PG3" position="28"/>
+            <pin pad="PG4" position="29"/>
+            <pin pad="PG5" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="GND" position="32"/>
+            <pin pad="XTAL2" position="33"/>
+            <pin pad="XTAL1" position="34"/>
+            <pin pad="NC" position="35"/>
+            <pin pad="NC" position="36"/>
+            <pin pad="PJ2" position="37"/>
+            <pin pad="PJ3" position="38"/>
+            <pin pad="PJ4" position="39"/>
+            <pin pad="PJ5" position="40"/>
+            <pin pad="PJ6" position="41"/>
+            <pin pad="NC" position="42"/>
+            <pin pad="PD0" position="43"/>
+            <pin pad="PD1" position="44"/>
+            <pin pad="PD2" position="45"/>
+            <pin pad="PD3" position="46"/>
+            <pin pad="PD4" position="47"/>
+            <pin pad="PD5" position="48"/>
+            <pin pad="PD6" position="49"/>
+            <pin pad="PD7" position="50"/>
+            <pin pad="PG0" position="51"/>
+            <pin pad="PG1" position="52"/>
+            <pin pad="PC0" position="53"/>
+            <pin pad="PC1" position="54"/>
+            <pin pad="PC2" position="55"/>
+            <pin pad="PC3" position="56"/>
+            <pin pad="PC4" position="57"/>
+            <pin pad="PC5" position="58"/>
+            <pin pad="NC" position="59"/>
+            <pin pad="NC" position="60"/>
+            <pin pad="NC" position="61"/>
+            <pin pad="NC" position="62"/>
+            <pin pad="PH0" position="63"/>
+            <pin pad="PH1" position="64"/>
+            <pin pad="PH2" position="65"/>
+            <pin pad="PH3" position="66"/>
+            <pin pad="NC" position="67"/>
+            <pin pad="PC6" position="68"/>
+            <pin pad="PC7" position="69"/>
+            <pin pad="PG2" position="70"/>
+            <pin pad="PA7" position="71"/>
+            <pin pad="PA6" position="72"/>
+            <pin pad="PA5" position="73"/>
+            <pin pad="PA4" position="74"/>
+            <pin pad="PA3" position="75"/>
+            <pin pad="PA2" position="76"/>
+            <pin pad="PA1" position="77"/>
+            <pin pad="PA0" position="78"/>
+            <pin pad="NC" position="79"/>
+            <pin pad="VCC" position="80"/>
+            <pin pad="GND" position="81"/>
+            <pin pad="NC" position="82"/>
+            <pin pad="NC" position="83"/>
+            <pin pad="PH4" position="84"/>
+            <pin pad="PH5" position="85"/>
+            <pin pad="PH6" position="86"/>
+            <pin pad="PH7" position="87"/>
+            <pin pad="NC" position="88"/>
+            <pin pad="NC" position="89"/>
+            <pin pad="PF7" position="90"/>
+            <pin pad="PF6" position="91"/>
+            <pin pad="PF5" position="92"/>
+            <pin pad="PF4" position="93"/>
+            <pin pad="PF3" position="94"/>
+            <pin pad="PF2" position="95"/>
+            <pin pad="PF1" position="96"/>
+            <pin pad="PF0" position="97"/>
+            <pin pad="AREF" position="98"/>
+            <pin pad="AGND" position="99"/>
+            <pin pad="AVCC" position="100"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml
index 5e6fdb3e..57aabff2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega6490P-AU" package="TQFP100" pinout="QFP100" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATmega6490P" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -96,38 +96,125 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                        <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                        <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                        <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTC" caption="I/O Port">
                     <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                        <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                        <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                        <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                        <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                        <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                        <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                        <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTD" caption="I/O Port">
                     <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                        <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                        <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                        <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                        <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                        <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTE" caption="I/O Port">
                     <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                        <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                        <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                        <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                        <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                        <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTF" caption="I/O Port">
                     <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                        <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                        <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                        <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                        <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                        <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                        <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                        <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTG" caption="I/O Port">
                     <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                        <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                        <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                        <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                        <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                        <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                    </signals>
                 </instance>
                 <instance name="PORTH" caption="I/O Port">
                     <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTH" group="P" index="0" pad="PH0"/>
+                        <signal function="PORTH" group="P" index="1" pad="PH1"/>
+                        <signal function="PORTH" group="P" index="2" pad="PH2"/>
+                        <signal function="PORTH" group="P" index="3" pad="PH3"/>
+                        <signal function="PORTH" group="P" index="4" pad="PH4"/>
+                        <signal function="PORTH" group="P" index="5" pad="PH5"/>
+                        <signal function="PORTH" group="P" index="6" pad="PH6"/>
+                        <signal function="PORTH" group="P" index="7" pad="PH7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTJ" caption="I/O Port">
                     <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
+                        <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
+                        <signal function="PORTJ" group="P" index="2" pad="PJ2"/>
+                        <signal function="PORTJ" group="P" index="3" pad="PJ3"/>
+                        <signal function="PORTJ" group="P" index="4" pad="PJ4"/>
+                        <signal function="PORTJ" group="P" index="5" pad="PJ5"/>
+                        <signal function="PORTJ" group="P" index="6" pad="PJ6"/>
+                    </signals>
                 </instance>
             </module>
             <module name="TC8">
@@ -1113,4 +1200,108 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="QFP100">
+            <pin pad="LCDCAP" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PE1" position="3"/>
+            <pin pad="PE2" position="4"/>
+            <pin pad="PE3" position="5"/>
+            <pin pad="PE4" position="6"/>
+            <pin pad="PE5" position="7"/>
+            <pin pad="PE6" position="8"/>
+            <pin pad="PE7" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="GND" position="11"/>
+            <pin pad="NC" position="12"/>
+            <pin pad="PJ0" position="13"/>
+            <pin pad="PJ1" position="14"/>
+            <pin pad="NC" position="15"/>
+            <pin pad="NC" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="PB0" position="19"/>
+            <pin pad="PB1" position="20"/>
+            <pin pad="PB2" position="21"/>
+            <pin pad="PB3" position="22"/>
+            <pin pad="PB4" position="23"/>
+            <pin pad="PB5" position="24"/>
+            <pin pad="PB6" position="25"/>
+            <pin pad="PB7" position="26"/>
+            <pin pad="NC" position="27"/>
+            <pin pad="PG3" position="28"/>
+            <pin pad="PG4" position="29"/>
+            <pin pad="PG5" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="GND" position="32"/>
+            <pin pad="XTAL2" position="33"/>
+            <pin pad="XTAL1" position="34"/>
+            <pin pad="NC" position="35"/>
+            <pin pad="NC" position="36"/>
+            <pin pad="PJ2" position="37"/>
+            <pin pad="PJ3" position="38"/>
+            <pin pad="PJ4" position="39"/>
+            <pin pad="PJ5" position="40"/>
+            <pin pad="PJ6" position="41"/>
+            <pin pad="NC" position="42"/>
+            <pin pad="PD0" position="43"/>
+            <pin pad="PD1" position="44"/>
+            <pin pad="PD2" position="45"/>
+            <pin pad="PD3" position="46"/>
+            <pin pad="PD4" position="47"/>
+            <pin pad="PD5" position="48"/>
+            <pin pad="PD6" position="49"/>
+            <pin pad="PD7" position="50"/>
+            <pin pad="PG0" position="51"/>
+            <pin pad="PG1" position="52"/>
+            <pin pad="PC0" position="53"/>
+            <pin pad="PC1" position="54"/>
+            <pin pad="PC2" position="55"/>
+            <pin pad="PC3" position="56"/>
+            <pin pad="PC4" position="57"/>
+            <pin pad="PC5" position="58"/>
+            <pin pad="NC" position="59"/>
+            <pin pad="NC" position="60"/>
+            <pin pad="NC" position="61"/>
+            <pin pad="NC" position="62"/>
+            <pin pad="PH0" position="63"/>
+            <pin pad="PH1" position="64"/>
+            <pin pad="PH2" position="65"/>
+            <pin pad="PH3" position="66"/>
+            <pin pad="NC" position="67"/>
+            <pin pad="PC6" position="68"/>
+            <pin pad="PC7" position="69"/>
+            <pin pad="PG2" position="70"/>
+            <pin pad="PA7" position="71"/>
+            <pin pad="PA6" position="72"/>
+            <pin pad="PA5" position="73"/>
+            <pin pad="PA4" position="74"/>
+            <pin pad="PA3" position="75"/>
+            <pin pad="PA2" position="76"/>
+            <pin pad="PA1" position="77"/>
+            <pin pad="PA0" position="78"/>
+            <pin pad="NC" position="79"/>
+            <pin pad="VCC" position="80"/>
+            <pin pad="GND" position="81"/>
+            <pin pad="NC" position="82"/>
+            <pin pad="NC" position="83"/>
+            <pin pad="PH4" position="84"/>
+            <pin pad="PH5" position="85"/>
+            <pin pad="PH6" position="86"/>
+            <pin pad="PH7" position="87"/>
+            <pin pad="NC" position="88"/>
+            <pin pad="NC" position="89"/>
+            <pin pad="PF7" position="90"/>
+            <pin pad="PF6" position="91"/>
+            <pin pad="PF5" position="92"/>
+            <pin pad="PF4" position="93"/>
+            <pin pad="PF3" position="94"/>
+            <pin pad="PF2" position="95"/>
+            <pin pad="PF1" position="96"/>
+            <pin pad="PF0" position="97"/>
+            <pin pad="AREF" position="98"/>
+            <pin pad="AGND" position="99"/>
+            <pin pad="AVCC" position="100"/>
+        </pinout>
+    </pinouts>
 </target-description-file>