Removed TDFs for discontinued targets (found by validation script)
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@@ -1,680 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<target-description-file>
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<variants>
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<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="4.5"/>
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</variants>
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<device name="ATmega16HVA" architecture="AVR8" family="megaAVR">
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<address-spaces>
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<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
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<memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
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pagesize="0x80"/>
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</address-space>
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<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
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<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
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</address-space>
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<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
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<memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
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</address-space>
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<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
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<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
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</address-space>
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<address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
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<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
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<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
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<memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
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</address-space>
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<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
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<memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
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pagesize="0x04"/>
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</address-space>
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<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
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</address-spaces>
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<peripherals>
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<module name="ADC">
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<instance name="ADC" caption="Analog-to-Digital Converter">
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<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
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caption="Analog-to-Digital Converter"/>
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</instance>
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</module>
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<module name="WDT">
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<instance name="WDT" caption="Watchdog Timer">
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<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
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caption="Watchdog Timer"/>
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</instance>
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</module>
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<module name="BANDGAP">
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<instance name="BANDGAP" caption="Bandgap">
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<register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
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caption="Bandgap"/>
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</instance>
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</module>
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<module name="EXINT">
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<instance name="EXINT" caption="External Interrupts">
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<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
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caption="External Interrupts"/>
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</instance>
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</module>
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<module name="PORT">
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<instance name="PORTC" caption="I/O Port">
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<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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<instance name="PORTA" caption="I/O Port">
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<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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<instance name="PORTB" caption="I/O Port">
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<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
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caption="I/O Port"/>
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</instance>
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</module>
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<module name="FET">
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<instance name="FET" caption="FET Control">
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<register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
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caption="FET Control"/>
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</instance>
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</module>
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<module name="SPI">
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<instance name="SPI" caption="Serial Peripheral Interface">
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<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
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caption="Serial Peripheral Interface"/>
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</instance>
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</module>
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<module name="BOOT_LOAD">
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<instance name="BOOT_LOAD" caption="Bootloader">
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<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
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caption="Bootloader"/>
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</instance>
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</module>
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<module name="CPU">
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<instance name="CPU" caption="CPU Registers">
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<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
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caption="CPU Registers"/>
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<parameters>
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<param name="CORE_VERSION" value="V2E"/>
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</parameters>
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</instance>
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</module>
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<module name="BATTERY_PROTECTION">
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<instance name="BATTERY_PROTECTION" caption="Battery Protection">
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<register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
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address-space="data" caption="Battery Protection"/>
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</instance>
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</module>
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<module name="EEPROM">
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<instance name="EEPROM" caption="EEPROM">
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<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
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caption="EEPROM"/>
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</instance>
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</module>
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<module name="TC16">
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<instance name="TC1" caption="Timer/Counter, 16-bit">
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<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
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caption="Timer/Counter, 16-bit"/>
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</instance>
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<instance name="TC0" caption="Timer/Counter, 16-bit">
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<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
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caption="Timer/Counter, 16-bit"/>
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</instance>
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</module>
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<module name="COULOMB_COUNTER">
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<instance name="COULOMB_COUNTER" caption="Coulomb Counter">
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<register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
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address-space="data" caption="Coulomb Counter"/>
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</instance>
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</module>
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<module name="VOLTAGE_REGULATOR">
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<instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
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<register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
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address-space="data" caption="Voltage Regulator"/>
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</instance>
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</module>
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<module name="FUSE">
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<instance name="FUSE" caption="Fuses">
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<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
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caption="Fuses"/>
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</instance>
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</module>
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<module name="LOCKBIT">
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<instance name="LOCKBIT" caption="Lockbits">
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<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
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caption="Lockbits"/>
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</instance>
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</module>
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</peripherals>
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<interrupts>
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<interrupt index="0" name="RESET"
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caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
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<interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
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<interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
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<interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
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<interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
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<interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
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<interrupt index="6" name="WDT" caption="Watchdog Timeout Interrupt"/>
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<interrupt index="7" name="TIMER1_IC" caption="Timer 1 Input capture"/>
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<interrupt index="8" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
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<interrupt index="9" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
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<interrupt index="10" name="TIMER1_OVF" caption="Timer 1 overflow"/>
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<interrupt index="11" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
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<interrupt index="12" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
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<interrupt index="13" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
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<interrupt index="14" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
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<interrupt index="15" name="SPI_STC" caption="SPI Serial transfer complete"/>
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<interrupt index="16" name="VADC" caption="Voltage ADC Conversion Complete"/>
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<interrupt index="17" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
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<interrupt index="18" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
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<interrupt index="19" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
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<interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
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</interrupts>
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<interfaces>
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<interface name="ISP" type="isp"/>
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<interface name="HVSP" type="hvsp"/>
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<interface name="debugWIRE" type="dw"/>
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</interfaces>
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<property-groups>
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<property-group name="SIGNATURES">
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<property name="JTAGID" value="0x940C"/>
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<property name="SIGNATURE0" value="0x1e"/>
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<property name="SIGNATURE1" value="0x94"/>
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<property name="SIGNATURE2" value="0x0c"/>
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</property-group>
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<property-group name="OCD">
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<property name="OCD_REVISION" value="1"/>
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<property name="OCD_DATAREG" value="0x31"/>
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<property name="PROGBASE" value="0x0000"/>
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</property-group>
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<property-group name="JTAG_INTERFACE">
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<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
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</property-group>
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<property-group name="ISP_INTERFACE">
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<property name="IspEnterProgMode_timeout" value="200"/>
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<property name="IspEnterProgMode_stabDelay" value="100"/>
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<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
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<property name="IspEnterProgMode_synchLoops" value="32"/>
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<property name="IspEnterProgMode_byteDelay" value="0"/>
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<property name="IspEnterProgMode_pollIndex" value="3"/>
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<property name="IspEnterProgMode_pollValue" value="0x53"/>
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<property name="IspLeaveProgMode_preDelay" value="1"/>
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<property name="IspLeaveProgMode_postDelay" value="1"/>
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<property name="IspChipErase_eraseDelay" value="20"/>
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<property name="IspChipErase_pollMethod" value="1"/>
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<property name="IspProgramFlash_mode" value="0x41"/>
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<property name="IspProgramFlash_blockSize" value="128"/>
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<property name="IspProgramFlash_delay" value="10"/>
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<property name="IspProgramFlash_cmd1" value="0x40"/>
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<property name="IspProgramFlash_cmd2" value="0x4C"/>
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<property name="IspProgramFlash_cmd3" value="0x00"/>
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<property name="IspProgramFlash_pollVal1" value="0x00"/>
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<property name="IspProgramFlash_pollVal2" value="0x00"/>
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<property name="IspProgramEeprom_mode" value="0x41"/>
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<property name="IspProgramEeprom_blockSize" value="4"/>
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<property name="IspProgramEeprom_delay" value="20"/>
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<property name="IspProgramEeprom_cmd1" value="0xC1"/>
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<property name="IspProgramEeprom_cmd2" value="0xC2"/>
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<property name="IspProgramEeprom_cmd3" value="0x00"/>
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<property name="IspProgramEeprom_pollVal1" value="0x00"/>
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<property name="IspProgramEeprom_pollVal2" value="0x00"/>
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<property name="IspReadFlash_blockSize" value="256"/>
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<property name="IspReadEeprom_blockSize" value="256"/>
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<property name="IspReadFuse_pollIndex" value="4"/>
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<property name="IspReadLock_pollIndex" value="4"/>
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<property name="IspReadSign_pollIndex" value="4"/>
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<property name="IspReadOsccal_pollIndex" value="4"/>
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</property-group>
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<property-group name="HVSP_INTERFACE">
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<property name="HvspControlStack"
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value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
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<property name="HvspEnterProgMode_stabDelay" value="100"/>
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<property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
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<property name="HvspEnterProgMode_synchCycles" value="6"/>
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<property name="HvspEnterProgMode_latchCycles" value="1"/>
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<property name="HvspEnterProgMode_toggleVtg" value="1"/>
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<property name="HvspEnterProgMode_powoffDelay" value="25"/>
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<property name="HvspEnterProgMode_resetDelay1" value="1"/>
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<property name="HvspEnterProgMode_resetDelay2" value="70"/>
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<property name="HvspLeaveProgMode_stabDelay" value="101"/>
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<property name="HvspLeaveProgMode_resetDelay" value="26"/>
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<property name="HvspChipErase_pollTimeout" value="40"/>
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<property name="HvspChipErase_eraseTime" value="1"/>
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<property name="HvspProgramFlash_mode" value="0x0D"/>
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<property name="HvspProgramFlash_blockSize" value="256"/>
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<property name="HvspProgramFlash_pollTimeout" value="6"/>
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<property name="HvspReadFlash_blockSize" value="256"/>
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<property name="HvspProgramEeprom_mode" value="0x05"/>
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<property name="HvspProgramEeprom_blockSize" value="256"/>
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<property name="HvspProgramEeprom_pollTimeout" value="5"/>
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<property name="HvspReadEeprom_blockSize" value="256"/>
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<property name="HvspProgramFuse_pollTimeout" value="25"/>
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<property name="HvspProgramLock_pollTimeout" value="25"/>
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</property-group>
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</property-groups>
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</device>
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<modules>
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<module caption="Fuses" name="FUSE">
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<register-group caption="Fuses" name="FUSE">
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<register caption="" name="LOW" offset="0x00" size="1" initval="0xDF">
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<bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
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<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
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<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
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<bitfield caption="Debug Wire enable" mask="0x10" name="DWEN"/>
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<bitfield caption="Self Programming enable" mask="0x08" name="SELFPRGEN"/>
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<bitfield caption="Select start-up time" mask="0x07" name="SUT" values="ENUM_SUT"/>
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</register>
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</register-group>
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<value-group caption="" name="ENUM_SUT">
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<value caption="Start-up time 6 CK/14 CK + 4 ms" name="6CK_14CK_4MS" value="0x00"/>
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<value caption="Start-up time 6 CK/14 CK + 8 ms" name="6CK_14CK_8MS" value="0x01"/>
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<value caption="Start-up time 6 CK/14 CK + 16 ms" name="6CK_14CK_16MS" value="0x02"/>
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<value caption="Start-up time 6 CK/14 CK + 32 ms" name="6CK_14CK_32MS" value="0x03"/>
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<value caption="Start-up time 6 CK/14 CK + 64 ms" name="6CK_14CK_64MS" value="0x04"/>
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<value caption="Start-up time 6 CK/14 CK + 128 ms" name="6CK_14CK_128MS" value="0x05"/>
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<value caption="Start-up time 6 CK/14 CK + 256 ms" name="6CK_14CK_256MS" value="0x06"/>
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<value caption="Start-up time 6 CK/14 CK + 512 ms" name="6CK_14CK_512MS" value="0x07"/>
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</value-group>
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</module>
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<module caption="Lockbits" name="LOCKBIT">
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<register-group caption="Lockbits" name="LOCKBIT">
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<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
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<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
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</register>
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</register-group>
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<value-group caption="" name="ENUM_LB">
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<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
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<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
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<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
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</value-group>
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</module>
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<module caption="Analog-to-Digital Converter" name="ADC">
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<register-group caption="Analog-to-Digital Converter" name="ADC">
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<register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
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<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
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</register>
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<register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
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<register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
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ocd-rw="R">
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<bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
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<bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
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<bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
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<bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
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</register>
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</register-group>
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</module>
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<module caption="Watchdog Timer" name="WDT">
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<register-group caption="Watchdog Timer" name="WDT">
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<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
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<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
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<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
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<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
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values="WDOG_TIMER_PRESCALE_4BITS"/>
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<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
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<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
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</register>
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</register-group>
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<value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
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<value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
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<value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
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<value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
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<value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
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<value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
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<value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
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<value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
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<value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
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<value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
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<value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
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</value-group>
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</module>
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<module caption="Bandgap" name="BANDGAP">
|
||||
<register-group caption="Bandgap" name="BANDGAP">
|
||||
<register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
|
||||
mask="0xFF">
|
||||
<bitfield caption="Bandgap calibration bits" mask="0xFF" name="BGCR"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
|
||||
<bitfield
|
||||
caption="Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared before enabling CC-ADC or V-ADC, and must remain unset while either ADC is enabled."
|
||||
mask="0x80" name="BGD"/>
|
||||
<bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="External Interrupts" name="EXINT">
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
||||
<bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
||||
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="I/O Port" name="PORT">
|
||||
<register-group caption="I/O Port" name="PORTC">
|
||||
<register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x01"/>
|
||||
<register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x01" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTA">
|
||||
<register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x03"/>
|
||||
<register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x03"/>
|
||||
<register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x03" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTB">
|
||||
<register caption="Data Register, Port B" name="PORTB" offset="0x25" size="1" mask="0x0F"/>
|
||||
<register caption="Data Direction Register, Port B" name="DDRB" offset="0x24" size="1" mask="0x0F"/>
|
||||
<register caption="Input Pins, Port B" name="PINB" offset="0x23" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="FET Control" name="FET">
|
||||
<register-group caption="FET Control" name="FET">
|
||||
<register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
|
||||
<bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
|
||||
<bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
|
||||
<bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
|
||||
<bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Serial Peripheral Interface" name="SPI">
|
||||
<register-group caption="Serial Peripheral Interface" name="SPI">
|
||||
<register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
|
||||
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
||||
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
||||
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
||||
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
||||
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
||||
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
||||
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
||||
</register>
|
||||
<register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
|
||||
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
||||
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
||||
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
||||
</register>
|
||||
<register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
||||
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Bootloader" name="BOOT_LOAD">
|
||||
<register-group caption="Bootloader" name="BOOT_LOAD">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1">
|
||||
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
||||
<bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
|
||||
<bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
||||
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="CPU Registers" name="CPU">
|
||||
<register-group caption="CPU Registers" name="CPU">
|
||||
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
||||
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
||||
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
||||
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
||||
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
||||
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
||||
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
||||
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
||||
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
|
||||
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
||||
<bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
|
||||
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
||||
</register>
|
||||
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
|
||||
<bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
|
||||
offset="0x37" size="1" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
|
||||
</register>
|
||||
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
||||
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
|
||||
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
|
||||
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
|
||||
<register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x02" name="PA1DID"/>
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x01" name="PA0DID"/>
|
||||
</register>
|
||||
<register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
|
||||
<bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
|
||||
<bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
|
||||
<bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group name="CPU_SLEEP_MODE_3BITS" caption="">
|
||||
<value caption="Idle" name="IDLE" value="0x00"/>
|
||||
<value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
|
||||
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Power Save" name="PSAVE" value="0x03"/>
|
||||
<value caption="Power Off" name="POFF" value="0x04"/>
|
||||
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Reserved" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register-group caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
|
||||
<bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
|
||||
<bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
|
||||
<bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
|
||||
<bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
|
||||
<bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
|
||||
<bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
|
||||
size="1" mask="0x3F"/>
|
||||
<register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
|
||||
mask="0x3F"/>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
|
||||
size="1" mask="0x7F"/>
|
||||
<register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
|
||||
offset="0xF9" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
|
||||
offset="0xF8" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
|
||||
offset="0xF7" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
|
||||
offset="0xF6" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
|
||||
size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
|
||||
name="DOCIF"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
|
||||
name="COCIF"/>
|
||||
<bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
|
||||
<bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
|
||||
name="DOCIE"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
|
||||
name="COCIE"/>
|
||||
<bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
|
||||
name="DHCIE"/>
|
||||
<bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
<bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
|
||||
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
|
||||
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="EEP_MODE">
|
||||
<value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Erase Only" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Write Only" name="VAL_0x02" value="0x02"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Timer/Counter, 16-bit" name="TC16">
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
||||
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
||||
<bitfield caption="Clock Select1 bis" mask="0x07" name="CS" lsb="10"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
|
||||
<register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC0">
|
||||
<register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="WGM00"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0 Control Register" name="TCCR0B" offset="0x45" size="1">
|
||||
<bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
|
||||
<bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
|
||||
<register caption="Output compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
|
||||
<bitfield caption="Output Compare Interrupt Enable" mask="0x04" name="OCIE0B"/>
|
||||
<bitfield caption="Output Compare Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter Interrupt Flag Register" mask="0x08" name="ICF0"/>
|
||||
<bitfield caption="Output Compare Flag" mask="0x04" name="OCF0B"/>
|
||||
<bitfield caption="Output Compare Flag" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE4" size="1">
|
||||
<bitfield
|
||||
caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
|
||||
mask="0x80" name="CADEN"/>
|
||||
<bitfield caption="" mask="0x40" name="CADPOL"/>
|
||||
<bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
|
||||
<bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
|
||||
<bitfield
|
||||
caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
|
||||
mask="0x06" name="CADSI"/>
|
||||
<bitfield
|
||||
caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
|
||||
mask="0x01" name="CADSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE5" size="1">
|
||||
<bitfield caption="" mask="0x40" name="CADACIE"/>
|
||||
<bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
|
||||
<bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
|
||||
<bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE8" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="CC-ADC Regular Current" name="CADRC" offset="0xE6" size="1" mask="0xFF"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
|
||||
<bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
|
||||
<bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
</modules>
|
||||
</target-description-file>
|
||||
@@ -1,977 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<target-description-file>
|
||||
<variants>
|
||||
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
|
||||
</variants>
|
||||
<device name="ATmega16HVB" architecture="AVR8" family="megaAVR">
|
||||
<address-spaces>
|
||||
<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
|
||||
<memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
|
||||
pagesize="0x80"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
|
||||
<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
|
||||
<memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
|
||||
<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
|
||||
<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
|
||||
<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
|
||||
<memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
|
||||
<memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
|
||||
pagesize="0x04"/>
|
||||
</address-space>
|
||||
<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
|
||||
</address-spaces>
|
||||
<peripherals>
|
||||
<module name="ADC">
|
||||
<instance name="ADC" caption="Analog-to-Digital Converter">
|
||||
<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
|
||||
caption="Analog-to-Digital Converter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="WDT">
|
||||
<instance name="WDT" caption="Watchdog Timer">
|
||||
<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
|
||||
caption="Watchdog Timer"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FET">
|
||||
<instance name="FET" caption="FET Control">
|
||||
<register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
|
||||
caption="FET Control"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="SPI">
|
||||
<instance name="SPI" caption="Serial Peripheral Interface">
|
||||
<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
|
||||
caption="Serial Peripheral Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EEPROM">
|
||||
<instance name="EEPROM" caption="EEPROM">
|
||||
<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
|
||||
caption="EEPROM"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="COULOMB_COUNTER">
|
||||
<instance name="COULOMB_COUNTER" caption="Coulomb Counter">
|
||||
<register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
|
||||
address-space="data" caption="Coulomb Counter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TWI">
|
||||
<instance name="TWI" caption="Two Wire Serial Interface">
|
||||
<register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
|
||||
caption="Two Wire Serial Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EXINT">
|
||||
<instance name="EXINT" caption="External Interrupts">
|
||||
<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
|
||||
caption="External Interrupts"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TC16">
|
||||
<instance name="TC1" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
<instance name="TC0" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CELL_BALANCING">
|
||||
<instance name="CELL_BALANCING" caption="Cell Balancing">
|
||||
<register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
|
||||
address-space="data" caption="Cell Balancing"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BATTERY_PROTECTION">
|
||||
<instance name="BATTERY_PROTECTION" caption="Battery Protection">
|
||||
<register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
|
||||
address-space="data" caption="Battery Protection"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CHARGER_DETECT">
|
||||
<instance name="CHARGER_DETECT" caption="Charger Detect">
|
||||
<register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
|
||||
address-space="data" caption="Charger Detect"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="VOLTAGE_REGULATOR">
|
||||
<instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
|
||||
<register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
|
||||
address-space="data" caption="Voltage Regulator"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BANDGAP">
|
||||
<instance name="BANDGAP" caption="Bandgap">
|
||||
<register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
|
||||
caption="Bandgap"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CPU">
|
||||
<instance name="CPU" caption="CPU Registers">
|
||||
<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
|
||||
caption="CPU Registers"/>
|
||||
<parameters>
|
||||
<param name="CORE_VERSION" value="V2E"/>
|
||||
</parameters>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="PORT">
|
||||
<instance name="PORTA" caption="I/O Port">
|
||||
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTB" caption="I/O Port">
|
||||
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTC" caption="I/O Port">
|
||||
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BOOT_LOAD">
|
||||
<instance name="BOOT_LOAD" caption="Bootloader">
|
||||
<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
|
||||
caption="Bootloader"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FUSE">
|
||||
<instance name="FUSE" caption="Fuses">
|
||||
<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
|
||||
caption="Fuses"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="LOCKBIT">
|
||||
<instance name="LOCKBIT" caption="Lockbits">
|
||||
<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
|
||||
caption="Lockbits"/>
|
||||
</instance>
|
||||
</module>
|
||||
</peripherals>
|
||||
<interrupts>
|
||||
<interrupt index="0" name="RESET"
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
<interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
|
||||
<interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
|
||||
<interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
|
||||
<interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
|
||||
<interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
|
||||
<interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
|
||||
<interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
|
||||
<interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
|
||||
<interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
|
||||
<interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
|
||||
<interrupt index="11" name="CHDET" caption="Charger Detect"/>
|
||||
<interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
|
||||
<interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
|
||||
<interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
|
||||
<interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
|
||||
<interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
|
||||
<interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
|
||||
<interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
|
||||
<interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
|
||||
<interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
|
||||
<interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
|
||||
<interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
|
||||
<interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
|
||||
<interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
|
||||
<interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
|
||||
<interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
|
||||
<interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
|
||||
<interrupt index="28" name="SPM" caption="SPM Ready"/>
|
||||
</interrupts>
|
||||
<interfaces>
|
||||
<interface name="ISP" type="isp"/>
|
||||
<interface name="HVPP" type="hvpp"/>
|
||||
<interface name="debugWIRE" type="dw"/>
|
||||
</interfaces>
|
||||
<property-groups>
|
||||
<property-group name="SIGNATURES">
|
||||
<property name="JTAGID" value="0x940D"/>
|
||||
<property name="SIGNATURE0" value="0x1e"/>
|
||||
<property name="SIGNATURE1" value="0x94"/>
|
||||
<property name="SIGNATURE2" value="0x0d"/>
|
||||
</property-group>
|
||||
<property-group name="OCD">
|
||||
<property name="OCD_REVISION" value="1"/>
|
||||
<property name="OCD_DATAREG" value="0x31"/>
|
||||
<property name="PROGBASE" value="0x0000"/>
|
||||
</property-group>
|
||||
<property-group name="JTAG_INTERFACE">
|
||||
<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="45"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="10"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="10"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="PP_INTERFACE">
|
||||
<property name="PpControlStack"
|
||||
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
||||
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_latchCycles" value="6"/>
|
||||
<property name="PpEnterProgMode_toggleVtg" value="0"/>
|
||||
<property name="PpEnterProgMode_powerOffDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayMs" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayUs" value="0"/>
|
||||
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
||||
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
||||
<property name="PpChipErase_pulseWidth" value="0"/>
|
||||
<property name="PpChipErase_pollTimeout" value="10"/>
|
||||
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
||||
<property name="PpProgramFlash_mode" value="0x0F"/>
|
||||
<property name="PpProgramFlash_blockSize" value="256"/>
|
||||
<property name="PpReadFlash_blockSize" value="256"/>
|
||||
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="PpProgramEeprom_mode" value="0x05"/>
|
||||
<property name="PpProgramEeprom_blockSize" value="256"/>
|
||||
<property name="PpReadEeprom_blockSize" value="256"/>
|
||||
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
||||
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
||||
<property name="PpProgramLock_pulseWidth" value="0"/>
|
||||
<property name="PpProgramLock_pollTimeout" value="5"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE_STK600">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="45"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="6"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="10"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="PP_INTERFACE_STK600">
|
||||
<property name="PpControlStack"
|
||||
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
||||
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_latchCycles" value="6"/>
|
||||
<property name="PpEnterProgMode_toggleVtg" value="1"/>
|
||||
<property name="PpEnterProgMode_powerOffDelay" value="20"/>
|
||||
<property name="PpEnterProgMode_resetDelayMs" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayUs" value="50"/>
|
||||
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
||||
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
||||
<property name="PpChipErase_pulseWidth" value="0"/>
|
||||
<property name="PpChipErase_pollTimeout" value="10"/>
|
||||
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
||||
<property name="PpProgramFlash_mode" value="0x0F"/>
|
||||
<property name="PpProgramFlash_blockSize" value="256"/>
|
||||
<property name="PpReadFlash_blockSize" value="256"/>
|
||||
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="PpProgramEeprom_mode" value="0x05"/>
|
||||
<property name="PpProgramEeprom_blockSize" value="256"/>
|
||||
<property name="PpReadEeprom_blockSize" value="256"/>
|
||||
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
||||
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
||||
<property name="PpProgramLock_pulseWidth" value="0"/>
|
||||
<property name="PpProgramLock_pollTimeout" value="5"/>
|
||||
</property-group>
|
||||
</property-groups>
|
||||
</device>
|
||||
<modules>
|
||||
<module caption="Fuses" name="FUSE">
|
||||
<register-group caption="Fuses" name="FUSE">
|
||||
<register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
|
||||
<bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
|
||||
<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
|
||||
<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
|
||||
<bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
|
||||
<bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
|
||||
</register>
|
||||
<register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
|
||||
<bitfield caption="Clock Divide mode" mask="0x10" name="CKDIV8"/>
|
||||
<bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
|
||||
<bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
|
||||
<bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_SUT">
|
||||
<value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
|
||||
<value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
|
||||
<value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
|
||||
<value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
|
||||
<value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
|
||||
<value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
|
||||
<value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
|
||||
<value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_OSCSEL">
|
||||
<value caption="Default" name="DEFAULT" value="0x01"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BOOTSZ">
|
||||
<value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
|
||||
<value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
|
||||
<value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
|
||||
<value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Lockbits" name="LOCKBIT">
|
||||
<register-group caption="Lockbits" name="LOCKBIT">
|
||||
<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
|
||||
<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_LB">
|
||||
<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
|
||||
<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
|
||||
<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB">
|
||||
<value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB2">
|
||||
<value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register-group caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
|
||||
</register>
|
||||
<register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF">
|
||||
<bitfield caption="VADC Data bits" mask="0x0FFF" name="VADC"/>
|
||||
</register>
|
||||
<register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
|
||||
<bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
<register-group caption="Watchdog Timer" name="WDT">
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
|
||||
<value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
|
||||
<value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
|
||||
<value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="FET Control" name="FET">
|
||||
<register-group caption="FET Control" name="FET">
|
||||
<register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
|
||||
<bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
|
||||
<bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
|
||||
<bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
|
||||
<bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Serial Peripheral Interface" name="SPI">
|
||||
<register-group caption="Serial Peripheral Interface" name="SPI">
|
||||
<register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
|
||||
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
||||
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
||||
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
||||
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
||||
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
||||
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
||||
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
||||
</register>
|
||||
<register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
|
||||
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
||||
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
||||
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
||||
</register>
|
||||
<register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw="">
|
||||
<bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
||||
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
|
||||
<bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
|
||||
</register>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
|
||||
<bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
|
||||
</register>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
<bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
|
||||
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
|
||||
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="EEP_MODE">
|
||||
<value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Erase Only" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Write Only" name="VAL_0x02" value="0x02"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
|
||||
<bitfield
|
||||
caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
|
||||
mask="0x80" name="CADEN"/>
|
||||
<bitfield caption="" mask="0x40" name="CADPOL"/>
|
||||
<bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
|
||||
<bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
|
||||
<bitfield
|
||||
caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
|
||||
mask="0x06" name="CADSI"/>
|
||||
<bitfield
|
||||
caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
|
||||
mask="0x01" name="CADSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
|
||||
<bitfield caption="" mask="0x40" name="CADACIE"/>
|
||||
<bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
|
||||
<bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
|
||||
<bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
|
||||
<bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF">
|
||||
<bitfield caption="CC-ADC Instantaneous Current" mask="0xFFFF" name="CADIC"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="24"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="16"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFC" name="CADAC" lsb="10"/>
|
||||
<bitfield caption="ADC accumulate current bits" mask="0x03" name="CADAC0" lsb="8"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC0"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF">
|
||||
<bitfield caption="CC-ADC Regular Charge Current" mask="0xFF" name="CADRCC"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF">
|
||||
<bitfield caption="CC-ADC Regular Discharge Current" mask="0xFF" name="CADRDC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Two Wire Serial Interface" name="TWI">
|
||||
<register-group caption="Two Wire Serial Interface" name="TWI">
|
||||
<register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
|
||||
<bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
|
||||
values="COMM_TW_BUS_TIMEOUT"/>
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
|
||||
</register>
|
||||
<register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
|
||||
<bitfield caption="" mask="0xFE" name="TWAM"/>
|
||||
</register>
|
||||
<register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
|
||||
<bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
|
||||
</register>
|
||||
<register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
|
||||
<bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
|
||||
<bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
|
||||
<bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
|
||||
<bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
|
||||
<bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
|
||||
<bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
|
||||
<bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
|
||||
</register>
|
||||
<register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
|
||||
<bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
|
||||
<bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
|
||||
</register>
|
||||
<register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
|
||||
<bitfield caption="TWI Data Bits" mask="0xFF" name="TWD"/>
|
||||
</register>
|
||||
<register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
|
||||
<bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
|
||||
<bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_TW_BUS_TIMEOUT">
|
||||
<value caption="250ms" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="500ms" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="1000ms" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="2000ms" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="COMM_TWI_PRESACLE">
|
||||
<value caption="1" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="4" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="16" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="64" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="External Interrupts" name="EXINT">
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
||||
<bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
|
||||
<bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
|
||||
<bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
|
||||
<bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="4"/>
|
||||
</register>
|
||||
<register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F">
|
||||
<bitfield caption="Pin Change Enable Mask" mask="0x0F" name="PCINT"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
||||
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Timer/Counter, 16-bit" name="TC16">
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
||||
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
||||
<bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 1 A bits" mask="0xFF" name="OCR1A"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 1 B bits" mask="0xFF" name="OCR1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC0">
|
||||
<register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
|
||||
<bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
|
||||
<bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer Counter 0 bits" mask="0xFFFF" name="TCNT0"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 0 A bits" mask="0xFF" name="OCR0A"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 0 B bits" mask="0xFF" name="OCR0B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Cell Balancing" name="CELL_BALANCING">
|
||||
<register-group caption="Cell Balancing" name="CELL_BALANCING">
|
||||
<register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
|
||||
<bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register-group caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
|
||||
<bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
|
||||
<bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
|
||||
<bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
|
||||
<bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
|
||||
<bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
|
||||
<bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
|
||||
<bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
|
||||
size="1" mask="0x3F">
|
||||
<bitfield caption="Battery Protection Short-current Timing bits" mask="0x3F" name="HCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
|
||||
mask="0x3F">
|
||||
<bitfield caption="Battery Protection Over-current Timing bits" mask="0x3F" name="OCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
|
||||
size="1" mask="0x7F">
|
||||
<bitfield caption="Battery Protection Short-current Timing bits" mask="0x7F" name="SCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
|
||||
offset="0xF9" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Charge-High-current Detection Level bits" mask="0xFF"
|
||||
name="CHCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
|
||||
offset="0xF8" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Discharge-High-current Detection Level bits" mask="0xFF"
|
||||
name="DHCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
|
||||
offset="0xF7" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Charge-Over-current Detection Level bits" mask="0xFF"
|
||||
name="COCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
|
||||
offset="0xF6" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Discharge-Over-current Detection Level bits" mask="0xFF"
|
||||
name="DOCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
|
||||
size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Short-Circuit Detection Level Register bits" mask="0xFF"
|
||||
name="SCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
|
||||
name="DOCIF"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
|
||||
name="COCIF"/>
|
||||
<bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
|
||||
<bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
|
||||
name="DOCIE"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
|
||||
name="COCIE"/>
|
||||
<bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
|
||||
name="DHCIE"/>
|
||||
<bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Charger Detect" name="CHARGER_DETECT">
|
||||
<register-group caption="Charger Detect" name="CHARGER_DETECT">
|
||||
<register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
|
||||
<bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
|
||||
<bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
|
||||
<bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
|
||||
<bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
|
||||
<bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
|
||||
<bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
|
||||
<bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bandgap" name="BANDGAP">
|
||||
<register-group caption="Bandgap" name="BANDGAP">
|
||||
<register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
|
||||
<bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
|
||||
mask="0xFF">
|
||||
<bitfield caption="Bandgap Calibration of Resistor Ladder Bits" mask="0xFF" name="BGCR"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
|
||||
<bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="CPU Registers" name="CPU">
|
||||
<register-group caption="CPU Registers" name="CPU">
|
||||
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
||||
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
||||
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
||||
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
||||
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
||||
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
||||
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
||||
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
||||
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
|
||||
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
||||
<bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
|
||||
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
||||
<bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
|
||||
<bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
|
||||
</register>
|
||||
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
|
||||
<bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF">
|
||||
<bitfield caption="Fast Oscillator Calibration Value" mask="0xFF" name="FCAL"/>
|
||||
</register>
|
||||
<register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
|
||||
offset="0x37" size="1" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
|
||||
</register>
|
||||
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
||||
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR2"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR1"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR0"/>
|
||||
</register>
|
||||
<register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x02" name="PA1DID"/>
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x01" name="PA0DID"/>
|
||||
</register>
|
||||
<register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
|
||||
<bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
|
||||
<bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
|
||||
<bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
|
||||
<bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CPU_SLEEP_MODE_3BITS">
|
||||
<value caption="Idle" name="IDLE" value="0x00"/>
|
||||
<value caption="ADC" name="ADC" value="0x01"/>
|
||||
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Power Save" name="PSAVE" value="0x03"/>
|
||||
<value caption="Power Off" name="POFF" value="0x04"/>
|
||||
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Reserved" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="I/O Port" name="PORT">
|
||||
<register-group caption="I/O Port" name="PORTA">
|
||||
<register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
<register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
|
||||
ocd-rw="R"/>
|
||||
<register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTB">
|
||||
<register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTC">
|
||||
<register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
|
||||
<register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bootloader" name="BOOT_LOAD">
|
||||
<register-group caption="Bootloader" name="BOOT_LOAD">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1">
|
||||
<bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
|
||||
<bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
|
||||
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
||||
<bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
|
||||
<bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
||||
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
</modules>
|
||||
</target-description-file>
|
||||
@@ -1,977 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<target-description-file>
|
||||
<variants>
|
||||
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
|
||||
</variants>
|
||||
<device name="ATmega16HVBrevB" architecture="AVR8" family="megaAVR">
|
||||
<address-spaces>
|
||||
<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
|
||||
<memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
|
||||
pagesize="0x80"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
|
||||
<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
|
||||
<memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
|
||||
<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
|
||||
<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
|
||||
<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
|
||||
<memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
|
||||
<memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
|
||||
pagesize="0x04"/>
|
||||
</address-space>
|
||||
<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
|
||||
</address-spaces>
|
||||
<peripherals>
|
||||
<module name="ADC">
|
||||
<instance name="ADC" caption="Analog-to-Digital Converter">
|
||||
<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
|
||||
caption="Analog-to-Digital Converter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="WDT">
|
||||
<instance name="WDT" caption="Watchdog Timer">
|
||||
<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
|
||||
caption="Watchdog Timer"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FET">
|
||||
<instance name="FET" caption="FET Control">
|
||||
<register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
|
||||
caption="FET Control"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="SPI">
|
||||
<instance name="SPI" caption="Serial Peripheral Interface">
|
||||
<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
|
||||
caption="Serial Peripheral Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EEPROM">
|
||||
<instance name="EEPROM" caption="EEPROM">
|
||||
<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
|
||||
caption="EEPROM"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="COULOMB_COUNTER">
|
||||
<instance name="COULOMB_COUNTER" caption="Coulomb Counter">
|
||||
<register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
|
||||
address-space="data" caption="Coulomb Counter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TWI">
|
||||
<instance name="TWI" caption="Two Wire Serial Interface">
|
||||
<register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
|
||||
caption="Two Wire Serial Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EXINT">
|
||||
<instance name="EXINT" caption="External Interrupts">
|
||||
<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
|
||||
caption="External Interrupts"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TC16">
|
||||
<instance name="TC1" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
<instance name="TC0" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CELL_BALANCING">
|
||||
<instance name="CELL_BALANCING" caption="Cell Balancing">
|
||||
<register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
|
||||
address-space="data" caption="Cell Balancing"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BATTERY_PROTECTION">
|
||||
<instance name="BATTERY_PROTECTION" caption="Battery Protection">
|
||||
<register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
|
||||
address-space="data" caption="Battery Protection"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CHARGER_DETECT">
|
||||
<instance name="CHARGER_DETECT" caption="Charger Detect">
|
||||
<register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
|
||||
address-space="data" caption="Charger Detect"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="VOLTAGE_REGULATOR">
|
||||
<instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
|
||||
<register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
|
||||
address-space="data" caption="Voltage Regulator"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BANDGAP">
|
||||
<instance name="BANDGAP" caption="Bandgap">
|
||||
<register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
|
||||
caption="Bandgap"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CPU">
|
||||
<instance name="CPU" caption="CPU Registers">
|
||||
<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
|
||||
caption="CPU Registers"/>
|
||||
<parameters>
|
||||
<param name="CORE_VERSION" value="V2E"/>
|
||||
</parameters>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="PORT">
|
||||
<instance name="PORTA" caption="I/O Port">
|
||||
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTB" caption="I/O Port">
|
||||
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTC" caption="I/O Port">
|
||||
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BOOT_LOAD">
|
||||
<instance name="BOOT_LOAD" caption="Bootloader">
|
||||
<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
|
||||
caption="Bootloader"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FUSE">
|
||||
<instance name="FUSE" caption="Fuses">
|
||||
<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
|
||||
caption="Fuses"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="LOCKBIT">
|
||||
<instance name="LOCKBIT" caption="Lockbits">
|
||||
<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
|
||||
caption="Lockbits"/>
|
||||
</instance>
|
||||
</module>
|
||||
</peripherals>
|
||||
<interrupts>
|
||||
<interrupt index="0" name="RESET"
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
<interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
|
||||
<interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
|
||||
<interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
|
||||
<interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
|
||||
<interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
|
||||
<interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
|
||||
<interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
|
||||
<interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
|
||||
<interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
|
||||
<interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
|
||||
<interrupt index="11" name="CHDET" caption="Charger Detect"/>
|
||||
<interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
|
||||
<interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
|
||||
<interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
|
||||
<interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
|
||||
<interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
|
||||
<interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
|
||||
<interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
|
||||
<interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
|
||||
<interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
|
||||
<interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
|
||||
<interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
|
||||
<interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
|
||||
<interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
|
||||
<interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
|
||||
<interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
|
||||
<interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
|
||||
<interrupt index="28" name="SPM" caption="SPM Ready"/>
|
||||
</interrupts>
|
||||
<interfaces>
|
||||
<interface name="ISP" type="isp"/>
|
||||
<interface name="HVPP" type="hvpp"/>
|
||||
<interface name="debugWIRE" type="dw"/>
|
||||
</interfaces>
|
||||
<property-groups>
|
||||
<property-group name="SIGNATURES">
|
||||
<property name="JTAGID" value="0x940D"/>
|
||||
<property name="SIGNATURE0" value="0x1e"/>
|
||||
<property name="SIGNATURE1" value="0x94"/>
|
||||
<property name="SIGNATURE2" value="0x0d"/>
|
||||
</property-group>
|
||||
<property-group name="OCD">
|
||||
<property name="OCD_REVISION" value="1"/>
|
||||
<property name="OCD_DATAREG" value="0x31"/>
|
||||
<property name="PROGBASE" value="0x0000"/>
|
||||
</property-group>
|
||||
<property-group name="JTAG_INTERFACE">
|
||||
<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="45"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="10"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="10"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="PP_INTERFACE">
|
||||
<property name="PpControlStack"
|
||||
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
||||
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_latchCycles" value="6"/>
|
||||
<property name="PpEnterProgMode_toggleVtg" value="0"/>
|
||||
<property name="PpEnterProgMode_powerOffDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayMs" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayUs" value="0"/>
|
||||
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
||||
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
||||
<property name="PpChipErase_pulseWidth" value="0"/>
|
||||
<property name="PpChipErase_pollTimeout" value="10"/>
|
||||
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
||||
<property name="PpProgramFlash_mode" value="0x0F"/>
|
||||
<property name="PpProgramFlash_blockSize" value="256"/>
|
||||
<property name="PpReadFlash_blockSize" value="256"/>
|
||||
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="PpProgramEeprom_mode" value="0x05"/>
|
||||
<property name="PpProgramEeprom_blockSize" value="256"/>
|
||||
<property name="PpReadEeprom_blockSize" value="256"/>
|
||||
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
||||
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
||||
<property name="PpProgramLock_pulseWidth" value="0"/>
|
||||
<property name="PpProgramLock_pollTimeout" value="5"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE_STK600">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="45"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="6"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="10"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="PP_INTERFACE_STK600">
|
||||
<property name="PpControlStack"
|
||||
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
||||
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_latchCycles" value="6"/>
|
||||
<property name="PpEnterProgMode_toggleVtg" value="1"/>
|
||||
<property name="PpEnterProgMode_powerOffDelay" value="20"/>
|
||||
<property name="PpEnterProgMode_resetDelayMs" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayUs" value="50"/>
|
||||
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
||||
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
||||
<property name="PpChipErase_pulseWidth" value="0"/>
|
||||
<property name="PpChipErase_pollTimeout" value="10"/>
|
||||
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
||||
<property name="PpProgramFlash_mode" value="0x0F"/>
|
||||
<property name="PpProgramFlash_blockSize" value="256"/>
|
||||
<property name="PpReadFlash_blockSize" value="256"/>
|
||||
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="PpProgramEeprom_mode" value="0x05"/>
|
||||
<property name="PpProgramEeprom_blockSize" value="256"/>
|
||||
<property name="PpReadEeprom_blockSize" value="256"/>
|
||||
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
||||
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
||||
<property name="PpProgramLock_pulseWidth" value="0"/>
|
||||
<property name="PpProgramLock_pollTimeout" value="5"/>
|
||||
</property-group>
|
||||
</property-groups>
|
||||
</device>
|
||||
<modules>
|
||||
<module caption="Fuses" name="FUSE">
|
||||
<register-group caption="Fuses" name="FUSE">
|
||||
<register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
|
||||
<bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
|
||||
<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
|
||||
<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
|
||||
<bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
|
||||
<bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
|
||||
</register>
|
||||
<register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
|
||||
<bitfield caption="DUVR mode on" mask="0x10" name="DUVRDINIT"/>
|
||||
<bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
|
||||
<bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
|
||||
<bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_SUT">
|
||||
<value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
|
||||
<value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
|
||||
<value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
|
||||
<value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
|
||||
<value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
|
||||
<value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
|
||||
<value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
|
||||
<value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_OSCSEL">
|
||||
<value caption="Default" name="DEFAULT" value="0x01"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BOOTSZ">
|
||||
<value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
|
||||
<value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
|
||||
<value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
|
||||
<value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Lockbits" name="LOCKBIT">
|
||||
<register-group caption="Lockbits" name="LOCKBIT">
|
||||
<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
|
||||
<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_LB">
|
||||
<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
|
||||
<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
|
||||
<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB">
|
||||
<value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB2">
|
||||
<value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register-group caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
|
||||
</register>
|
||||
<register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF">
|
||||
<bitfield caption="VADC Data bits" mask="0x0FFF" name="VADC"/>
|
||||
</register>
|
||||
<register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
|
||||
<bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
<register-group caption="Watchdog Timer" name="WDT">
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
|
||||
<value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
|
||||
<value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
|
||||
<value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="FET Control" name="FET">
|
||||
<register-group caption="FET Control" name="FET">
|
||||
<register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
|
||||
<bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
|
||||
<bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
|
||||
<bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
|
||||
<bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Serial Peripheral Interface" name="SPI">
|
||||
<register-group caption="Serial Peripheral Interface" name="SPI">
|
||||
<register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
|
||||
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
||||
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
||||
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
||||
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
||||
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
||||
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
||||
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
||||
</register>
|
||||
<register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
|
||||
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
||||
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
||||
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
||||
</register>
|
||||
<register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw="">
|
||||
<bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
||||
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
|
||||
<bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
|
||||
</register>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
|
||||
<bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
|
||||
</register>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
<bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
|
||||
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
|
||||
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="EEP_MODE">
|
||||
<value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Erase Only" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Write Only" name="VAL_0x02" value="0x02"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
|
||||
<bitfield
|
||||
caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
|
||||
mask="0x80" name="CADEN"/>
|
||||
<bitfield caption="" mask="0x40" name="CADPOL"/>
|
||||
<bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
|
||||
<bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
|
||||
<bitfield
|
||||
caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
|
||||
mask="0x06" name="CADSI"/>
|
||||
<bitfield
|
||||
caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
|
||||
mask="0x01" name="CADSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
|
||||
<bitfield caption="" mask="0x40" name="CADACIE"/>
|
||||
<bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
|
||||
<bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
|
||||
<bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
|
||||
<bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF">
|
||||
<bitfield caption="CC-ADC Instantaneous Current" mask="0xFFFF" name="CADIC"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="24"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="16"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFC" name="CADAC" lsb="10"/>
|
||||
<bitfield caption="ADC accumulate current bits" mask="0x03" name="CADAC0" lsb="8"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC0"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF">
|
||||
<bitfield caption="CC-ADC Regular Charge Current" mask="0xFF" name="CADRCC"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF">
|
||||
<bitfield caption="CC-ADC Regular Discharge Current" mask="0xFF" name="CADRDC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Two Wire Serial Interface" name="TWI">
|
||||
<register-group caption="Two Wire Serial Interface" name="TWI">
|
||||
<register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
|
||||
<bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
|
||||
values="COMM_TW_BUS_TIMEOUT"/>
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
|
||||
</register>
|
||||
<register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
|
||||
<bitfield caption="" mask="0xFE" name="TWAM"/>
|
||||
</register>
|
||||
<register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
|
||||
<bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
|
||||
</register>
|
||||
<register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
|
||||
<bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
|
||||
<bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
|
||||
<bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
|
||||
<bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
|
||||
<bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
|
||||
<bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
|
||||
<bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
|
||||
</register>
|
||||
<register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
|
||||
<bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
|
||||
<bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
|
||||
</register>
|
||||
<register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
|
||||
<bitfield caption="TWI Data Bits" mask="0xFF" name="TWD"/>
|
||||
</register>
|
||||
<register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
|
||||
<bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
|
||||
<bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_TW_BUS_TIMEOUT">
|
||||
<value caption="250ms" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="500ms" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="1000ms" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="2000ms" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="COMM_TWI_PRESACLE">
|
||||
<value caption="1" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="4" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="16" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="64" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="External Interrupts" name="EXINT">
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
||||
<bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
|
||||
<bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
|
||||
<bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
|
||||
<bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="4"/>
|
||||
</register>
|
||||
<register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F">
|
||||
<bitfield caption="Pin Change Enable Mask" mask="0x0F" name="PCINT"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
||||
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Timer/Counter, 16-bit" name="TC16">
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
||||
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
||||
<bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 1 A bits" mask="0xFF" name="OCR1A"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 1 B bits" mask="0xFF" name="OCR1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC0">
|
||||
<register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
|
||||
<bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
|
||||
<bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer Counter 0 bits" mask="0xFFFF" name="TCNT0"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register 0A" name="OCR0A" offset="0x48" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 0 A bits" mask="0xFF" name="OCR0A"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 0 B bits" mask="0xFF" name="OCR0B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Cell Balancing" name="CELL_BALANCING">
|
||||
<register-group caption="Cell Balancing" name="CELL_BALANCING">
|
||||
<register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
|
||||
<bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register-group caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
|
||||
<bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
|
||||
<bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
|
||||
<bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
|
||||
<bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
|
||||
<bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
|
||||
<bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
|
||||
<bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
|
||||
size="1" mask="0x3F">
|
||||
<bitfield caption="Battery Protection Short-current Timing bits" mask="0x3F" name="HCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
|
||||
mask="0x3F">
|
||||
<bitfield caption="Battery Protection Over-current Timing bits" mask="0x3F" name="OCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
|
||||
size="1" mask="0x7F">
|
||||
<bitfield caption="Battery Protection Short-current Timing bits" mask="0x7F" name="SCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
|
||||
offset="0xF9" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Charge-High-current Detection Level bits" mask="0xFF"
|
||||
name="CHCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
|
||||
offset="0xF8" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Discharge-High-current Detection Level bits" mask="0xFF"
|
||||
name="DHCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
|
||||
offset="0xF7" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Charge-Over-current Detection Level bits" mask="0xFF"
|
||||
name="COCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
|
||||
offset="0xF6" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Discharge-Over-current Detection Level bits" mask="0xFF"
|
||||
name="DOCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
|
||||
size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Short-Circuit Detection Level Register bits" mask="0xFF"
|
||||
name="SCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
|
||||
name="DOCIF"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
|
||||
name="COCIF"/>
|
||||
<bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
|
||||
<bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
|
||||
name="DOCIE"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
|
||||
name="COCIE"/>
|
||||
<bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
|
||||
name="DHCIE"/>
|
||||
<bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Charger Detect" name="CHARGER_DETECT">
|
||||
<register-group caption="Charger Detect" name="CHARGER_DETECT">
|
||||
<register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
|
||||
<bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
|
||||
<bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
|
||||
<bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
|
||||
<bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
|
||||
<bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
|
||||
<bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
|
||||
<bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bandgap" name="BANDGAP">
|
||||
<register-group caption="Bandgap" name="BANDGAP">
|
||||
<register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
|
||||
<bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
|
||||
mask="0xFF">
|
||||
<bitfield caption="Bandgap Calibration of Resistor Ladder Bits" mask="0xFF" name="BGCR"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
|
||||
<bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="CPU Registers" name="CPU">
|
||||
<register-group caption="CPU Registers" name="CPU">
|
||||
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
||||
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
||||
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
||||
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
||||
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
||||
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
||||
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
||||
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
||||
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
|
||||
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
||||
<bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
|
||||
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
||||
<bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
|
||||
<bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
|
||||
</register>
|
||||
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
|
||||
<bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF">
|
||||
<bitfield caption="Fast Oscillator Calibration Value" mask="0xFF" name="FCAL"/>
|
||||
</register>
|
||||
<register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
|
||||
offset="0x37" size="1" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
|
||||
</register>
|
||||
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
||||
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR2"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR1"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR0"/>
|
||||
</register>
|
||||
<register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x02" name="PA1DID"/>
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x01" name="PA0DID"/>
|
||||
</register>
|
||||
<register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
|
||||
<bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
|
||||
<bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
|
||||
<bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
|
||||
<bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CPU_SLEEP_MODE_3BITS">
|
||||
<value caption="Idle" name="IDLE" value="0x00"/>
|
||||
<value caption="ADC" name="ADC" value="0x01"/>
|
||||
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Power Save" name="PSAVE" value="0x03"/>
|
||||
<value caption="Power Off" name="POFF" value="0x04"/>
|
||||
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Reserved" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="I/O Port" name="PORT">
|
||||
<register-group caption="I/O Port" name="PORTA">
|
||||
<register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
<register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
|
||||
ocd-rw="R"/>
|
||||
<register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTB">
|
||||
<register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTC">
|
||||
<register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
|
||||
<register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bootloader" name="BOOT_LOAD">
|
||||
<register-group caption="Bootloader" name="BOOT_LOAD">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1">
|
||||
<bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
|
||||
<bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
|
||||
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
||||
<bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
|
||||
<bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
||||
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
</modules>
|
||||
</target-description-file>
|
||||
@@ -1,977 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<target-description-file>
|
||||
<variants>
|
||||
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
|
||||
</variants>
|
||||
<device name="ATmega32HVB" architecture="AVR8" family="megaAVR">
|
||||
<address-spaces>
|
||||
<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
|
||||
<memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
|
||||
pagesize="0x80"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
|
||||
<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
|
||||
<memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
|
||||
<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
|
||||
<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
|
||||
<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
|
||||
<memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
|
||||
<memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
|
||||
pagesize="0x04"/>
|
||||
</address-space>
|
||||
<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
|
||||
</address-spaces>
|
||||
<peripherals>
|
||||
<module name="ADC">
|
||||
<instance name="ADC" caption="Analog-to-Digital Converter">
|
||||
<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
|
||||
caption="Analog-to-Digital Converter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="WDT">
|
||||
<instance name="WDT" caption="Watchdog Timer">
|
||||
<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
|
||||
caption="Watchdog Timer"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FET">
|
||||
<instance name="FET" caption="FET Control">
|
||||
<register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
|
||||
caption="FET Control"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="SPI">
|
||||
<instance name="SPI" caption="Serial Peripheral Interface">
|
||||
<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
|
||||
caption="Serial Peripheral Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EEPROM">
|
||||
<instance name="EEPROM" caption="EEPROM">
|
||||
<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
|
||||
caption="EEPROM"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="COULOMB_COUNTER">
|
||||
<instance name="COULOMB_COUNTER" caption="Coulomb Counter">
|
||||
<register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
|
||||
address-space="data" caption="Coulomb Counter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TWI">
|
||||
<instance name="TWI" caption="Two Wire Serial Interface">
|
||||
<register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
|
||||
caption="Two Wire Serial Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EXINT">
|
||||
<instance name="EXINT" caption="External Interrupts">
|
||||
<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
|
||||
caption="External Interrupts"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TC16">
|
||||
<instance name="TC1" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
<instance name="TC0" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CELL_BALANCING">
|
||||
<instance name="CELL_BALANCING" caption="Cell Balancing">
|
||||
<register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
|
||||
address-space="data" caption="Cell Balancing"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BATTERY_PROTECTION">
|
||||
<instance name="BATTERY_PROTECTION" caption="Battery Protection">
|
||||
<register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
|
||||
address-space="data" caption="Battery Protection"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CHARGER_DETECT">
|
||||
<instance name="CHARGER_DETECT" caption="Charger Detect">
|
||||
<register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
|
||||
address-space="data" caption="Charger Detect"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="VOLTAGE_REGULATOR">
|
||||
<instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
|
||||
<register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
|
||||
address-space="data" caption="Voltage Regulator"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BANDGAP">
|
||||
<instance name="BANDGAP" caption="Bandgap">
|
||||
<register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
|
||||
caption="Bandgap"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CPU">
|
||||
<instance name="CPU" caption="CPU Registers">
|
||||
<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
|
||||
caption="CPU Registers"/>
|
||||
<parameters>
|
||||
<param name="CORE_VERSION" value="V2E"/>
|
||||
</parameters>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="PORT">
|
||||
<instance name="PORTA" caption="I/O Port">
|
||||
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTB" caption="I/O Port">
|
||||
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTC" caption="I/O Port">
|
||||
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BOOT_LOAD">
|
||||
<instance name="BOOT_LOAD" caption="Bootloader">
|
||||
<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
|
||||
caption="Bootloader"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FUSE">
|
||||
<instance name="FUSE" caption="Fuses">
|
||||
<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
|
||||
caption="Fuses"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="LOCKBIT">
|
||||
<instance name="LOCKBIT" caption="Lockbits">
|
||||
<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
|
||||
caption="Lockbits"/>
|
||||
</instance>
|
||||
</module>
|
||||
</peripherals>
|
||||
<interrupts>
|
||||
<interrupt index="0" name="RESET"
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
<interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
|
||||
<interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
|
||||
<interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
|
||||
<interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
|
||||
<interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
|
||||
<interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
|
||||
<interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
|
||||
<interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
|
||||
<interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
|
||||
<interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
|
||||
<interrupt index="11" name="CHDET" caption="Charger Detect"/>
|
||||
<interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
|
||||
<interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
|
||||
<interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
|
||||
<interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
|
||||
<interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
|
||||
<interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
|
||||
<interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
|
||||
<interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
|
||||
<interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
|
||||
<interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
|
||||
<interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
|
||||
<interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
|
||||
<interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
|
||||
<interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
|
||||
<interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
|
||||
<interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
|
||||
<interrupt index="28" name="SPM" caption="SPM Ready"/>
|
||||
</interrupts>
|
||||
<interfaces>
|
||||
<interface name="ISP" type="isp"/>
|
||||
<interface name="HVPP" type="hvpp"/>
|
||||
<interface name="debugWIRE" type="dw"/>
|
||||
</interfaces>
|
||||
<property-groups>
|
||||
<property-group name="SIGNATURES">
|
||||
<property name="JTAGID" value="0x9510"/>
|
||||
<property name="SIGNATURE0" value="0x1e"/>
|
||||
<property name="SIGNATURE1" value="0x95"/>
|
||||
<property name="SIGNATURE2" value="0x10"/>
|
||||
</property-group>
|
||||
<property-group name="OCD">
|
||||
<property name="OCD_REVISION" value="1"/>
|
||||
<property name="OCD_DATAREG" value="0x31"/>
|
||||
<property name="PROGBASE" value="0x0000"/>
|
||||
</property-group>
|
||||
<property-group name="JTAG_INTERFACE">
|
||||
<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="45"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="10"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="10"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="PP_INTERFACE">
|
||||
<property name="PpControlStack"
|
||||
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
||||
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_latchCycles" value="6"/>
|
||||
<property name="PpEnterProgMode_toggleVtg" value="0"/>
|
||||
<property name="PpEnterProgMode_powerOffDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayMs" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayUs" value="0"/>
|
||||
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
||||
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
||||
<property name="PpChipErase_pulseWidth" value="0"/>
|
||||
<property name="PpChipErase_pollTimeout" value="10"/>
|
||||
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
||||
<property name="PpProgramFlash_mode" value="0x0F"/>
|
||||
<property name="PpProgramFlash_blockSize" value="256"/>
|
||||
<property name="PpReadFlash_blockSize" value="256"/>
|
||||
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="PpProgramEeprom_mode" value="0x05"/>
|
||||
<property name="PpProgramEeprom_blockSize" value="256"/>
|
||||
<property name="PpReadEeprom_blockSize" value="256"/>
|
||||
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
||||
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
||||
<property name="PpProgramLock_pulseWidth" value="0"/>
|
||||
<property name="PpProgramLock_pollTimeout" value="5"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE_STK600">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="45"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="6"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="10"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="PP_INTERFACE_STK600">
|
||||
<property name="PpControlStack"
|
||||
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
||||
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_latchCycles" value="6"/>
|
||||
<property name="PpEnterProgMode_toggleVtg" value="1"/>
|
||||
<property name="PpEnterProgMode_powerOffDelay" value="20"/>
|
||||
<property name="PpEnterProgMode_resetDelayMs" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayUs" value="50"/>
|
||||
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
||||
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
||||
<property name="PpChipErase_pulseWidth" value="0"/>
|
||||
<property name="PpChipErase_pollTimeout" value="10"/>
|
||||
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
||||
<property name="PpProgramFlash_mode" value="0x0F"/>
|
||||
<property name="PpProgramFlash_blockSize" value="256"/>
|
||||
<property name="PpReadFlash_blockSize" value="256"/>
|
||||
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="PpProgramEeprom_mode" value="0x05"/>
|
||||
<property name="PpProgramEeprom_blockSize" value="256"/>
|
||||
<property name="PpReadEeprom_blockSize" value="256"/>
|
||||
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
||||
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
||||
<property name="PpProgramLock_pulseWidth" value="0"/>
|
||||
<property name="PpProgramLock_pollTimeout" value="5"/>
|
||||
</property-group>
|
||||
</property-groups>
|
||||
</device>
|
||||
<modules>
|
||||
<module caption="Fuses" name="FUSE">
|
||||
<register-group caption="Fuses" name="FUSE">
|
||||
<register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
|
||||
<bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
|
||||
<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
|
||||
<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
|
||||
<bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
|
||||
<bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
|
||||
</register>
|
||||
<register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
|
||||
<bitfield caption="Clock Divide mode" mask="0x10" name="CKDIV8"/>
|
||||
<bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
|
||||
<bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
|
||||
<bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_SUT">
|
||||
<value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
|
||||
<value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
|
||||
<value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
|
||||
<value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
|
||||
<value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
|
||||
<value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
|
||||
<value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
|
||||
<value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_OSCSEL">
|
||||
<value caption="Default" name="DEFAULT" value="0x01"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BOOTSZ">
|
||||
<value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
|
||||
<value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
|
||||
<value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
|
||||
<value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Lockbits" name="LOCKBIT">
|
||||
<register-group caption="Lockbits" name="LOCKBIT">
|
||||
<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
|
||||
<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_LB">
|
||||
<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
|
||||
<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
|
||||
<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB">
|
||||
<value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB2">
|
||||
<value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register-group caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
|
||||
</register>
|
||||
<register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF">
|
||||
<bitfield caption="VADC Data bits" mask="0x0FFF" name="VADC"/>
|
||||
</register>
|
||||
<register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
|
||||
<bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
<register-group caption="Watchdog Timer" name="WDT">
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
|
||||
<value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
|
||||
<value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
|
||||
<value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="FET Control" name="FET">
|
||||
<register-group caption="FET Control" name="FET">
|
||||
<register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
|
||||
<bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
|
||||
<bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
|
||||
<bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
|
||||
<bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Serial Peripheral Interface" name="SPI">
|
||||
<register-group caption="Serial Peripheral Interface" name="SPI">
|
||||
<register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
|
||||
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
||||
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
||||
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
||||
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
||||
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
||||
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
||||
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
||||
</register>
|
||||
<register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
|
||||
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
||||
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
||||
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
||||
</register>
|
||||
<register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw="">
|
||||
<bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
||||
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
|
||||
<bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
|
||||
</register>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
|
||||
<bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
|
||||
</register>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
<bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
|
||||
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
|
||||
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="EEP_MODE">
|
||||
<value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Erase Only" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Write Only" name="VAL_0x02" value="0x02"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
|
||||
<bitfield
|
||||
caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
|
||||
mask="0x80" name="CADEN"/>
|
||||
<bitfield caption="" mask="0x40" name="CADPOL"/>
|
||||
<bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
|
||||
<bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
|
||||
<bitfield
|
||||
caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
|
||||
mask="0x06" name="CADSI"/>
|
||||
<bitfield
|
||||
caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
|
||||
mask="0x01" name="CADSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
|
||||
<bitfield caption="" mask="0x40" name="CADACIE"/>
|
||||
<bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
|
||||
<bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
|
||||
<bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
|
||||
<bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF">
|
||||
<bitfield caption="CC-ADC Instantaneous Current" mask="0xFFFF" name="CADIC"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="24"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="16"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFC" name="CADAC" lsb="10"/>
|
||||
<bitfield caption="ADC accumulate current bits" mask="0x03" name="CADAC0" lsb="8"/>
|
||||
</register>
|
||||
<register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF">
|
||||
<bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC0"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF">
|
||||
<bitfield caption="CC-ADC Regular Charge Current" mask="0xFF" name="CADRCC"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF">
|
||||
<bitfield caption="CC-ADC Regular Discharge Current" mask="0xFF" name="CADRDC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Two Wire Serial Interface" name="TWI">
|
||||
<register-group caption="Two Wire Serial Interface" name="TWI">
|
||||
<register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
|
||||
<bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
|
||||
values="COMM_TW_BUS_TIMEOUT"/>
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
|
||||
</register>
|
||||
<register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
|
||||
<bitfield caption="" mask="0xFE" name="TWAM"/>
|
||||
</register>
|
||||
<register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
|
||||
<bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
|
||||
</register>
|
||||
<register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
|
||||
<bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
|
||||
<bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
|
||||
<bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
|
||||
<bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
|
||||
<bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
|
||||
<bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
|
||||
<bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
|
||||
</register>
|
||||
<register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
|
||||
<bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
|
||||
<bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
|
||||
</register>
|
||||
<register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
|
||||
<bitfield caption="TWI Data Bits" mask="0xFF" name="TWD"/>
|
||||
</register>
|
||||
<register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
|
||||
<bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
|
||||
<bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_TW_BUS_TIMEOUT">
|
||||
<value caption="250ms" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="500ms" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="1000ms" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="2000ms" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="COMM_TWI_PRESACLE">
|
||||
<value caption="1" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="4" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="16" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="64" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="External Interrupts" name="EXINT">
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
||||
<bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
|
||||
<bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
|
||||
<bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
|
||||
<bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="4"/>
|
||||
</register>
|
||||
<register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F">
|
||||
<bitfield caption="Pin Change Enable Mask" mask="0x0F" name="PCINT"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
||||
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Timer/Counter, 16-bit" name="TC16">
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
||||
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
||||
<bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 1 A bits" mask="0xFF" name="OCR1A"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 1 B bits" mask="0xFF" name="OCR1B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC0">
|
||||
<register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
|
||||
<bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
|
||||
<bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF">
|
||||
<bitfield caption="Timer Counter 0 bits" mask="0xFFFF" name="TCNT0"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 0 A bits" mask="0xFF" name="OCR0A"/>
|
||||
</register>
|
||||
<register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF">
|
||||
<bitfield caption="Output Compare 0 B bits" mask="0xFF" name="OCR0B"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Cell Balancing" name="CELL_BALANCING">
|
||||
<register-group caption="Cell Balancing" name="CELL_BALANCING">
|
||||
<register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
|
||||
<bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register-group caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
|
||||
<bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
|
||||
<bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
|
||||
<bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
|
||||
<bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
|
||||
<bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
|
||||
<bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
|
||||
<bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
|
||||
size="1" mask="0x3F">
|
||||
<bitfield caption="Battery Protection Short-current Timing bits" mask="0x3F" name="HCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
|
||||
mask="0x3F">
|
||||
<bitfield caption="Battery Protection Over-current Timing bits" mask="0x3F" name="OCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
|
||||
size="1" mask="0x7F">
|
||||
<bitfield caption="Battery Protection Short-current Timing bits" mask="0x7F" name="SCPT"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
|
||||
offset="0xF9" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Charge-High-current Detection Level bits" mask="0xFF"
|
||||
name="CHCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
|
||||
offset="0xF8" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Discharge-High-current Detection Level bits" mask="0xFF"
|
||||
name="DHCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
|
||||
offset="0xF7" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Charge-Over-current Detection Level bits" mask="0xFF"
|
||||
name="COCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
|
||||
offset="0xF6" size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Discharge-Over-current Detection Level bits" mask="0xFF"
|
||||
name="DOCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
|
||||
size="1" mask="0xFF">
|
||||
<bitfield caption="Battery Protection Short-Circuit Detection Level Register bits" mask="0xFF"
|
||||
name="SCDL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
|
||||
name="DOCIF"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
|
||||
name="COCIF"/>
|
||||
<bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
|
||||
<bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
|
||||
name="DOCIE"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
|
||||
name="COCIE"/>
|
||||
<bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
|
||||
name="DHCIE"/>
|
||||
<bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Charger Detect" name="CHARGER_DETECT">
|
||||
<register-group caption="Charger Detect" name="CHARGER_DETECT">
|
||||
<register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
|
||||
<bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
|
||||
<bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
|
||||
<bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
|
||||
<bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
|
||||
<bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
|
||||
<bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
|
||||
<bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bandgap" name="BANDGAP">
|
||||
<register-group caption="Bandgap" name="BANDGAP">
|
||||
<register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
|
||||
<bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
|
||||
mask="0xFF">
|
||||
<bitfield caption="Bandgap Calibration of Resistor Ladder Bits" mask="0xFF" name="BGCR"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
|
||||
<bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="CPU Registers" name="CPU">
|
||||
<register-group caption="CPU Registers" name="CPU">
|
||||
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
||||
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
||||
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
||||
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
||||
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
||||
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
||||
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
||||
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
||||
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
|
||||
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
||||
<bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
|
||||
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
||||
<bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
|
||||
<bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
|
||||
</register>
|
||||
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
|
||||
<bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF">
|
||||
<bitfield caption="Fast Oscillator Calibration Value" mask="0xFF" name="FCAL"/>
|
||||
</register>
|
||||
<register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
|
||||
offset="0x37" size="1" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
|
||||
</register>
|
||||
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
||||
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR2"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR1"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
|
||||
<bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR0"/>
|
||||
</register>
|
||||
<register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x02" name="PA1DID"/>
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x01" name="PA0DID"/>
|
||||
</register>
|
||||
<register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
|
||||
<bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
|
||||
<bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
|
||||
<bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
|
||||
<bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CPU_SLEEP_MODE_3BITS">
|
||||
<value caption="Idle" name="IDLE" value="0x00"/>
|
||||
<value caption="ADC" name="ADC" value="0x01"/>
|
||||
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Power Save" name="PSAVE" value="0x03"/>
|
||||
<value caption="Power Off" name="POFF" value="0x04"/>
|
||||
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Reserved" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="I/O Port" name="PORT">
|
||||
<register-group caption="I/O Port" name="PORTA">
|
||||
<register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
<register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
|
||||
ocd-rw="R"/>
|
||||
<register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTB">
|
||||
<register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTC">
|
||||
<register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
|
||||
<register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bootloader" name="BOOT_LOAD">
|
||||
<register-group caption="Bootloader" name="BOOT_LOAD">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1">
|
||||
<bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
|
||||
<bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
|
||||
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
||||
<bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
|
||||
<bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
||||
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
</modules>
|
||||
</target-description-file>
|
||||
@@ -1,904 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<target-description-file>
|
||||
<variants>
|
||||
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
|
||||
</variants>
|
||||
<device name="ATmega32HVBrevB" architecture="AVR8" family="megaAVR">
|
||||
<address-spaces>
|
||||
<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
|
||||
<memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
|
||||
pagesize="0x80"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
|
||||
<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
|
||||
<memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
|
||||
<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
|
||||
<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
|
||||
<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
|
||||
<memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
|
||||
<memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
|
||||
pagesize="0x04"/>
|
||||
</address-space>
|
||||
<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
|
||||
</address-spaces>
|
||||
<peripherals>
|
||||
<module name="ADC">
|
||||
<instance name="ADC" caption="Analog-to-Digital Converter">
|
||||
<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
|
||||
caption="Analog-to-Digital Converter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="WDT">
|
||||
<instance name="WDT" caption="Watchdog Timer">
|
||||
<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
|
||||
caption="Watchdog Timer"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FET">
|
||||
<instance name="FET" caption="FET Control">
|
||||
<register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
|
||||
caption="FET Control"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="SPI">
|
||||
<instance name="SPI" caption="Serial Peripheral Interface">
|
||||
<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
|
||||
caption="Serial Peripheral Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EEPROM">
|
||||
<instance name="EEPROM" caption="EEPROM">
|
||||
<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
|
||||
caption="EEPROM"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="COULOMB_COUNTER">
|
||||
<instance name="COULOMB_COUNTER" caption="Coulomb Counter">
|
||||
<register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
|
||||
address-space="data" caption="Coulomb Counter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TWI">
|
||||
<instance name="TWI" caption="Two Wire Serial Interface">
|
||||
<register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
|
||||
caption="Two Wire Serial Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EXINT">
|
||||
<instance name="EXINT" caption="External Interrupts">
|
||||
<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
|
||||
caption="External Interrupts"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TC16">
|
||||
<instance name="TC1" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
<instance name="TC0" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CELL_BALANCING">
|
||||
<instance name="CELL_BALANCING" caption="Cell Balancing">
|
||||
<register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
|
||||
address-space="data" caption="Cell Balancing"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BATTERY_PROTECTION">
|
||||
<instance name="BATTERY_PROTECTION" caption="Battery Protection">
|
||||
<register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
|
||||
address-space="data" caption="Battery Protection"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CHARGER_DETECT">
|
||||
<instance name="CHARGER_DETECT" caption="Charger Detect">
|
||||
<register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
|
||||
address-space="data" caption="Charger Detect"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="VOLTAGE_REGULATOR">
|
||||
<instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
|
||||
<register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
|
||||
address-space="data" caption="Voltage Regulator"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BANDGAP">
|
||||
<instance name="BANDGAP" caption="Bandgap">
|
||||
<register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
|
||||
caption="Bandgap"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CPU">
|
||||
<instance name="CPU" caption="CPU Registers">
|
||||
<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
|
||||
caption="CPU Registers"/>
|
||||
<parameters>
|
||||
<param name="CORE_VERSION" value="V2E"/>
|
||||
</parameters>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="PORT">
|
||||
<instance name="PORTA" caption="I/O Port">
|
||||
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTB" caption="I/O Port">
|
||||
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTC" caption="I/O Port">
|
||||
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BOOT_LOAD">
|
||||
<instance name="BOOT_LOAD" caption="Bootloader">
|
||||
<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
|
||||
caption="Bootloader"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FUSE">
|
||||
<instance name="FUSE" caption="Fuses">
|
||||
<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
|
||||
caption="Fuses"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="LOCKBIT">
|
||||
<instance name="LOCKBIT" caption="Lockbits">
|
||||
<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
|
||||
caption="Lockbits"/>
|
||||
</instance>
|
||||
</module>
|
||||
</peripherals>
|
||||
<interrupts>
|
||||
<interrupt index="0" name="RESET"
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
<interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
|
||||
<interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
|
||||
<interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
|
||||
<interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
|
||||
<interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
|
||||
<interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
|
||||
<interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
|
||||
<interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
|
||||
<interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
|
||||
<interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
|
||||
<interrupt index="11" name="CHDET" caption="Charger Detect"/>
|
||||
<interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
|
||||
<interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
|
||||
<interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
|
||||
<interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
|
||||
<interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
|
||||
<interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
|
||||
<interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
|
||||
<interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
|
||||
<interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
|
||||
<interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
|
||||
<interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
|
||||
<interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
|
||||
<interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
|
||||
<interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
|
||||
<interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
|
||||
<interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
|
||||
<interrupt index="28" name="SPM" caption="SPM Ready"/>
|
||||
</interrupts>
|
||||
<interfaces>
|
||||
<interface name="ISP" type="isp"/>
|
||||
<interface name="HVPP" type="hvpp"/>
|
||||
<interface name="debugWIRE" type="dw"/>
|
||||
</interfaces>
|
||||
<property-groups>
|
||||
<property-group name="SIGNATURES">
|
||||
<property name="JTAGID" value="0x9510"/>
|
||||
<property name="SIGNATURE0" value="0x1e"/>
|
||||
<property name="SIGNATURE1" value="0x95"/>
|
||||
<property name="SIGNATURE2" value="0x10"/>
|
||||
</property-group>
|
||||
<property-group name="OCD">
|
||||
<property name="OCD_REVISION" value="1"/>
|
||||
<property name="OCD_DATAREG" value="0x31"/>
|
||||
<property name="PROGBASE" value="0x0000"/>
|
||||
</property-group>
|
||||
<property-group name="JTAG_INTERFACE">
|
||||
<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="45"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="10"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="10"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="PP_INTERFACE">
|
||||
<property name="PpControlStack"
|
||||
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
||||
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_latchCycles" value="6"/>
|
||||
<property name="PpEnterProgMode_toggleVtg" value="0"/>
|
||||
<property name="PpEnterProgMode_powerOffDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayMs" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayUs" value="0"/>
|
||||
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
||||
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
||||
<property name="PpChipErase_pulseWidth" value="0"/>
|
||||
<property name="PpChipErase_pollTimeout" value="10"/>
|
||||
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
||||
<property name="PpProgramFlash_mode" value="0x0F"/>
|
||||
<property name="PpProgramFlash_blockSize" value="256"/>
|
||||
<property name="PpReadFlash_blockSize" value="256"/>
|
||||
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="PpProgramEeprom_mode" value="0x05"/>
|
||||
<property name="PpProgramEeprom_blockSize" value="256"/>
|
||||
<property name="PpReadEeprom_blockSize" value="256"/>
|
||||
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
||||
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
||||
<property name="PpProgramLock_pulseWidth" value="0"/>
|
||||
<property name="PpProgramLock_pollTimeout" value="5"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE_STK600">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="45"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="6"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="10"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="PP_INTERFACE_STK600">
|
||||
<property name="PpControlStack"
|
||||
value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
|
||||
<property name="PpEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="PpEnterProgMode_progModeDelay" value="0"/>
|
||||
<property name="PpEnterProgMode_latchCycles" value="6"/>
|
||||
<property name="PpEnterProgMode_toggleVtg" value="1"/>
|
||||
<property name="PpEnterProgMode_powerOffDelay" value="20"/>
|
||||
<property name="PpEnterProgMode_resetDelayMs" value="0"/>
|
||||
<property name="PpEnterProgMode_resetDelayUs" value="50"/>
|
||||
<property name="PpLeaveProgMode_stabDelay" value="15"/>
|
||||
<property name="PpLeaveProgMode_resetDelay" value="15"/>
|
||||
<property name="PpChipErase_pulseWidth" value="0"/>
|
||||
<property name="PpChipErase_pollTimeout" value="10"/>
|
||||
<property name="PpProgramFlash_pollTimeout" value="5"/>
|
||||
<property name="PpProgramFlash_mode" value="0x0F"/>
|
||||
<property name="PpProgramFlash_blockSize" value="256"/>
|
||||
<property name="PpReadFlash_blockSize" value="256"/>
|
||||
<property name="PpProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="PpProgramEeprom_mode" value="0x05"/>
|
||||
<property name="PpProgramEeprom_blockSize" value="256"/>
|
||||
<property name="PpReadEeprom_blockSize" value="256"/>
|
||||
<property name="PpProgramFuse_pulseWidth" value="0"/>
|
||||
<property name="PpProgramFuse_pollTimeout" value="5"/>
|
||||
<property name="PpProgramLock_pulseWidth" value="0"/>
|
||||
<property name="PpProgramLock_pollTimeout" value="5"/>
|
||||
</property-group>
|
||||
</property-groups>
|
||||
</device>
|
||||
<modules>
|
||||
<module caption="Fuses" name="FUSE">
|
||||
<register-group caption="Fuses" name="FUSE">
|
||||
<register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
|
||||
<bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
|
||||
<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
|
||||
<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
|
||||
<bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
|
||||
<bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
|
||||
</register>
|
||||
<register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
|
||||
<bitfield caption="DUVR mode on" mask="0x10" name="DUVRDINIT"/>
|
||||
<bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
|
||||
<bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
|
||||
<bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_SUT">
|
||||
<value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
|
||||
<value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
|
||||
<value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
|
||||
<value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
|
||||
<value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
|
||||
<value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
|
||||
<value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
|
||||
<value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_OSCSEL">
|
||||
<value caption="Default" name="DEFAULT" value="0x01"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BOOTSZ">
|
||||
<value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
|
||||
<value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
|
||||
<value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
|
||||
<value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Lockbits" name="LOCKBIT">
|
||||
<register-group caption="Lockbits" name="LOCKBIT">
|
||||
<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
|
||||
<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_LB">
|
||||
<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
|
||||
<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
|
||||
<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB">
|
||||
<value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB2">
|
||||
<value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register-group caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
|
||||
</register>
|
||||
<register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
|
||||
<register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
|
||||
<bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
<register-group caption="Watchdog Timer" name="WDT">
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
|
||||
<value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
|
||||
<value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
|
||||
<value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="FET Control" name="FET">
|
||||
<register-group caption="FET Control" name="FET">
|
||||
<register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
|
||||
<bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
|
||||
<bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
|
||||
<bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
|
||||
<bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Serial Peripheral Interface" name="SPI">
|
||||
<register-group caption="Serial Peripheral Interface" name="SPI">
|
||||
<register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
|
||||
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
||||
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
||||
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
||||
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
||||
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
||||
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
||||
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
||||
</register>
|
||||
<register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
|
||||
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
||||
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
||||
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
||||
</register>
|
||||
<register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
||||
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
<bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
|
||||
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
|
||||
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="EEP_MODE">
|
||||
<value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Erase Only" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Write Only" name="VAL_0x02" value="0x02"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
|
||||
<bitfield
|
||||
caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
|
||||
mask="0x80" name="CADEN"/>
|
||||
<bitfield caption="" mask="0x40" name="CADPOL"/>
|
||||
<bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
|
||||
<bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
|
||||
<bitfield
|
||||
caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
|
||||
mask="0x06" name="CADSI"/>
|
||||
<bitfield
|
||||
caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
|
||||
mask="0x01" name="CADSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
|
||||
<bitfield caption="" mask="0x40" name="CADACIE"/>
|
||||
<bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
|
||||
<bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
|
||||
<bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
|
||||
<bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF"/>
|
||||
<register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF"/>
|
||||
<register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Two Wire Serial Interface" name="TWI">
|
||||
<register-group caption="Two Wire Serial Interface" name="TWI">
|
||||
<register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
|
||||
<bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
|
||||
values="COMM_TW_BUS_TIMEOUT"/>
|
||||
<bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
|
||||
</register>
|
||||
<register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
|
||||
<bitfield caption="" mask="0xFE" name="TWAM"/>
|
||||
</register>
|
||||
<register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
|
||||
<register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
|
||||
<bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
|
||||
<bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
|
||||
<bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
|
||||
<bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
|
||||
<bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
|
||||
<bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
|
||||
<bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
|
||||
</register>
|
||||
<register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
|
||||
<bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
|
||||
<bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
|
||||
</register>
|
||||
<register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
|
||||
<register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
|
||||
<bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
|
||||
<bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_TW_BUS_TIMEOUT">
|
||||
<value caption="250ms" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="500ms" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="1000ms" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="2000ms" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="COMM_TWI_PRESACLE">
|
||||
<value caption="1" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="4" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="16" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="64" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="External Interrupts" name="EXINT">
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
||||
<bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
|
||||
<bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
|
||||
<bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
|
||||
<register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F"/>
|
||||
</register-group>
|
||||
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
||||
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Timer/Counter, 16-bit" name="TC16">
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
||||
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
||||
<bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
|
||||
<register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC0">
|
||||
<register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
|
||||
<bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
|
||||
<bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output Compare Register 0A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
|
||||
<register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Cell Balancing" name="CELL_BALANCING">
|
||||
<register-group caption="Cell Balancing" name="CELL_BALANCING">
|
||||
<register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
|
||||
<bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register-group caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
|
||||
<bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
|
||||
<bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
|
||||
<bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
|
||||
<bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
|
||||
<bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
|
||||
<bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
|
||||
<bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
|
||||
size="1" mask="0x3F"/>
|
||||
<register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
|
||||
mask="0x3F"/>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
|
||||
size="1" mask="0x7F"/>
|
||||
<register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
|
||||
offset="0xF9" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
|
||||
offset="0xF8" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
|
||||
offset="0xF7" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
|
||||
offset="0xF6" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
|
||||
size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
|
||||
name="DOCIF"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
|
||||
name="COCIF"/>
|
||||
<bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
|
||||
<bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
|
||||
name="DOCIE"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
|
||||
name="COCIE"/>
|
||||
<bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
|
||||
name="DHCIE"/>
|
||||
<bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Charger Detect" name="CHARGER_DETECT">
|
||||
<register-group caption="Charger Detect" name="CHARGER_DETECT">
|
||||
<register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
|
||||
<bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
|
||||
<bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
|
||||
<bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
|
||||
<bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
|
||||
<bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
|
||||
<bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
|
||||
<bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bandgap" name="BANDGAP">
|
||||
<register-group caption="Bandgap" name="BANDGAP">
|
||||
<register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
|
||||
<bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
|
||||
<bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
|
||||
<bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="CPU Registers" name="CPU">
|
||||
<register-group caption="CPU Registers" name="CPU">
|
||||
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
||||
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
||||
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
||||
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
||||
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
||||
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
||||
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
||||
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
||||
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
|
||||
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
||||
<bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
|
||||
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
||||
<bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
|
||||
<bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
|
||||
</register>
|
||||
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
|
||||
<bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
|
||||
offset="0x37" size="1" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
|
||||
</register>
|
||||
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
||||
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
|
||||
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
|
||||
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
|
||||
<register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x02" name="PA1DID"/>
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x01" name="PA0DID"/>
|
||||
</register>
|
||||
<register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
|
||||
<bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
|
||||
<bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
|
||||
<bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
|
||||
<bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CPU_SLEEP_MODE_3BITS">
|
||||
<value caption="Idle" name="IDLE" value="0x00"/>
|
||||
<value caption="ADC" name="ADC" value="0x01"/>
|
||||
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Power Save" name="PSAVE" value="0x03"/>
|
||||
<value caption="Power Off" name="POFF" value="0x04"/>
|
||||
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Reserved" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="I/O Port" name="PORT">
|
||||
<register-group caption="I/O Port" name="PORTA">
|
||||
<register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
<register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
|
||||
ocd-rw="R"/>
|
||||
<register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTB">
|
||||
<register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTC">
|
||||
<register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
|
||||
<register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bootloader" name="BOOT_LOAD">
|
||||
<register-group caption="Bootloader" name="BOOT_LOAD">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1">
|
||||
<bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
|
||||
<bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
|
||||
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
||||
<bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
|
||||
<bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
||||
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
</modules>
|
||||
</target-description-file>
|
||||
@@ -1,927 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<target-description-file>
|
||||
<variants>
|
||||
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="3.6"/>
|
||||
</variants>
|
||||
<device name="ATmega64HVE2" architecture="AVR8" family="megaAVR">
|
||||
<address-spaces>
|
||||
<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
|
||||
<memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
|
||||
pagesize="0x80"/>
|
||||
<memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
|
||||
pagesize="0x80"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
|
||||
<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
|
||||
<memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
|
||||
<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
|
||||
<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
|
||||
<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
|
||||
<memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
|
||||
<memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
|
||||
pagesize="0x04"/>
|
||||
</address-space>
|
||||
<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
|
||||
</address-spaces>
|
||||
<peripherals>
|
||||
<module name="SPI">
|
||||
<instance name="SPI" caption="Serial Peripheral Interface">
|
||||
<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
|
||||
caption="Serial Peripheral Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EEPROM">
|
||||
<instance name="EEPROM" caption="EEPROM">
|
||||
<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
|
||||
caption="EEPROM"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TC16">
|
||||
<instance name="TC1" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
<instance name="TC0" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="PORT">
|
||||
<instance name="PORTB" caption="I/O Port">
|
||||
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTA" caption="I/O Port">
|
||||
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BOOT_LOAD">
|
||||
<instance name="BOOT_LOAD" caption="Bootloader">
|
||||
<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
|
||||
caption="Bootloader"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="ADC">
|
||||
<instance name="ADC" caption="Analog-to-Digital Converter">
|
||||
<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
|
||||
caption="Analog-to-Digital Converter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BANDGAP">
|
||||
<instance name="BANDGAP" caption="Bandgap">
|
||||
<register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
|
||||
caption="Bandgap"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="LINUART">
|
||||
<instance name="LINUART" caption="Local Interconnect Network">
|
||||
<register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
|
||||
caption="Local Interconnect Network"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CPU">
|
||||
<instance name="CPU" caption="CPU Registers">
|
||||
<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
|
||||
caption="CPU Registers"/>
|
||||
<parameters>
|
||||
<param name="CORE_VERSION" value="V2E"/>
|
||||
</parameters>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EXINT">
|
||||
<instance name="EXINT" caption="External Interrupts">
|
||||
<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
|
||||
caption="External Interrupts"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="WDT">
|
||||
<instance name="WDT" caption="Watchdog Timer">
|
||||
<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
|
||||
caption="Watchdog Timer"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="WAKEUP_TIMER">
|
||||
<instance name="WAKEUP_TIMER" caption="Wakeup Timer">
|
||||
<register-group name="WAKEUP_TIMER" name-in-module="WAKEUP_TIMER" offset="0x00"
|
||||
address-space="data" caption="Wakeup Timer"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FUSE">
|
||||
<instance name="FUSE" caption="Fuses">
|
||||
<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
|
||||
caption="Fuses"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="LOCKBIT">
|
||||
<instance name="LOCKBIT" caption="Lockbits">
|
||||
<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
|
||||
caption="Lockbits"/>
|
||||
</instance>
|
||||
</module>
|
||||
</peripherals>
|
||||
<interrupts>
|
||||
<interrupt index="0" name="RESET"
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
<interrupt index="1" name="INT0" caption="External Interrupt 0"/>
|
||||
<interrupt index="2" name="PCINT0" caption="Pin Change Interrupt 0"/>
|
||||
<interrupt index="3" name="PCINT1" caption="Pin Change Interrupt 1"/>
|
||||
<interrupt index="4" name="WDT" caption="Watchdog Timeout Interrupt"/>
|
||||
<interrupt index="5" name="WAKEUP" caption="Wakeup Timer Overflow"/>
|
||||
<interrupt index="6" name="TIMER1_IC" caption="Timer 1 Input capture"/>
|
||||
<interrupt index="7" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
|
||||
<interrupt index="8" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
|
||||
<interrupt index="9" name="TIMER1_OVF" caption="Timer 1 overflow"/>
|
||||
<interrupt index="10" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
|
||||
<interrupt index="11" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
|
||||
<interrupt index="12" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
|
||||
<interrupt index="13" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
|
||||
<interrupt index="14" name="LIN_STATUS" caption="LIN Status Interrupt"/>
|
||||
<interrupt index="15" name="LIN_ERROR" caption="LIN Error Interrupt"/>
|
||||
<interrupt index="16" name="SPI_STC" caption="SPI Serial transfer complete"/>
|
||||
<interrupt index="17" name="VADC_CONV" caption="Voltage ADC Instantaneous Conversion Complete"/>
|
||||
<interrupt index="18" name="VADC_ACC" caption="Voltage ADC Accumulated Conversion Complete"/>
|
||||
<interrupt index="19" name="CADC_CONV" caption="C-ADC Instantaneous Conversion Complete"/>
|
||||
<interrupt index="20" name="CADC_REG_CUR" caption="C-ADC Regular Current"/>
|
||||
<interrupt index="21" name="CADC_ACC" caption="C-ADC Accumulated Conversion Complete"/>
|
||||
<interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
|
||||
<interrupt index="23" name="SPM" caption="SPM Ready"/>
|
||||
<interrupt index="24" name="PLL" caption="PLL Lock Change Interrupt"/>
|
||||
</interrupts>
|
||||
<interfaces>
|
||||
<interface name="ISP" type="isp"/>
|
||||
<interface name="HVSP" type="hvsp"/>
|
||||
<interface name="debugWIRE" type="dw"/>
|
||||
</interfaces>
|
||||
<property-groups>
|
||||
<property-group name="SIGNATURES">
|
||||
<property name="JTAGID" value="0x9610"/>
|
||||
<property name="SIGNATURE0" value="0x1e"/>
|
||||
<property name="SIGNATURE1" value="0x96"/>
|
||||
<property name="SIGNATURE2" value="0x10"/>
|
||||
</property-group>
|
||||
<property-group name="OCD">
|
||||
<property name="OCD_REVISION" value="1"/>
|
||||
<property name="OCD_DATAREG" value="0x31"/>
|
||||
<property name="PROGBASE" value="0x0000"/>
|
||||
</property-group>
|
||||
<property-group name="JTAG_INTERFACE">
|
||||
<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE_STK600">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="10"/>
|
||||
<property name="IspChipErase_pollMethod" value="0"/>
|
||||
<property name="IspProgramFlash_mode" value="0x21"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="6"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x20"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0xFF"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x04"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="64"/>
|
||||
<property name="IspProgramEeprom_delay" value="20"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC0"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0xA0"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0xFF"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0xFF"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="HVSP_INTERFACE_STK600">
|
||||
<property name="HvspControlStack"
|
||||
value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
|
||||
<property name="HvspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
|
||||
<property name="HvspEnterProgMode_synchCycles" value="6"/>
|
||||
<property name="HvspEnterProgMode_latchCycles" value="1"/>
|
||||
<property name="HvspEnterProgMode_toggleVtg" value="1"/>
|
||||
<property name="HvspEnterProgMode_powoffDelay" value="20"/>
|
||||
<property name="HvspEnterProgMode_resetDelay1" value="1"/>
|
||||
<property name="HvspEnterProgMode_resetDelay2" value="70"/>
|
||||
<property name="HvspLeaveProgMode_stabDelay" value="101"/>
|
||||
<property name="HvspLeaveProgMode_resetDelay" value="26"/>
|
||||
<property name="HvspChipErase_pollTimeout" value="40"/>
|
||||
<property name="HvspChipErase_eraseTime" value="1"/>
|
||||
<property name="HvspProgramFlash_mode" value="0x0D"/>
|
||||
<property name="HvspProgramFlash_blockSize" value="256"/>
|
||||
<property name="HvspProgramFlash_pollTimeout" value="6"/>
|
||||
<property name="HvspReadFlash_blockSize" value="256"/>
|
||||
<property name="HvspProgramEeprom_mode" value="0x05"/>
|
||||
<property name="HvspProgramEeprom_blockSize" value="256"/>
|
||||
<property name="HvspProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="HvspReadEeprom_blockSize" value="256"/>
|
||||
<property name="HvspProgramFuse_pollTimeout" value="25"/>
|
||||
<property name="HvspProgramLock_pollTimeout" value="25"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="20"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="10"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="20"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="HVSP_INTERFACE">
|
||||
<property name="HvspControlStack"
|
||||
value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
|
||||
<property name="HvspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
|
||||
<property name="HvspEnterProgMode_synchCycles" value="6"/>
|
||||
<property name="HvspEnterProgMode_latchCycles" value="1"/>
|
||||
<property name="HvspEnterProgMode_toggleVtg" value="1"/>
|
||||
<property name="HvspEnterProgMode_powoffDelay" value="25"/>
|
||||
<property name="HvspEnterProgMode_resetDelay1" value="1"/>
|
||||
<property name="HvspEnterProgMode_resetDelay2" value="70"/>
|
||||
<property name="HvspLeaveProgMode_stabDelay" value="101"/>
|
||||
<property name="HvspLeaveProgMode_resetDelay" value="26"/>
|
||||
<property name="HvspChipErase_pollTimeout" value="40"/>
|
||||
<property name="HvspChipErase_eraseTime" value="1"/>
|
||||
<property name="HvspProgramFlash_mode" value="0x0D"/>
|
||||
<property name="HvspProgramFlash_blockSize" value="256"/>
|
||||
<property name="HvspProgramFlash_pollTimeout" value="6"/>
|
||||
<property name="HvspReadFlash_blockSize" value="256"/>
|
||||
<property name="HvspProgramEeprom_mode" value="0x05"/>
|
||||
<property name="HvspProgramEeprom_blockSize" value="256"/>
|
||||
<property name="HvspProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="HvspReadEeprom_blockSize" value="256"/>
|
||||
<property name="HvspProgramFuse_pollTimeout" value="25"/>
|
||||
<property name="HvspProgramLock_pollTimeout" value="25"/>
|
||||
</property-group>
|
||||
</property-groups>
|
||||
</device>
|
||||
<modules>
|
||||
<module caption="Fuses" name="FUSE">
|
||||
<register-group caption="Fuses" name="FUSE">
|
||||
<register caption="" name="LOW" offset="0x00" size="1" initval="0xD7">
|
||||
<bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
|
||||
<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
|
||||
<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
|
||||
<bitfield caption="Brown-out detection enabled" mask="0x10" name="BODEN"/>
|
||||
<bitfield caption="Divide clock by 8" mask="0x08" name="CKDIV8"/>
|
||||
<bitfield caption="Select start-up time" mask="0x6" name="SUT" values="ENUM_SUT"/>
|
||||
<bitfield caption="Oscillator select" mask="0x01" name="OSCSEL0"/>
|
||||
</register>
|
||||
<register caption="" name="HIGH" offset="0x01" size="1" initval="0xF9">
|
||||
<bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
|
||||
<bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
|
||||
<bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_SUT">
|
||||
<value caption="Start-up time 14 CK + 0 ms" name="14CK_0MS" value="0x00"/>
|
||||
<value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x01"/>
|
||||
<value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x02"/>
|
||||
<value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BOOTSZ">
|
||||
<value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
|
||||
<value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
|
||||
<value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
|
||||
<value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Lockbits" name="LOCKBIT">
|
||||
<register-group caption="Lockbits" name="LOCKBIT">
|
||||
<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
|
||||
<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
|
||||
<bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_LB">
|
||||
<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
|
||||
<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
|
||||
<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB">
|
||||
<value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ENUM_BLB2">
|
||||
<value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
|
||||
<value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
|
||||
<value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
|
||||
<value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Serial Peripheral Interface" name="SPI">
|
||||
<register-group caption="Serial Peripheral Interface" name="SPI">
|
||||
<register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
|
||||
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
||||
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
||||
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
||||
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
||||
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
||||
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
||||
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
||||
</register>
|
||||
<register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
|
||||
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
||||
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
||||
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
||||
</register>
|
||||
<register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
||||
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
<bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
|
||||
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
|
||||
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="EEP_MODE">
|
||||
<value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Erase Only" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Write Only" name="VAL_0x02" value="0x02"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Timer/Counter, 16-bit" name="TC16">
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
||||
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
||||
<bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
|
||||
<register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC0">
|
||||
<register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
|
||||
<bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
|
||||
<bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output Compare Register 0A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
|
||||
<register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
|
||||
<bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CLK_SEL_3BIT_EXT">
|
||||
<value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="I/O Port" name="PORT">
|
||||
<register-group caption="I/O Port" name="PORTB">
|
||||
<register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
|
||||
<register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="Port B Override" name="PBOV" offset="0xdc" size="1">
|
||||
<bitfield caption="Port B Override Change Enable" mask="0x80" name="PBOVCE"/>
|
||||
<bitfield caption="Port B Override Enable 3" mask="0x08" name="PBOE3"/>
|
||||
<bitfield caption="Port B Override Enable 0" mask="0x01" name="PBOE0"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTA">
|
||||
<register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x03"/>
|
||||
<register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x03"/>
|
||||
<register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x03" ocd-rw="R"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Bootloader" name="BOOT_LOAD">
|
||||
<register-group caption="Bootloader" name="BOOT_LOAD">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1">
|
||||
<bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
|
||||
<bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
|
||||
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
||||
<bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
|
||||
<bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
||||
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register-group caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register caption="ADC Synchronization Control and Status Register" name="ADSCSRA" offset="0xe0"
|
||||
size="1">
|
||||
<bitfield caption="Synchronization Busy" mask="0x04" name="SBSY"/>
|
||||
<bitfield caption="Synchronization Command" mask="0x03" name="SCMD"
|
||||
values="SYNCHRONIZATION_COMMAND"/>
|
||||
</register>
|
||||
<register caption="ADC Synchronization Control and Status Register" name="ADSCSRB" offset="0xe1"
|
||||
size="1">
|
||||
<bitfield caption="V-ADC Instantaneous Conversion Polarity Status" mask="0x40" name="VADICPS"/>
|
||||
<bitfield caption="VADAC Data Read Out Busy" mask="0x20" name="VADACRB"/>
|
||||
<bitfield caption="VADIC Data Read Out Busy" mask="0x10" name="VADICRB"/>
|
||||
<bitfield caption="C-ADC Instantaneous Conversion Polarity Status" mask="0x04" name="CADICPS"/>
|
||||
<bitfield caption="CADAC Data Read Out Busy" mask="0x02" name="CADACRB"/>
|
||||
<bitfield caption="CADIC Data Read Out Busy" mask="0x01" name="CADICRB"/>
|
||||
</register>
|
||||
<register caption="ADC Control Register A" name="ADCRA" offset="0xe2" size="1">
|
||||
<bitfield caption="ADC Polarity Select" mask="0x08" name="ADPSEL"/>
|
||||
<bitfield caption="C-ADC Chopper Mode Select" mask="0x06" name="ADCMS"
|
||||
values="C_ADC_CHOPPER_MODE_SELECT"/>
|
||||
<bitfield caption="Sampling Clock Select" mask="0x01" name="CKSEL" values="SAMPLING_CLOCK_SELECT"/>
|
||||
</register>
|
||||
<register caption="ADC Control Register B" name="ADCRB" offset="0xe3" size="1">
|
||||
<bitfield caption="Instantaneous Decimation Ratio Select" mask="0x18" name="ADIDES"
|
||||
values="INSTANTANEOUS_DECIMATION_RATIO_SELECT"/>
|
||||
<bitfield caption="Accumulated Decimation Ratio Select" mask="0x07" name="ADADES"
|
||||
values="ACCUMULATED_DECIMATION_RATIO_SELECT"/>
|
||||
</register>
|
||||
<register caption="ADC Control Register B" name="ADCRC" offset="0xe4" size="1">
|
||||
<bitfield caption="C-ADC Enable" mask="0x80" name="CADEN"/>
|
||||
<bitfield caption="C-ADC Regular Current Comparator Mode" mask="0x30" name="CADRCM"
|
||||
values="C_ADC_REGULAR_CURRENT_COMPARATOR_MODE"/>
|
||||
<bitfield caption="C-ADC Regular Current Count Threshold" mask="0x0F" name="CADRCT"
|
||||
values="MISC_4BIT_COUNT"/>
|
||||
</register>
|
||||
<register caption="ADC Control Register D" name="ADCRD" offset="0xe5" size="1">
|
||||
<bitfield caption="C-ADC Gain" mask="0x38" name="CADG" values="C_ADC_INPUT_GAIN"/>
|
||||
<bitfield caption="C-ADC Pin Diagnostics Mode" mask="0x06" name="CADPDM"
|
||||
values="C_ADC_PIN_DIAGNOSIS_MODE"/>
|
||||
<bitfield caption="C-ADC Diagnostics Channel Select" mask="0x01" name="CADDSEL"/>
|
||||
</register>
|
||||
<register caption="ADC Control Register E" name="ADCRE" offset="0xe6" size="1">
|
||||
<bitfield caption="V-ADC Enable" mask="0x80" name="VADEN"/>
|
||||
<bitfield caption="V-ADC Reference Select" mask="0x20" name="VADREFS"
|
||||
values="V_ADC_REFERENCE_SELECT"/>
|
||||
<bitfield caption="V-ADC Pin Diagnostics Mode" mask="0x18" name="VADPDM"
|
||||
values="V_ADC_PIN_DIAGNOSIS_MODE"/>
|
||||
<bitfield caption="V-ADC Channel Select" mask="0x07" name="VADMUX" values="V_ADC_CHANNEL_SELECT"/>
|
||||
</register>
|
||||
<register caption="ADC Interrupt Flag Register" name="ADIFR" offset="0xe7" size="1">
|
||||
<bitfield caption="V-ADC Accumulated Voltage Interrupt Flag" mask="0x20" name="VADACIF"/>
|
||||
<bitfield caption="V-DAC Instantaneous Voltage Interrupt Flag" mask="0x10" name="VADICIF"/>
|
||||
<bitfield caption="C-ADC Regulator Current Interrupt Flag" mask="0x04" name="CADRCIF"/>
|
||||
<bitfield caption="C-ADC Accumulated Current Interrupt Flag" mask="0x02" name="CADACIF"/>
|
||||
<bitfield caption="C-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
|
||||
</register>
|
||||
<register caption="ADC Interrupt Mask Register" name="ADIMR" offset="0xe8" size="1">
|
||||
<bitfield caption="V-ADC Accumulated Voltage Interrupt Enable" mask="0x20" name="VADACIE"/>
|
||||
<bitfield caption="V-DAC Instantaneous Voltage Interrupt Enable" mask="0x10" name="VADICIE"/>
|
||||
<bitfield caption="C-ADC Regulator Current Interrupt Enable" mask="0x04" name="CADRCIE"/>
|
||||
<bitfield caption="C-ADC Accumulated Current Interrupt Enable" mask="0x02" name="CADACIE"/>
|
||||
<bitfield caption="C-ADC Instantaneous Current Interrupt Enable" mask="0x01" name="CADICIE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Regulator Current Comparator Threshold Level" name="CADRCL" offset="0xe9"
|
||||
size="2" mask="0xFFFF"/>
|
||||
<register caption="V-ADC Instantaneous Conversion Result" name="VADIC" offset="0xf1" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="V-ADC Accumulated Conversion Result" name="VADAC3" offset="0xf6" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="V-ADC Accumulated Conversion Result" name="VADAC2" offset="0xf5" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="V-ADC Accumulated Conversion Result" name="VADAC1" offset="0xf4" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="V-ADC Accumulated Conversion Result" name="VADAC0" offset="0xf3" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="C-ADC Instantaneous Conversion Result" name="CADIC" offset="0xeb" size="2"
|
||||
mask="0xFFFF"/>
|
||||
<register caption="C-ADC Accumulated Conversion Result" name="CADAC3" offset="0xf0" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="C-ADC Accumulated Conversion Result" name="CADAC2" offset="0xef" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="C-ADC Accumulated Conversion Result" name="CADAC1" offset="0xee" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="C-ADC Accumulated Conversion Result" name="CADAC0" offset="0xed" size="1"
|
||||
mask="0xFF"/>
|
||||
</register-group>
|
||||
<value-group caption="" name="SYNCHRONIZATION_COMMAND">
|
||||
<value caption="Reserved" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Reset and Synchronize" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Synchronize on next Instantaneous Conversion" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Synchronize on next Accumulated Conversion" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="C_ADC_CHOPPER_MODE_SELECT">
|
||||
<value caption="Chopping Disabled" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Automatic Fast Chopping" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Automatic Slow Chopping" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Software Polarity Control" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="SAMPLING_CLOCK_SELECT">
|
||||
<value caption="PLL (512kHz output) as sampling clock" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Slow RC Oscillator as sampling clock" name="VAL_0x01" value="0x01"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="INSTANTANEOUS_DECIMATION_RATIO_SELECT">
|
||||
<value caption="512" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="256" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="128" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="64" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="ACCUMULATED_DECIMATION_RATIO_SELECT">
|
||||
<value caption="512" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="256" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="128" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="64" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="32" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="16" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="8" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="4" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="C_ADC_REGULAR_CURRENT_COMPARATOR_MODE">
|
||||
<value caption="Comparator Disabled" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Comparator Enabled. Regular Current Counter counts up if Accumulated Current is above threshold and is reset if Accumulated Current is below threshold."
|
||||
name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Comparator Enabled. Regular Current Counter counts up if Accumulated Current is above threshold and down if Accumulated Current is below threshold."
|
||||
name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Reserved" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="MISC_4BIT_COUNT">
|
||||
<value caption="1" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="2" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="3" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="4" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="5" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="6" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="7" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="8" name="VAL_0x07" value="0x07"/>
|
||||
<value caption="9" name="VAL_0x08" value="0x08"/>
|
||||
<value caption="10" name="VAL_0x09" value="0x09"/>
|
||||
<value caption="11" name="VAL_0x0a" value="0x0a"/>
|
||||
<value caption="12" name="VAL_0x0b" value="0x0b"/>
|
||||
<value caption="13" name="VAL_0x0c" value="0x0c"/>
|
||||
<value caption="14" name="VAL_0x0d" value="0x0d"/>
|
||||
<value caption="15" name="VAL_0x0e" value="0x0e"/>
|
||||
<value caption="16" name="VAL_0x0f" value="0x0f"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="C_ADC_INPUT_GAIN">
|
||||
<value caption="4x" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="8x" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="16x" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="32x" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="64x" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="128x" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="256x" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="C_ADC_PIN_DIAGNOSIS_MODE">
|
||||
<value caption="No current source is enabled" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Current source on PI pin enabled" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Current source on NI pin enabled" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Current source on both PI/NI pins enabled" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="V_ADC_REFERENCE_SELECT">
|
||||
<value caption="VREF as reference" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="AVDD/3 as reference (for diagnosis purpose)" name="VAL_0x01" value="0x01"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="V_ADC_PIN_DIAGNOSIS_MODE">
|
||||
<value caption="No current source is enabled" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Current source on PV pin enabled" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Current source on NV pin enabled" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Current source on both PV/NV pins enabled" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
<value-group caption="" name="V_ADC_CHANNEL_SELECT">
|
||||
<value caption="PV - NV" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="ADC0 - SGND" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="ADC1 - SGND" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="VTEMP - GND" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="DIAGNOSIS - GND (VREF/TBD)" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Reserved" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Bandgap" name="BANDGAP">
|
||||
<register-group caption="Bandgap" name="BANDGAP">
|
||||
<register caption="Bandgap Control and Status Register A" name="BGCSRA" offset="0xd1" size="1">
|
||||
<bitfield caption="Band Gap Sample Configuration" mask="0x07" name="BGSC"/>
|
||||
</register>
|
||||
<register caption="Band Gap Calibration Register A" name="BGCRA" offset="0xd3" size="1">
|
||||
<bitfield caption="Band Gap Calibration Nominal" mask="0xFF" name="BGCN"/>
|
||||
</register>
|
||||
<register caption="Band Gap Calibration Register B" name="BGCRB" offset="0xd2" size="1">
|
||||
<bitfield caption="Band Gap Calibration Linear" mask="0xFF" name="BGCL"/>
|
||||
</register>
|
||||
<register caption="Band Gap Lock Register" name="BGLR" offset="0xd4" size="1">
|
||||
<bitfield caption="Band Gap Lock Enable" mask="0x02" name="BGPLE"/>
|
||||
<bitfield caption="Band Gap Lock" mask="0x01" name="BGPL"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Local Interconnect Network" name="LINUART">
|
||||
<register-group caption="Local Interconnect Network" name="LINUART">
|
||||
<register caption="LIN Control Register" name="LINCR" offset="0xc0" size="1">
|
||||
<bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
|
||||
<bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
|
||||
<bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
|
||||
<bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
|
||||
<bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
|
||||
</register>
|
||||
<register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xc1" size="1">
|
||||
<bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
|
||||
<bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
|
||||
<bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
|
||||
<bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
|
||||
<bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
|
||||
<bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
|
||||
</register>
|
||||
<register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xc2" size="1">
|
||||
<bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
|
||||
<bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
|
||||
<bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
|
||||
<bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
|
||||
</register>
|
||||
<register caption="LIN Error Register" name="LINERR" offset="0xc3" size="1" ocd-rw="R">
|
||||
<bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
|
||||
<bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
|
||||
<bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
|
||||
<bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
|
||||
<bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
|
||||
<bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
|
||||
<bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
|
||||
<bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
|
||||
</register>
|
||||
<register caption="LIN Bit Timing Register" name="LINBTR" offset="0xc4" size="1">
|
||||
<bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
|
||||
<bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
|
||||
</register>
|
||||
<register caption="LIN Baud Rate Low Register" name="LINBRRL" offset="0xc5" size="1">
|
||||
<bitfield caption="" mask="0xFF" name="LDIV"/>
|
||||
</register>
|
||||
<register caption="LIN Baud Rate High Register" name="LINBRRH" offset="0xc6" size="1">
|
||||
<bitfield caption="" mask="0x0F" name="LDIV" lsb="8"/>
|
||||
</register>
|
||||
<register caption="LIN Data Length Register" name="LINDLR" offset="0xc7" size="1">
|
||||
<bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
|
||||
<bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
|
||||
</register>
|
||||
<register caption="LIN Identifier Register" name="LINIDR" offset="0xc8" size="1">
|
||||
<bitfield caption="Parity bits" mask="0xC0" name="LP"/>
|
||||
<bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
|
||||
</register>
|
||||
<register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xc9" size="1">
|
||||
<bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
|
||||
<bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
|
||||
</register>
|
||||
<register caption="LIN Data Register" name="LINDAT" offset="0xcA" size="1" ocd-rw="">
|
||||
<bitfield caption="" mask="0xFF" name="LDATA"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="CPU Registers" name="CPU">
|
||||
<register-group caption="CPU Registers" name="CPU">
|
||||
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
||||
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
||||
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
||||
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
||||
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
||||
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
||||
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
||||
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
||||
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
|
||||
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
||||
<bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
|
||||
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
||||
<bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
|
||||
<bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
|
||||
</register>
|
||||
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
|
||||
<bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Slow Oscillator Calibration Register A" name="SOSCCALA" offset="0x66" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Oscillator Calibration Register B" name="SOSCCALB" offset="0x67" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="PLL Control and Status Register" name="PLLCSR" offset="0xd8" size="1">
|
||||
<bitfield caption="PLL Software Enable" mask="0x20" name="SWEN"/>
|
||||
<bitfield caption="PLL Lock" mask="0x10" name="LOCK"/>
|
||||
<bitfield caption="PLL Lock Change Interrupt Flag" mask="0x02" name="PLLCIF"/>
|
||||
<bitfield caption="PLL Lock Change Interrupt Enable" mask="0x01" name="PLLCIE"/>
|
||||
</register>
|
||||
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
||||
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
|
||||
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
|
||||
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
|
||||
<register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x02" name="PA1DID"/>
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x01" name="PA0DID"/>
|
||||
</register>
|
||||
<register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
|
||||
<bitfield caption="Power Reduction LIN UART Interface" mask="0x08" name="PRLIN"/>
|
||||
<bitfield caption="Power reduction SPI" mask="0x04" name="PRSPI"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter1" mask="0x02" name="PRTIM1"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter0" mask="0x01" name="PRTIM0"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="CPU_SLEEP_MODE_3BITS">
|
||||
<value caption="Idle" name="IDLE" value="0x00"/>
|
||||
<value caption="ADC" name="ADC" value="0x01"/>
|
||||
<value caption="Power Down" name="PDOWN" value="0x02"/>
|
||||
<value caption="Power Save" name="PSAVE" value="0x03"/>
|
||||
<value caption="Reserved" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Standby" name="STDBY" value="0x06"/>
|
||||
<value caption="Extended Standby" name="ESTDBY" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="External Interrupts" name="EXINT">
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
||||
<bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
|
||||
<bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
|
||||
</register>
|
||||
<register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
|
||||
<bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
|
||||
</register>
|
||||
<register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
|
||||
<register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x03"/>
|
||||
</register-group>
|
||||
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
||||
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
<register-group caption="Watchdog Timer" name="WDT">
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
<register caption="Watchdog Timer Configuration Lock Register" name="WDTCLR" offset="0x63" size="1">
|
||||
<bitfield caption="Watchdog Timer Comfiguration Lock bits" mask="0x06" name="WDCL"/>
|
||||
<bitfield caption="Watchdog Timer Comfiguration Lock Enable" mask="0x01" name="WDCLE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
|
||||
<value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
|
||||
<value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
|
||||
<value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Wakeup Timer" name="WAKEUP_TIMER">
|
||||
<register-group caption="Wakeup Timer" name="WAKEUP_TIMER">
|
||||
<register caption="Wake-up Timer Control and Status Register" name="WUTCSR" offset="0x62" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Wake-up Timer Interrupt Flag" mask="0x80" name="WUTIF"/>
|
||||
<bitfield caption="Wake-up Timer Interrupt Enable" mask="0x40" name="WUTIE"/>
|
||||
<bitfield caption="Wake-up Timer Reset" mask="0x10" name="WUTR"/>
|
||||
<bitfield caption="Wake-up Timer Enable" mask="0x08" name="WUTE"/>
|
||||
<bitfield caption="Wake-up Timer Prescaler Bits" mask="0x07" name="WUTP"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
</modules>
|
||||
</target-description-file>
|
||||
@@ -1,680 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<target-description-file>
|
||||
<variants>
|
||||
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="4.5"/>
|
||||
</variants>
|
||||
<device name="ATmega8HVA" architecture="AVR8" family="megaAVR">
|
||||
<address-spaces>
|
||||
<address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
|
||||
<memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
|
||||
pagesize="0x80"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
|
||||
<memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
|
||||
<memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
|
||||
<memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
|
||||
<memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
|
||||
<memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
|
||||
<memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
|
||||
</address-space>
|
||||
<address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
|
||||
<memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
|
||||
pagesize="0x04"/>
|
||||
</address-space>
|
||||
<address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
|
||||
</address-spaces>
|
||||
<peripherals>
|
||||
<module name="ADC">
|
||||
<instance name="ADC" caption="Analog-to-Digital Converter">
|
||||
<register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
|
||||
caption="Analog-to-Digital Converter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="WDT">
|
||||
<instance name="WDT" caption="Watchdog Timer">
|
||||
<register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
|
||||
caption="Watchdog Timer"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BANDGAP">
|
||||
<instance name="BANDGAP" caption="Bandgap">
|
||||
<register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
|
||||
caption="Bandgap"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EXINT">
|
||||
<instance name="EXINT" caption="External Interrupts">
|
||||
<register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
|
||||
caption="External Interrupts"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="PORT">
|
||||
<instance name="PORTC" caption="I/O Port">
|
||||
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTA" caption="I/O Port">
|
||||
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
<instance name="PORTB" caption="I/O Port">
|
||||
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
|
||||
caption="I/O Port"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FET">
|
||||
<instance name="FET" caption="FET Control">
|
||||
<register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
|
||||
caption="FET Control"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="SPI">
|
||||
<instance name="SPI" caption="Serial Peripheral Interface">
|
||||
<register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
|
||||
caption="Serial Peripheral Interface"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BOOT_LOAD">
|
||||
<instance name="BOOT_LOAD" caption="Bootloader">
|
||||
<register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
|
||||
caption="Bootloader"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="CPU">
|
||||
<instance name="CPU" caption="CPU Registers">
|
||||
<register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
|
||||
caption="CPU Registers"/>
|
||||
<parameters>
|
||||
<param name="CORE_VERSION" value="V2E"/>
|
||||
</parameters>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="BATTERY_PROTECTION">
|
||||
<instance name="BATTERY_PROTECTION" caption="Battery Protection">
|
||||
<register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
|
||||
address-space="data" caption="Battery Protection"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="EEPROM">
|
||||
<instance name="EEPROM" caption="EEPROM">
|
||||
<register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
|
||||
caption="EEPROM"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="TC16">
|
||||
<instance name="TC1" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
<instance name="TC0" caption="Timer/Counter, 16-bit">
|
||||
<register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
|
||||
caption="Timer/Counter, 16-bit"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="COULOMB_COUNTER">
|
||||
<instance name="COULOMB_COUNTER" caption="Coulomb Counter">
|
||||
<register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
|
||||
address-space="data" caption="Coulomb Counter"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="VOLTAGE_REGULATOR">
|
||||
<instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
|
||||
<register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
|
||||
address-space="data" caption="Voltage Regulator"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="FUSE">
|
||||
<instance name="FUSE" caption="Fuses">
|
||||
<register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
|
||||
caption="Fuses"/>
|
||||
</instance>
|
||||
</module>
|
||||
<module name="LOCKBIT">
|
||||
<instance name="LOCKBIT" caption="Lockbits">
|
||||
<register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
|
||||
caption="Lockbits"/>
|
||||
</instance>
|
||||
</module>
|
||||
</peripherals>
|
||||
<interrupts>
|
||||
<interrupt index="0" name="RESET"
|
||||
caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
|
||||
<interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
|
||||
<interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
|
||||
<interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
|
||||
<interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
|
||||
<interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
|
||||
<interrupt index="6" name="WDT" caption="Watchdog Timeout Interrupt"/>
|
||||
<interrupt index="7" name="TIMER1_IC" caption="Timer 1 Input capture"/>
|
||||
<interrupt index="8" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
|
||||
<interrupt index="9" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
|
||||
<interrupt index="10" name="TIMER1_OVF" caption="Timer 1 overflow"/>
|
||||
<interrupt index="11" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
|
||||
<interrupt index="12" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
|
||||
<interrupt index="13" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
|
||||
<interrupt index="14" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
|
||||
<interrupt index="15" name="SPI_STC" caption="SPI Serial transfer complete"/>
|
||||
<interrupt index="16" name="VADC" caption="Voltage ADC Conversion Complete"/>
|
||||
<interrupt index="17" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
|
||||
<interrupt index="18" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
|
||||
<interrupt index="19" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
|
||||
<interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
|
||||
</interrupts>
|
||||
<interfaces>
|
||||
<interface name="ISP" type="isp"/>
|
||||
<interface name="HVSP" type="hvsp"/>
|
||||
<interface name="debugWIRE" type="dw"/>
|
||||
</interfaces>
|
||||
<property-groups>
|
||||
<property-group name="SIGNATURES">
|
||||
<property name="JTAGID" value="0x9310"/>
|
||||
<property name="SIGNATURE0" value="0x1e"/>
|
||||
<property name="SIGNATURE1" value="0x93"/>
|
||||
<property name="SIGNATURE2" value="0x10"/>
|
||||
</property-group>
|
||||
<property-group name="OCD">
|
||||
<property name="OCD_REVISION" value="1"/>
|
||||
<property name="OCD_DATAREG" value="0x31"/>
|
||||
<property name="PROGBASE" value="0x0000"/>
|
||||
</property-group>
|
||||
<property-group name="JTAG_INTERFACE">
|
||||
<property name="ALLOWFULLPAGESTREAM" value="0x00"/>
|
||||
</property-group>
|
||||
<property-group name="ISP_INTERFACE">
|
||||
<property name="IspEnterProgMode_timeout" value="200"/>
|
||||
<property name="IspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="IspEnterProgMode_cmdexeDelay" value="25"/>
|
||||
<property name="IspEnterProgMode_synchLoops" value="32"/>
|
||||
<property name="IspEnterProgMode_byteDelay" value="0"/>
|
||||
<property name="IspEnterProgMode_pollIndex" value="3"/>
|
||||
<property name="IspEnterProgMode_pollValue" value="0x53"/>
|
||||
<property name="IspLeaveProgMode_preDelay" value="1"/>
|
||||
<property name="IspLeaveProgMode_postDelay" value="1"/>
|
||||
<property name="IspChipErase_eraseDelay" value="20"/>
|
||||
<property name="IspChipErase_pollMethod" value="1"/>
|
||||
<property name="IspProgramFlash_mode" value="0x41"/>
|
||||
<property name="IspProgramFlash_blockSize" value="128"/>
|
||||
<property name="IspProgramFlash_delay" value="10"/>
|
||||
<property name="IspProgramFlash_cmd1" value="0x40"/>
|
||||
<property name="IspProgramFlash_cmd2" value="0x4C"/>
|
||||
<property name="IspProgramFlash_cmd3" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramFlash_pollVal2" value="0x00"/>
|
||||
<property name="IspProgramEeprom_mode" value="0x41"/>
|
||||
<property name="IspProgramEeprom_blockSize" value="4"/>
|
||||
<property name="IspProgramEeprom_delay" value="20"/>
|
||||
<property name="IspProgramEeprom_cmd1" value="0xC1"/>
|
||||
<property name="IspProgramEeprom_cmd2" value="0xC2"/>
|
||||
<property name="IspProgramEeprom_cmd3" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal1" value="0x00"/>
|
||||
<property name="IspProgramEeprom_pollVal2" value="0x00"/>
|
||||
<property name="IspReadFlash_blockSize" value="256"/>
|
||||
<property name="IspReadEeprom_blockSize" value="256"/>
|
||||
<property name="IspReadFuse_pollIndex" value="4"/>
|
||||
<property name="IspReadLock_pollIndex" value="4"/>
|
||||
<property name="IspReadSign_pollIndex" value="4"/>
|
||||
<property name="IspReadOsccal_pollIndex" value="4"/>
|
||||
</property-group>
|
||||
<property-group name="HVSP_INTERFACE">
|
||||
<property name="HvspControlStack"
|
||||
value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
|
||||
<property name="HvspEnterProgMode_stabDelay" value="100"/>
|
||||
<property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
|
||||
<property name="HvspEnterProgMode_synchCycles" value="6"/>
|
||||
<property name="HvspEnterProgMode_latchCycles" value="1"/>
|
||||
<property name="HvspEnterProgMode_toggleVtg" value="1"/>
|
||||
<property name="HvspEnterProgMode_powoffDelay" value="25"/>
|
||||
<property name="HvspEnterProgMode_resetDelay1" value="1"/>
|
||||
<property name="HvspEnterProgMode_resetDelay2" value="70"/>
|
||||
<property name="HvspLeaveProgMode_stabDelay" value="101"/>
|
||||
<property name="HvspLeaveProgMode_resetDelay" value="26"/>
|
||||
<property name="HvspChipErase_pollTimeout" value="40"/>
|
||||
<property name="HvspChipErase_eraseTime" value="1"/>
|
||||
<property name="HvspProgramFlash_mode" value="0x0D"/>
|
||||
<property name="HvspProgramFlash_blockSize" value="256"/>
|
||||
<property name="HvspProgramFlash_pollTimeout" value="6"/>
|
||||
<property name="HvspReadFlash_blockSize" value="256"/>
|
||||
<property name="HvspProgramEeprom_mode" value="0x05"/>
|
||||
<property name="HvspProgramEeprom_blockSize" value="256"/>
|
||||
<property name="HvspProgramEeprom_pollTimeout" value="5"/>
|
||||
<property name="HvspReadEeprom_blockSize" value="256"/>
|
||||
<property name="HvspProgramFuse_pollTimeout" value="25"/>
|
||||
<property name="HvspProgramLock_pollTimeout" value="25"/>
|
||||
</property-group>
|
||||
</property-groups>
|
||||
</device>
|
||||
<modules>
|
||||
<module caption="Fuses" name="FUSE">
|
||||
<register-group caption="Fuses" name="FUSE">
|
||||
<register caption="" name="LOW" offset="0x00" size="1" initval="0xDF">
|
||||
<bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
|
||||
<bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
|
||||
<bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
|
||||
<bitfield caption="Debug Wire enable" mask="0x10" name="DWEN"/>
|
||||
<bitfield caption="Self Programming enable" mask="0x08" name="SELFPRGEN"/>
|
||||
<bitfield caption="Select start-up time" mask="0x07" name="SUT" values="ENUM_SUT"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_SUT">
|
||||
<value caption="Start-up time 6 CK/14 CK + 4 ms" name="6CK_14CK_4MS" value="0x00"/>
|
||||
<value caption="Start-up time 6 CK/14 CK + 8 ms" name="6CK_14CK_8MS" value="0x01"/>
|
||||
<value caption="Start-up time 6 CK/14 CK + 16 ms" name="6CK_14CK_16MS" value="0x02"/>
|
||||
<value caption="Start-up time 6 CK/14 CK + 32 ms" name="6CK_14CK_32MS" value="0x03"/>
|
||||
<value caption="Start-up time 6 CK/14 CK + 64 ms" name="6CK_14CK_64MS" value="0x04"/>
|
||||
<value caption="Start-up time 6 CK/14 CK + 128 ms" name="6CK_14CK_128MS" value="0x05"/>
|
||||
<value caption="Start-up time 6 CK/14 CK + 256 ms" name="6CK_14CK_256MS" value="0x06"/>
|
||||
<value caption="Start-up time 6 CK/14 CK + 512 ms" name="6CK_14CK_512MS" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Lockbits" name="LOCKBIT">
|
||||
<register-group caption="Lockbits" name="LOCKBIT">
|
||||
<register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
|
||||
<bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="ENUM_LB">
|
||||
<value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
|
||||
<value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
|
||||
<value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register-group caption="Analog-to-Digital Converter" name="ADC">
|
||||
<register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
|
||||
<bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
|
||||
</register>
|
||||
<register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
|
||||
<register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
|
||||
<bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
|
||||
<bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Watchdog Timer" name="WDT">
|
||||
<register-group caption="Watchdog Timer" name="WDT">
|
||||
<register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
|
||||
<bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
|
||||
<bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
|
||||
<bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
|
||||
values="WDOG_TIMER_PRESCALE_4BITS"/>
|
||||
<bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
|
||||
<bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
|
||||
<value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
|
||||
<value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
|
||||
<value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Bandgap" name="BANDGAP">
|
||||
<register-group caption="Bandgap" name="BANDGAP">
|
||||
<register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
|
||||
mask="0xFF">
|
||||
<bitfield caption="Bandgap calibration bits" mask="0xFF" name="BGCR"/>
|
||||
</register>
|
||||
<register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
|
||||
<bitfield
|
||||
caption="Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared before enabling CC-ADC or V-ADC, and must remain unset while either ADC is enabled."
|
||||
mask="0x80" name="BGD"/>
|
||||
<bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="External Interrupts" name="EXINT">
|
||||
<register-group caption="External Interrupts" name="EXINT">
|
||||
<register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
|
||||
<bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
<bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
|
||||
values="INTERRUPT_SENSE_CONTROL"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
|
||||
<bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
|
||||
</register>
|
||||
<register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
|
||||
<bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
|
||||
<value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="I/O Port" name="PORT">
|
||||
<register-group caption="I/O Port" name="PORTC">
|
||||
<register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x01"/>
|
||||
<register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x01" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTA">
|
||||
<register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x03"/>
|
||||
<register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x03"/>
|
||||
<register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x03" ocd-rw="R"/>
|
||||
</register-group>
|
||||
<register-group caption="I/O Port" name="PORTB">
|
||||
<register caption="Data Register, Port B" name="PORTB" offset="0x25" size="1" mask="0x0F"/>
|
||||
<register caption="Data Direction Register, Port B" name="DDRB" offset="0x24" size="1" mask="0x0F"/>
|
||||
<register caption="Input Pins, Port B" name="PINB" offset="0x23" size="1" mask="0x0F" ocd-rw="R"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="FET Control" name="FET">
|
||||
<register-group caption="FET Control" name="FET">
|
||||
<register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
|
||||
<bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
|
||||
<bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
|
||||
<bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
|
||||
<bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Serial Peripheral Interface" name="SPI">
|
||||
<register-group caption="Serial Peripheral Interface" name="SPI">
|
||||
<register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
|
||||
<bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
|
||||
<bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
|
||||
<bitfield caption="Data Order" mask="0x20" name="DORD"/>
|
||||
<bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
|
||||
<bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
|
||||
<bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
|
||||
<bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
|
||||
</register>
|
||||
<register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
|
||||
<bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
|
||||
<bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
|
||||
<bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
|
||||
</register>
|
||||
<register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
|
||||
</register-group>
|
||||
<value-group caption="" name="COMM_SCK_RATE_3BIT">
|
||||
<value caption="fosc/4" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="fosc/16" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="fosc/64" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="fosc/128" name="VAL_0x03" value="0x03"/>
|
||||
<value caption="fosc/2" name="VAL_0x04" value="0x04"/>
|
||||
<value caption="fosc/8" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="fosc/32" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="fosc/64" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Bootloader" name="BOOT_LOAD">
|
||||
<register-group caption="Bootloader" name="BOOT_LOAD">
|
||||
<register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
|
||||
size="1">
|
||||
<bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
|
||||
<bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
|
||||
<bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
|
||||
<bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
|
||||
<bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
|
||||
<bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="CPU Registers" name="CPU">
|
||||
<register-group caption="CPU Registers" name="CPU">
|
||||
<register caption="Status Register" name="SREG" offset="0x5F" size="1">
|
||||
<bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
|
||||
<bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
|
||||
<bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
|
||||
<bitfield caption="Sign Bit" mask="0x10" name="S"/>
|
||||
<bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
|
||||
<bitfield caption="Negative Flag" mask="0x04" name="N"/>
|
||||
<bitfield caption="Zero Flag" mask="0x02" name="Z"/>
|
||||
<bitfield caption="Carry Flag" mask="0x01" name="C"/>
|
||||
</register>
|
||||
<register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
|
||||
<register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
|
||||
<bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
|
||||
<bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
|
||||
</register>
|
||||
<register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
|
||||
<bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
|
||||
<bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
|
||||
<bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
|
||||
<bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
|
||||
<bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
|
||||
</register>
|
||||
<register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
|
||||
mask="0xFF"/>
|
||||
<register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
|
||||
offset="0x37" size="1" ocd-rw="R">
|
||||
<bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
|
||||
<bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
|
||||
</register>
|
||||
<register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
|
||||
<bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
|
||||
<bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
|
||||
</register>
|
||||
<register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
|
||||
<register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
|
||||
<register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
|
||||
<register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x02" name="PA1DID"/>
|
||||
<bitfield
|
||||
caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
|
||||
mask="0x01" name="PA0DID"/>
|
||||
</register>
|
||||
<register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
|
||||
<bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
|
||||
<bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
|
||||
<bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
|
||||
<bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
|
||||
</register>
|
||||
<register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
|
||||
<bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
|
||||
<bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group name="CPU_SLEEP_MODE_3BITS" caption="">
|
||||
<value caption="Idle" name="IDLE" value="0x00"/>
|
||||
<value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
|
||||
<value caption="Reserved" name="VAL_0x02" value="0x02"/>
|
||||
<value caption="Power Save" name="PSAVE" value="0x03"/>
|
||||
<value caption="Power Off" name="POFF" value="0x04"/>
|
||||
<value caption="Reserved" name="VAL_0x05" value="0x05"/>
|
||||
<value caption="Reserved" name="VAL_0x06" value="0x06"/>
|
||||
<value caption="Reserved" name="VAL_0x07" value="0x07"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register-group caption="Battery Protection" name="BATTERY_PROTECTION">
|
||||
<register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
|
||||
<bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
|
||||
<bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
|
||||
<bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
|
||||
<bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
|
||||
<bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
|
||||
<bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
|
||||
size="1" mask="0x3F"/>
|
||||
<register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
|
||||
mask="0x3F"/>
|
||||
<register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
|
||||
size="1" mask="0x7F"/>
|
||||
<register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
|
||||
offset="0xF9" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
|
||||
offset="0xF8" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
|
||||
offset="0xF7" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
|
||||
offset="0xF6" size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
|
||||
size="1" mask="0xFF"/>
|
||||
<register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
|
||||
name="DOCIF"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
|
||||
name="COCIF"/>
|
||||
<bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
|
||||
<bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
|
||||
</register>
|
||||
<register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
|
||||
<bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
|
||||
<bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
|
||||
name="DOCIE"/>
|
||||
<bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
|
||||
name="COCIE"/>
|
||||
<bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
|
||||
name="DHCIE"/>
|
||||
<bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="EEPROM" name="EEPROM">
|
||||
<register-group caption="EEPROM" name="EEPROM">
|
||||
<register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
|
||||
<register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
|
||||
<bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
|
||||
<bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
|
||||
<bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
|
||||
<bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
|
||||
<bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<value-group caption="" name="EEP_MODE">
|
||||
<value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
|
||||
<value caption="Erase Only" name="VAL_0x01" value="0x01"/>
|
||||
<value caption="Write Only" name="VAL_0x02" value="0x02"/>
|
||||
</value-group>
|
||||
</module>
|
||||
<module caption="Timer/Counter, 16-bit" name="TC16">
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC1">
|
||||
<register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
|
||||
<bitfield caption="Clock Select1 bis" mask="0x07" name="CS" lsb="10"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
|
||||
<bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
|
||||
<register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
|
||||
<bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
|
||||
<bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
|
||||
</register>
|
||||
<register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
|
||||
<bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
|
||||
<bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
|
||||
</register>
|
||||
</register-group>
|
||||
<register-group caption="Timer/Counter, 16-bit" name="TC0">
|
||||
<register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
|
||||
<bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
|
||||
<bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
|
||||
<bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
|
||||
<bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
|
||||
<bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="WGM00"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter0 Control Register" name="TCCR0B" offset="0x45" size="1">
|
||||
<bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
|
||||
<bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
|
||||
<bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00"/>
|
||||
</register>
|
||||
<register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
|
||||
<register caption="Output compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
|
||||
<register caption="Output compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
|
||||
<register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
|
||||
<bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
|
||||
<bitfield caption="Output Compare Interrupt Enable" mask="0x04" name="OCIE0B"/>
|
||||
<bitfield caption="Output Compare Interrupt Enable" mask="0x02" name="OCIE0A"/>
|
||||
<bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
|
||||
</register>
|
||||
<register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="Timer/Counter Interrupt Flag Register" mask="0x08" name="ICF0"/>
|
||||
<bitfield caption="Output Compare Flag" mask="0x04" name="OCF0B"/>
|
||||
<bitfield caption="Output Compare Flag" mask="0x02" name="OCF0A"/>
|
||||
<bitfield caption="Overflow Flag" mask="0x01" name="TOV0"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
|
||||
<register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE4" size="1">
|
||||
<bitfield
|
||||
caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
|
||||
mask="0x80" name="CADEN"/>
|
||||
<bitfield caption="" mask="0x40" name="CADPOL"/>
|
||||
<bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
|
||||
<bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
|
||||
<bitfield
|
||||
caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
|
||||
mask="0x06" name="CADSI"/>
|
||||
<bitfield
|
||||
caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
|
||||
mask="0x01" name="CADSE"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE5" size="1">
|
||||
<bitfield caption="" mask="0x40" name="CADACIE"/>
|
||||
<bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
|
||||
<bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
|
||||
<bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
|
||||
<bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
|
||||
</register>
|
||||
<register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE8" size="2" mask="0xFFFF"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF" ocd-rw="R"/>
|
||||
<register caption="CC-ADC Regular Current" name="CADRC" offset="0xE6" size="1" mask="0xFF"/>
|
||||
</register-group>
|
||||
</module>
|
||||
<module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
|
||||
<register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
|
||||
ocd-rw="R">
|
||||
<bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
|
||||
<bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
|
||||
<bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
|
||||
</register>
|
||||
</register-group>
|
||||
</module>
|
||||
</modules>
|
||||
</target-description-file>
|
||||
Reference in New Issue
Block a user