diff --git a/src/Targets/TargetDescriptionFiles/RISC-V/WCH/CH32V003.xml b/src/Targets/TargetDescriptionFiles/RISC-V/WCH/CH32V003.xml
new file mode 100644
index 00000000..f94a36cb
--- /dev/null
+++ b/src/Targets/TargetDescriptionFiles/RISC-V/WCH/CH32V003.xml
@@ -0,0 +1,2128 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<device name="CH32V003" family="RISCV" configuration-value="ch32v003" architecture="RV32EC_Zicsr" vendor="WCH">
+    <property-groups>
+        <property-group key="wch_link_interface">
+            <property key="programming_opcode_key" value="op2"/>
+            <property key="programming_block_size" value="1024"/>
+        </property-group>
+        <property-group key="riscv_debug_module">
+            <property key="trigger_count" value="0"/>
+        </property-group>
+    </property-groups>
+    <address-spaces>
+        <address-space key="system" start="0x00000000" size="3759144960" endianness="little">
+            <memory-segment key="mapped_program_memory" name="Mapped Program Memory" type="aliased" start="0x00000000" size="16384" page-size="64" access="R" executable="1"/>
+            <memory-segment key="main_program" name="Main Program Memory" type="flash" start="0x08000000" size="16384" access="RW" page-size="64" executable="1"/>
+            <memory-segment key="boot_program" name="Boot Program Memory" type="flash" start="0x1FFFF000" size="1920" page-size="64" access="RW" executable="1"/>
+            <memory-segment key="vendor_config" name="Vendor Configuration" type="flash" start="0x1FFFF7C0" size="64" page-size="64" access="R" executable="0"/>
+            <memory-segment key="user_config" name="User Configuration" type="flash" start="0x1FFFF800" size="64" page-size="64" access="RW" executable="0"/>
+            <memory-segment key="internal_ram" name="Internal RAM" type="ram" start="0x20000000" size="2048" access="RW" executable="0"/>
+            <memory-segment key="peripherals" name="Peripherals" type="io" start="0x40000000" size="146432" access="RW" executable="0"/>
+            <memory-segment key="core_private_peripherals" name="Core Private Peripherals" type="io" start="0xE0000000" size="1048576" access="RW" executable="0"/>
+        </address-space>
+        <address-space key="csr" start="0x00000000" size="16384" unit-size="4" endianness="little">
+            <memory-segment key="csr" name="Control and Status Registers" type="registers" start="0x00000000" size="16384" access="RW" executable="0"/>
+        </address-space>
+        <address-space key="gpr" start="0x00001000" size="128" unit-size="4" endianness="little">
+            <memory-segment key="gpr" name="General Purpose Registers" type="gp_registers" start="0x00001000" size="128" access="RW" executable="0"/>
+        </address-space>
+    </address-spaces>
+    <physical-interfaces>
+        <physical-interface value="sdi">
+            <signals>
+                <signal name="SWIO" pad-key="pd1"/>
+            </signals>
+        </physical-interface>
+    </physical-interfaces>
+    <peripherals>
+        <peripheral key="pwr" name="PWR" module-key="pwr">
+            <register-group-instance register-group-key="pwr" address-space-key="system" offset="0x40007000"/>
+        </peripheral>
+        <peripheral key="rcc" name="RCC" module-key="rcc">
+            <register-group-instance register-group-key="rcc" address-space-key="system" offset="0x40021000"/>
+        </peripheral>
+        <peripheral key="iwdg" name="IWDG" module-key="iwdg">
+            <register-group-instance register-group-key="iwdg" address-space-key="system" offset="0x40003000"/>
+        </peripheral>
+        <peripheral key="wwdg" name="WWDG" module-key="wwdg">
+            <register-group-instance register-group-key="wwdg" address-space-key="system" offset="0x40002C00"/>
+        </peripheral>
+        <peripheral key="exti" name="EXTI" module-key="pfic">
+            <register-group-instance register-group-key="exti" address-space-key="system" offset="0x40010400"/>
+            <signals>
+                <signal name="CH1" pad-key="pa1" alternative="false"/>
+                <signal name="CH2" pad-key="pa2" alternative="false"/>
+                <signal name="CH0" pad-key="pc0" alternative="true"/>
+                <signal name="CH1" pad-key="pc1" alternative="true"/>
+                <signal name="CH2" pad-key="pc2" alternative="true"/>
+                <signal name="CH3" pad-key="pc3" alternative="true"/>
+                <signal name="CH4" pad-key="pc4" alternative="true"/>
+                <signal name="CH5" pad-key="pc5" alternative="true"/>
+                <signal name="CH6" pad-key="pc6" alternative="true"/>
+                <signal name="CH7" pad-key="pc7" alternative="true"/>
+                <signal name="CH0" pad-key="pd0" alternative="true"/>
+                <signal name="CH1" pad-key="pd1" alternative="true"/>
+                <signal name="CH2" pad-key="pd2" alternative="true"/>
+                <signal name="CH3" pad-key="pd3" alternative="true"/>
+                <signal name="CH4" pad-key="pd4" alternative="true"/>
+                <signal name="CH5" pad-key="pd5" alternative="true"/>
+                <signal name="CH6" pad-key="pd6" alternative="true"/>
+                <signal name="CH7" pad-key="pd7" alternative="true"/>
+            </signals>
+        </peripheral>
+        <peripheral key="pfic" name="PFIC" module-key="pfic">
+            <register-group-instance register-group-key="pfic" address-space-key="system" offset="0xE000E000"/>
+            <register-group-instance register-group-key="stk" address-space-key="system" offset="0xE000F000"/>
+        </peripheral>
+        <peripheral key="porta" name="PORTA" module-key="gpio_port">
+            <register-group-instance register-group-key="port" address-space-key="system" offset="0x40010800"/>
+            <signals>
+                <signal name="PA1" pad-key="pa1"/>
+                <signal name="PA2" pad-key="pa2"/>
+            </signals>
+        </peripheral>
+        <peripheral key="portc" name="PORTC" module-key="gpio_port">
+            <register-group-instance register-group-key="port" address-space-key="system" offset="0x40011000"/>
+            <signals>
+                <signal name="PC0" pad-key="pc0"/>
+                <signal name="PC1" pad-key="pc1"/>
+                <signal name="PC2" pad-key="pc2"/>
+                <signal name="PC3" pad-key="pc3"/>
+                <signal name="PC4" pad-key="pc4"/>
+                <signal name="PC5" pad-key="pc5"/>
+                <signal name="PC6" pad-key="pc6"/>
+                <signal name="PC7" pad-key="pc7"/>
+            </signals>
+        </peripheral>
+        <peripheral key="portd" name="PORTD" module-key="gpio_port">
+            <register-group-instance register-group-key="port" address-space-key="system" offset="0x40011400"/>
+            <signals>
+                <signal name="PD0" pad-key="pd0"/>
+                <signal name="PD1" pad-key="pd1"/>
+                <signal name="PD2" pad-key="pd2"/>
+                <signal name="PD3" pad-key="pd3"/>
+                <signal name="PD4" pad-key="pd4"/>
+                <signal name="PD5" pad-key="pd5"/>
+                <signal name="PD6" pad-key="pd6"/>
+                <signal name="PD7" pad-key="pd7"/>
+            </signals>
+        </peripheral>
+        <peripheral key="afio" name="AFIO" module-key="gpio_port">
+            <register-group-instance register-group-key="afio" address-space-key="system" offset="0x40010000"/>
+        </peripheral>
+        <peripheral key="dma" name="DMA" module-key="dma">
+            <register-group-instance register-group-key="dma" address-space-key="system" offset="0x40020000"/>
+            <register-group-instance key="ch1" name="CH1" register-group-key="channel" address-space-key="system" offset="0x40020008"/>
+            <register-group-instance key="ch2" name="CH2" register-group-key="channel" address-space-key="system" offset="0x4002001C"/>
+            <register-group-instance key="ch3" name="CH3" register-group-key="channel" address-space-key="system" offset="0x40020030"/>
+            <register-group-instance key="ch4" name="CH4" register-group-key="channel" address-space-key="system" offset="0x40020044"/>
+            <register-group-instance key="ch5" name="CH5" register-group-key="channel" address-space-key="system" offset="0x40020058"/>
+            <register-group-instance key="ch6" name="CH6" register-group-key="channel" address-space-key="system" offset="0x4002006C"/>
+            <register-group-instance key="ch7" name="CH7" register-group-key="channel" address-space-key="system" offset="0x40020080"/>
+        </peripheral>
+        <peripheral key="adc" name="ADC" module-key="adc">
+            <register-group-instance register-group-key="adc" address-space-key="system" offset="0x40012400"/>
+            <signals>
+                <signal name="CH0" pad-key="pa2"/>
+                <signal name="CH1" pad-key="pa1"/>
+                <signal name="CH2" pad-key="pc4"/>
+                <signal name="CH3" pad-key="pd2"/>
+                <signal name="CH4" pad-key="pd3"/>
+                <signal name="CH5" pad-key="pd5"/>
+                <signal name="CH6" pad-key="pd6"/>
+                <signal name="CH7" pad-key="pd4"/>
+            </signals>
+        </peripheral>
+        <peripheral key="tim1" name="TIM1" module-key="adtm">
+            <register-group-instance register-group-key="adtm" address-space-key="system" offset="0x40012C00"/>
+            <signals>
+                <signal name="CH1" pad-key="pd2" alternative="false"/>
+                <signal name="CH2" pad-key="pa1" alternative="false"/>
+                <signal name="CH3" pad-key="pc3" alternative="false"/>
+                <signal name="CH4" pad-key="pc4" alternative="false"/>
+                <signal name="ETR" pad-key="pc5" alternative="false"/>
+                <signal name="BKIN" pad-key="pc2" alternative="false"/>
+                <signal name="CH1N" pad-key="pd0" alternative="false"/>
+                <signal name="CH2N" pad-key="pa2" alternative="false"/>
+                <signal name="CH3N" pad-key="pd1" alternative="false"/>
+            </signals>
+        </peripheral>
+        <peripheral key="tim2" name="TIM2" module-key="gptm">
+            <register-group-instance register-group-key="gptm" address-space-key="system" offset="0x40000000"/>
+            <signals>
+                <signal name="CH1/ETR" pad-key="pd4" alternative="false"/>
+                <signal name="CH2" pad-key="pd3" alternative="false"/>
+                <signal name="CH3" pad-key="pc0" alternative="false"/>
+                <signal name="CH4" pad-key="pd7" alternative="false"/>
+            </signals>
+        </peripheral>
+        <peripheral key="usart1" name="USART1" module-key="usart">
+            <register-group-instance register-group-key="usart" address-space-key="system" offset="0x40013800"/>
+            <signals>
+                <signal name="RX" pad-key="pd6" alternative="false"/>
+                <signal name="CTS" pad-key="pd3" alternative="false"/>
+                <signal name="TX" pad-key="pd5" alternative="false"/>
+                <signal name="CK" pad-key="pd4" alternative="false"/>
+                <signal name="RTS" pad-key="pc2" alternative="false"/>
+            </signals>
+        </peripheral>
+        <peripheral key="i2c1" name="I2C1" module-key="i2c">
+            <register-group-instance register-group-key="i2c" address-space-key="system" offset="0x40005400"/>
+            <signals>
+                <signal name="SCL" pad-key="pc2" alternative="false"/>
+                <signal name="SDA" pad-key="pc1" alternative="false"/>
+                <signal name="SCL" pad-key="pd1" alternative="true"/>
+                <signal name="SDA" pad-key="pd0" alternative="true"/>
+                <signal name="SCL" pad-key="pc5" alternative="true"/>
+                <signal name="SDA" pad-key="pc6" alternative="true"/>
+            </signals>
+        </peripheral>
+        <peripheral key="spi1" name="SPI1" module-key="spi">
+            <register-group-instance register-group-key="spi" address-space-key="system" offset="0x40013000"/>
+            <signals>
+                <signal name="NSS" pad-key="pc1" alternative="false"/>
+                <signal name="CK" pad-key="pc5" alternative="false"/>
+                <signal name="MISO" pad-key="pc7" alternative="false"/>
+                <signal name="MOSI" pad-key="pc6" alternative="false"/>
+                <signal name="NSS" pad-key="pc0" alternative="true"/>
+            </signals>
+        </peripheral>
+        <peripheral key="esig" name="ESIG" module-key="esig">
+            <register-group-instance register-group-key="esig" address-space-key="system" offset="0x1FFFF7E0"/>
+        </peripheral>
+        <peripheral key="flash" name="FLASH" module-key="flash">
+            <register-group-instance register-group-key="flash" address-space-key="system" offset="0x40022000"/>
+        </peripheral>
+        <peripheral key="extend" name="EXTEND" module-key="extend">
+            <register-group-instance register-group-key="extend" address-space-key="system" offset="0x40023800"/>
+        </peripheral>
+        <peripheral key="debug" name="DEBUG" module-key="debug">
+            <register-group-instance register-group-key="debug" address-space-key="csr" offset="0x000007C0"/>
+        </peripheral>
+    </peripherals>
+    <modules>
+        <module key="pwr" name="PWR" description="Power Control">
+            <register-group key="pwr" name="PWR">
+                <register key="ctrl" name="CTRL" description="Power Control" offset="0x00" size="4" initial-value="0x00000400" access="RW">
+                    <bit-field key="pls" name="PLS" mask="0x000000E0" access="RW"/>
+                    <bit-field key="pvde" name="PVDE" mask="0x00000010" access="RW"/>
+                    <bit-field key="pdds" name="PDDS" description="Power-Down Deep Sleep Mode" mask="0x00000002" access="RW"/>
+                </register>
+                <register key="csr" name="CSR" description="Power Control/Status" offset="0x04" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="pvd0" name="PVD0" description="PVD Output Status" mask="0x00000004" access="RW"/>
+                </register>
+                <register key="awucsr" name="AWUCSR" description="Auto-wakeup Control/Status" offset="0x08" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="awuen" name="AWUEN" description="Automatic Wake-up Enable" mask="0x00000002" access="RW"/>
+                </register>
+                <register key="awuwr" name="AWUWR" description="Auto-wakeup Window Comparison Value" offset="0x0C" size="4" initial-value="0x0000003F" access="RW">
+                    <bit-field key="awuwr" name="AWUWR" mask="0x0000003F" access="RW"/>
+                </register>
+                <register key="awupsc" name="AWUPSC" description="Auto-wakeup Crossover Factor" offset="0x10" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="awupsc" name="AWUPSC" mask="0x0000000F" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="rcc" name="RCC" description="Reset and Clock Control">
+            <register-group key="rcc" name="RCC">
+                <register key="ctrl" name="CTRL" description="Clock Control" offset="0x00" size="4" access="RW">
+                    <bit-field key="pllrdy" name="PLLRDY" mask="0x02000000" access="R"/>
+                    <bit-field key="pllon" name="PLLON" mask="0x01000000" access="RW"/>
+                    <bit-field key="csson" name="CSSON" mask="0x00080000" access="RW"/>
+                    <bit-field key="hsebyp" name="HSEBYP" mask="0x00040000" access="RW"/>
+                    <bit-field key="hserdy" name="HSERDY" mask="0x00020000" access="R"/>
+                    <bit-field key="hseon" name="HSEON" mask="0x00010000" access="RW"/>
+                    <bit-field key="hsical" name="HSICAL" description="Internal High-Speed Clock Calibration" mask="0x0000FF00" access="R"/>
+                    <bit-field key="hsitrim" name="HSITRIM" description="Internal High-Speed Clock Adjustment" mask="0x000000F8" access="RW"/>
+                    <bit-field key="hsirdy" name="HSIRDY" description="Internal High-Speed Clock Stable Flag" mask="0x00000002" access="R"/>
+                    <bit-field key="hsion" name="HSION" description="Internal High-Speed Clock Enable" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="cfgr0" name="CFGR0" description="Clock Configuration 0" offset="0x04" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="mco" name="MCO" description="MCO Pin Clock Output Control" mask="0x07000000" access="RW"/>
+                    <bit-field key="pllsrc" name="PLLSRC" mask="0x00010000" access="RW"/>
+                    <bit-field key="adcpre" name="ADCPRE" mask="0x0000F800" access="RW"/>
+                    <bit-field key="hpre" name="HPRE" description="HB Clock Prescale Control" mask="0x000000F0" access="RW"/>
+                    <bit-field key="sws" name="SWS" mask="0x0000000C" access="R"/>
+                    <bit-field key="sw" name="SW" mask="0x00000003" access="RW"/>
+                </register>
+                <register key="intr" name="INTR" description="Clock Interrupt" offset="0x08" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="cssc" name="CSSC" mask="0x00800000" access="W"/>
+                    <bit-field key="pllrdyc" name="PLLRDYC" mask="0x00100000" access="W"/>
+                    <bit-field key="hserdyc" name="HSERDYC" mask="0x00080000" access="W"/>
+                    <bit-field key="hsirdyc" name="HSIRDYC" mask="0x00040000" access="W"/>
+                    <bit-field key="lsirdyc" name="LSIRDYC" mask="0x00010000" access="W"/>
+                    <bit-field key="pllrdyie" name="PLLRDYIE" mask="0x00001000" access="RW"/>
+                    <bit-field key="hserdyie" name="HSERDYIE" mask="0x00000800" access="RW"/>
+                    <bit-field key="hsirdyie" name="HSIRDYIE" mask="0x00000400" access="RW"/>
+                    <bit-field key="lsirdyie" name="LSIRDYIE" mask="0x00000100" access="RW"/>
+                    <bit-field key="cssf" name="CSSF" mask="0x00000080" access="R"/>
+                    <bit-field key="pllrdyf" name="PLLRDYF" mask="0x00000010" access="R"/>
+                    <bit-field key="hserdyf" name="HSERDYF" mask="0x00000008" access="R"/>
+                    <bit-field key="hsirdyf" name="HSIRDYF" mask="0x00000004" access="R"/>
+                    <bit-field key="lsirdyf" name="LSIRDYF" mask="0x00000001" access="R"/>
+                </register>
+                <register key="apb2prstr" name="APB2PRSTR" description="PB2 Peripheral Reset" offset="0x0C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="usart1rst" name="USART1RST" description="USART1 Interface Reset Control" mask="0x00004000" access="RW"/>
+                    <bit-field key="spi1rst" name="SPI1RST" description="SPI1 Module Reset Control" mask="0x00001000" access="RW"/>
+                    <bit-field key="tim1rst" name="TIM1RST" description="TIM1 Module Reset Control" mask="0x00000800" access="RW"/>
+                    <bit-field key="adc1rst" name="ADC1RST" description="ADC1 Module Reset Control" mask="0x00000200" access="RW"/>
+                    <bit-field key="iopdrst" name="IOPDRST" description="PORTD Module Reset Control" mask="0x00000020" access="RW"/>
+                    <bit-field key="iopcrst" name="IOPCRST" description="PORTC Module Reset Control" mask="0x00000010" access="RW"/>
+                    <bit-field key="ioparst" name="IOPARST" description="PORTA Module Reset Control" mask="0x00000004" access="RW"/>
+                    <bit-field key="afiorst" name="AFIORST" description="I/O Auxiliary Function Module Reset Control" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="apb1prstr" name="APB1PRSTR" description="PB1 Peripheral Reset" offset="0x10" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="pwrrst" name="PWRRST" description="Power Interface Reset Control" mask="0x10000000" access="RW"/>
+                    <bit-field key="i2c1rst" name="I2C1RST" description="I2C1 Interface Reset Control" mask="0x00200000" access="RW"/>
+                    <bit-field key="wwdgrst" name="WWDGRST" description="Window Watchdog Reset Control" mask="0x00000800" access="RW"/>
+                    <bit-field key="tim2rst" name="TIM2RST" description="TIM2 Module Reset Control" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="ahbpcenr" name="AHBPCENR" description="HB Peripheral Clock Enable" offset="0x14" size="4" initial-value="0x00000014" access="RW">
+                    <bit-field key="sramen" name="SRAMEN" description="SRAM Module Clock (in Sleep Mode) Enable" mask="0x00000004" access="RW"/>
+                    <bit-field key="dma1en" name="DMA1EN" description="DMA1 Module Clock Enable" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="apb2pcenr" name="APB2PCENR" description="PB2 Peripheral Clock Enable" offset="0x18" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="usart1en" name="USART1EN" description="USART1 Interface Clock Enable" mask="0x00004000" access="RW"/>
+                    <bit-field key="spi1en" name="SPI1EN" description="SPI1 Interface Clock Enable" mask="0x00001000" access="RW"/>
+                    <bit-field key="tim1en" name="TIM1EN" description="TIM1 Module Clock Enable" mask="0x00000800" access="RW"/>
+                    <bit-field key="adc1en" name="ADC1EN" description="ADC1 Module Clock Enable" mask="0x00000200" access="RW"/>
+                    <bit-field key="iopden" name="IOPDEN" description="PORTD Module Clock Enable" mask="0x00000020" access="RW"/>
+                    <bit-field key="iopcen" name="IOPCEN" description="PORTC Module Clock Enable" mask="0x00000010" access="RW"/>
+                    <bit-field key="iopaen" name="IOPAEN" description="PORTA Module Clock Enable" mask="0x00000004" access="RW"/>
+                    <bit-field key="afioen" name="AFIOEN" description="I/O Auxiliary Function Module Clock Enable" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="apb1pcenr" name="APB1PCENR" description="PB1 Peripheral Clock Enable" offset="0x1C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="pwren" name="PWREN" description="Power Interface Clock Enable" mask="0x10000000" access="RW"/>
+                    <bit-field key="i2c1en" name="I2C1EN" description="I2C1EN Interface Clock Enable" mask="0x00200000" access="RW"/>
+                    <bit-field key="wwdgen" name="WWDGEN" description="Window Watchdog Clock Enable" mask="0x00000800" access="RW"/>
+                    <bit-field key="tim2en" name="TIM2EN" description="TIM2 Module Clock Enable" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="rstsckr" name="RSTSCKR" description="Control/Status" offset="0x24" size="4" initial-value="0x0C000000" access="R">
+                    <bit-field key="lpwrrstf" name="LPWRRSTF" description="Low-Power Reset Flag" mask="0x80000000" access="R"/>
+                    <bit-field key="wwdgrstf" name="WWDGRSTF" description="Window Watchdog Reset Flag" mask="0x40000000" access="R"/>
+                    <bit-field key="iwdgrstf" name="IWDGRSTF" description="Independent Watchdog Reset Flag" mask="0x20000000" access="R"/>
+                    <bit-field key="sftrstf" name="SFTRSTF" description="Software Reset Flag" mask="0x10000000" access="R"/>
+                    <bit-field key="porrstf" name="PORRSTF" description="Power-Up/Power-Down Reset Flag" mask="0x08000000" access="R"/>
+                    <bit-field key="pinrstf" name="PINRSTF" description="External Manual Reset Flag (NRST Pin)" mask="0x04000000" access="R"/>
+                    <bit-field key="rmvf" name="RMVF" description="Clear Reset Flag Control" mask="0x01000000" access="RW"/>
+                    <bit-field key="lsirdy" name="LSIRDY" mask="0x00000002" access="R"/>
+                    <bit-field key="lion" name="LION" mask="0x00000001" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="iwdg" name="IWDG" description="Independent Watchdog">
+            <register-group key="iwdg" name="IWDG">
+                <register key="ctrl" name="CTRL" description="Control" offset="0x00" size="2" initial-value="0x0000" access="W">
+                    <bit-field key="key" name="KEY" mask="0xFFFF" access="W"/>
+                </register>
+                <register key="pscr" name="PSCR" description="Prescaler" offset="0x04" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="pr" name="PR" description="IWDG Clock Division Factor" mask="0x0007" access="RW"/>
+                </register>
+                <register key="rldr" name="RLDR" description="Reload" offset="0x08" size="2" initial-value="0x0FFF" access="RW">
+                    <bit-field key="rl" name="RL" description="Counter Reload Value" mask="0x0FFF" access="RW"/>
+                </register>
+                <register key="statr" name="STATR" description="Status" offset="0x0C" size="2" initial-value="0x0000" access="R">
+                    <bit-field key="rvu" name="RVU" description="Reload Value Update Flag" mask="0x0002" access="R"/>
+                    <bit-field key="pvu" name="PVU" description="Clock Division Factor Update Flag" mask="0x0001" access="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="wwdg" name="WWDG" description="Window Watchdog">
+            <register-group key="wwdg" name="WWDG">
+                <register key="ctrl" name="CTRL" description="Control" offset="0x00" size="2" initial-value="0x007F" access="RW">
+                    <bit-field key="wdga" name="WDGA" description="Window Watchdog Reset Enable" mask="0x0080" access="RW"/>
+                    <bit-field key="counter" name="T" description="Counter value" mask="0x007F" access="RW"/>
+                </register>
+                <register key="cfgr" name="CFGR" description="Configuration" offset="0x04" size="2" initial-value="0x007F" access="RW">
+                    <bit-field key="ewi" name="EWI" description="Early Wakeup Interrupt Enable" mask="0x0200" access="RW"/>
+                    <bit-field key="wdgtb" name="WDGTB" description="Window Watchdog Clock Division" mask="0x0180" access="RW"/>
+                    <bit-field key="window" name="W" description="Window Value" mask="0x007F" access="RW"/>
+                </register>
+                <register key="statr" name="STATR" description="Status" offset="0x08" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="ewif" name="EWIF" description="Wakeup Interrupt Flag" mask="0x0001" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="pfic" name="PFIC" description="Programmable Fast Interrupt Controller">
+            <register-group key="exti" name="EXTI">
+                <register key="intenr" name="INTENR" description="Interrupt Enable" offset="0x00" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="mr9" name="MR9" description="Enable Interrupts for Channel 9" mask="0x00000200" access="RW"/>
+                    <bit-field key="mr8" name="MR8" description="Enable Interrupts for Channel 8" mask="0x00000100" access="RW"/>
+                    <bit-field key="mr7" name="MR7" description="Enable Interrupts for Channel 7" mask="0x00000080" access="RW"/>
+                    <bit-field key="mr6" name="MR6" description="Enable Interrupts for Channel 6" mask="0x00000040" access="RW"/>
+                    <bit-field key="mr5" name="MR5" description="Enable Interrupts for Channel 5" mask="0x00000020" access="RW"/>
+                    <bit-field key="mr4" name="MR4" description="Enable Interrupts for Channel 4" mask="0x00000010" access="RW"/>
+                    <bit-field key="mr3" name="MR3" description="Enable Interrupts for Channel 3" mask="0x00000008" access="RW"/>
+                    <bit-field key="mr2" name="MR2" description="Enable Interrupts for Channel 2" mask="0x00000004" access="RW"/>
+                    <bit-field key="mr1" name="MR1" description="Enable Interrupts for Channel 1" mask="0x00000002" access="RW"/>
+                    <bit-field key="mr0" name="MR0" description="Enable Interrupts for Channel 0" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="evenr" name="EVENR" description="Event Enable" offset="0x04" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="mr9" name="MR9" description="Enable Events for Channel 9" mask="0x00000200" access="RW"/>
+                    <bit-field key="mr8" name="MR8" description="Enable Events for Channel 8" mask="0x00000100" access="RW"/>
+                    <bit-field key="mr7" name="MR7" description="Enable Events for Channel 7" mask="0x00000080" access="RW"/>
+                    <bit-field key="mr6" name="MR6" description="Enable Events for Channel 6" mask="0x00000040" access="RW"/>
+                    <bit-field key="mr5" name="MR5" description="Enable Events for Channel 5" mask="0x00000020" access="RW"/>
+                    <bit-field key="mr4" name="MR4" description="Enable Events for Channel 4" mask="0x00000010" access="RW"/>
+                    <bit-field key="mr3" name="MR3" description="Enable Events for Channel 3" mask="0x00000008" access="RW"/>
+                    <bit-field key="mr2" name="MR2" description="Enable Events for Channel 2" mask="0x00000004" access="RW"/>
+                    <bit-field key="mr1" name="MR1" description="Enable Events for Channel 1" mask="0x00000002" access="RW"/>
+                    <bit-field key="mr0" name="MR0" description="Enable Events for Channel 0" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="rtenr" name="RTENR" description="Rising Edge Trigger Enable" offset="0x08" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="tr9" name="TR9" description="Enable Rising Edge Triggering for Channel 9" mask="0x00000200" access="RW"/>
+                    <bit-field key="tr8" name="TR8" description="Enable Rising Edge Triggering for Channel 8" mask="0x00000100" access="RW"/>
+                    <bit-field key="tr7" name="TR7" description="Enable Rising Edge Triggering for Channel 7" mask="0x00000080" access="RW"/>
+                    <bit-field key="tr6" name="TR6" description="Enable Rising Edge Triggering for Channel 6" mask="0x00000040" access="RW"/>
+                    <bit-field key="tr5" name="TR5" description="Enable Rising Edge Triggering for Channel 5" mask="0x00000020" access="RW"/>
+                    <bit-field key="tr4" name="TR4" description="Enable Rising Edge Triggering for Channel 4" mask="0x00000010" access="RW"/>
+                    <bit-field key="tr3" name="TR3" description="Enable Rising Edge Triggering for Channel 3" mask="0x00000008" access="RW"/>
+                    <bit-field key="tr2" name="TR2" description="Enable Rising Edge Triggering for Channel 2" mask="0x00000004" access="RW"/>
+                    <bit-field key="tr1" name="TR1" description="Enable Rising Edge Triggering for Channel 1" mask="0x00000002" access="RW"/>
+                    <bit-field key="tr0" name="TR0" description="Enable Rising Edge Triggering for Channel 0" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="ftenr" name="FTENR" description="Falling Edge Trigger Enable" offset="0x0C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="tr9" name="TR9" description="Enable Falling Edge Triggering for Channel 9" mask="0x00000200" access="RW"/>
+                    <bit-field key="tr8" name="TR8" description="Enable Falling Edge Triggering for Channel 8" mask="0x00000100" access="RW"/>
+                    <bit-field key="tr7" name="TR7" description="Enable Falling Edge Triggering for Channel 7" mask="0x00000080" access="RW"/>
+                    <bit-field key="tr6" name="TR6" description="Enable Falling Edge Triggering for Channel 6" mask="0x00000040" access="RW"/>
+                    <bit-field key="tr5" name="TR5" description="Enable Falling Edge Triggering for Channel 5" mask="0x00000020" access="RW"/>
+                    <bit-field key="tr4" name="TR4" description="Enable Falling Edge Triggering for Channel 4" mask="0x00000010" access="RW"/>
+                    <bit-field key="tr3" name="TR3" description="Enable Falling Edge Triggering for Channel 3" mask="0x00000008" access="RW"/>
+                    <bit-field key="tr2" name="TR2" description="Enable Falling Edge Triggering for Channel 2" mask="0x00000004" access="RW"/>
+                    <bit-field key="tr1" name="TR1" description="Enable Falling Edge Triggering for Channel 1" mask="0x00000002" access="RW"/>
+                    <bit-field key="tr0" name="TR0" description="Enable Falling Edge Triggering for Channel 0" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="swievr" name="SWIEVR" description="Software Interrupt Event" offset="0x10" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="swier9" name="SWIER9" description="Generate Interrupt or Event for Channel 9" mask="0x00000200" access="RW"/>
+                    <bit-field key="swier8" name="SWIER8" description="Generate Interrupt or Event for Channel 8" mask="0x00000100" access="RW"/>
+                    <bit-field key="swier7" name="SWIER7" description="Generate Interrupt or Event for Channel 7" mask="0x00000080" access="RW"/>
+                    <bit-field key="swier6" name="SWIER6" description="Generate Interrupt or Event for Channel 6" mask="0x00000040" access="RW"/>
+                    <bit-field key="swier5" name="SWIER5" description="Generate Interrupt or Event for Channel 5" mask="0x00000020" access="RW"/>
+                    <bit-field key="swier4" name="SWIER4" description="Generate Interrupt or Event for Channel 4" mask="0x00000010" access="RW"/>
+                    <bit-field key="swier3" name="SWIER3" description="Generate Interrupt or Event for Channel 3" mask="0x00000008" access="RW"/>
+                    <bit-field key="swier2" name="SWIER2" description="Generate Interrupt or Event for Channel 2" mask="0x00000004" access="RW"/>
+                    <bit-field key="swier1" name="SWIER1" description="Generate Interrupt or Event for Channel 1" mask="0x00000002" access="RW"/>
+                    <bit-field key="swier0" name="SWIER0" description="Generate Interrupt or Event for Channel 0" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="intfr" name="INTFR" description="Interrupt Flag" offset="0x14" size="4" access="RW">
+                    <bit-field key="if9" name="IF9" description="Interrupt Occurred Flag for Channel 9" mask="0x00000200" access="RW"/>
+                    <bit-field key="if8" name="IF8" description="Interrupt Occurred Flag for Channel 8" mask="0x00000100" access="RW"/>
+                    <bit-field key="if7" name="IF7" description="Interrupt Occurred Flag for Channel 7" mask="0x00000080" access="RW"/>
+                    <bit-field key="if6" name="IF6" description="Interrupt Occurred Flag for Channel 6" mask="0x00000040" access="RW"/>
+                    <bit-field key="if5" name="IF5" description="Interrupt Occurred Flag for Channel 5" mask="0x00000020" access="RW"/>
+                    <bit-field key="if4" name="IF4" description="Interrupt Occurred Flag for Channel 4" mask="0x00000010" access="RW"/>
+                    <bit-field key="if3" name="IF3" description="Interrupt Occurred Flag for Channel 3" mask="0x00000008" access="RW"/>
+                    <bit-field key="if2" name="IF2" description="Interrupt Occurred Flag for Channel 2" mask="0x00000004" access="RW"/>
+                    <bit-field key="if1" name="IF1" description="Interrupt Occurred Flag for Channel 1" mask="0x00000002" access="RW"/>
+                    <bit-field key="if0" name="IF0" description="Interrupt Occurred Flag for Channel 0" mask="0x00000001" access="RW"/>
+                </register>
+            </register-group>
+            <register-group key="pfic" name="PFIC">
+                <register key="isr1" name="ISR1" description="Interrupt Enable Status 1" offset="0x00" size="4" initial-value="0x0000000C" access="R">
+                    <bit-field key="intensta31" name="INTENSTA31" description="Interrupt 31 Enabled" mask="0x80000000" access="R"/>
+                    <bit-field key="intensta30" name="INTENSTA30" description="Interrupt 30 Enabled" mask="0x40000000" access="R"/>
+                    <bit-field key="intensta29" name="INTENSTA29" description="Interrupt 29 Enabled" mask="0x20000000" access="R"/>
+                    <bit-field key="intensta28" name="INTENSTA28" description="Interrupt 28 Enabled" mask="0x10000000" access="R"/>
+                    <bit-field key="intensta27" name="INTENSTA27" description="Interrupt 27 Enabled" mask="0x08000000" access="R"/>
+                    <bit-field key="intensta26" name="INTENSTA26" description="Interrupt 26 Enabled" mask="0x04000000" access="R"/>
+                    <bit-field key="intensta25" name="INTENSTA25" description="Interrupt 25 Enabled" mask="0x02000000" access="R"/>
+                    <bit-field key="intensta24" name="INTENSTA24" description="Interrupt 24 Enabled" mask="0x01000000" access="R"/>
+                    <bit-field key="intensta23" name="INTENSTA23" description="Interrupt 23 Enabled" mask="0x00800000" access="R"/>
+                    <bit-field key="intensta22" name="INTENSTA22" description="Interrupt 22 Enabled" mask="0x00400000" access="R"/>
+                    <bit-field key="intensta21" name="INTENSTA21" description="Interrupt 21 Enabled" mask="0x00200000" access="R"/>
+                    <bit-field key="intensta20" name="INTENSTA20" description="Interrupt 20 Enabled" mask="0x00100000" access="R"/>
+                    <bit-field key="intensta19" name="INTENSTA19" description="Interrupt 19 Enabled" mask="0x00080000" access="R"/>
+                    <bit-field key="intensta18" name="INTENSTA18" description="Interrupt 18 Enabled" mask="0x00040000" access="R"/>
+                    <bit-field key="intensta17" name="INTENSTA17" description="Interrupt 17 Enabled" mask="0x00020000" access="R"/>
+                    <bit-field key="intensta16" name="INTENSTA16" description="Interrupt 16 Enabled" mask="0x00010000" access="R"/>
+                    <bit-field key="intensta14" name="INTENSTA14" description="Interrupt 14 Enabled" mask="0x00004000" access="R"/>
+                    <bit-field key="intensta12" name="INTENSTA12" description="Interrupt 12 Enabled" mask="0x00001000" access="R"/>
+                    <bit-field key="intensta3" name="INTENSTA3" description="Interrupt 3 Enabled" mask="0x00000008" access="R"/>
+                    <bit-field key="intensta2" name="INTENSTA2" description="Interrupt 2 Enabled" mask="0x00000004" access="R"/>
+                </register>
+                <register key="isr2" name="ISR2" description="Interrupt Enable Status 2" offset="0x04" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="intensta38" name="INTENSTA38" description="Interrupt 38 Enabled" mask="0x00000040" access="R"/>
+                    <bit-field key="intensta37" name="INTENSTA37" description="Interrupt 37 Enabled" mask="0x00000020" access="R"/>
+                    <bit-field key="intensta36" name="INTENSTA36" description="Interrupt 36 Enabled" mask="0x00000010" access="R"/>
+                    <bit-field key="intensta35" name="INTENSTA35" description="Interrupt 35 Enabled" mask="0x00000008" access="R"/>
+                    <bit-field key="intensta34" name="INTENSTA34" description="Interrupt 34 Enabled" mask="0x00000004" access="R"/>
+                    <bit-field key="intensta33" name="INTENSTA33" description="Interrupt 33 Enabled" mask="0x00000002" access="R"/>
+                    <bit-field key="intensta32" name="INTENSTA32" description="Interrupt 32 Enabled" mask="0x00000001" access="R"/>
+                </register>
+                <register key="ipr1" name="IPR1" description="Interrupt Pending Status 1" offset="0x20" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="pendsta31" name="PENDSTA31" description="Interrupt 31 Pending Status" mask="0x80000000" access="R"/>
+                    <bit-field key="pendsta30" name="PENDSTA30" description="Interrupt 30 Pending Status" mask="0x40000000" access="R"/>
+                    <bit-field key="pendsta29" name="PENDSTA29" description="Interrupt 29 Pending Status" mask="0x20000000" access="R"/>
+                    <bit-field key="pendsta28" name="PENDSTA28" description="Interrupt 28 Pending Status" mask="0x10000000" access="R"/>
+                    <bit-field key="pendsta27" name="PENDSTA27" description="Interrupt 27 Pending Status" mask="0x08000000" access="R"/>
+                    <bit-field key="pendsta26" name="PENDSTA26" description="Interrupt 26 Pending Status" mask="0x04000000" access="R"/>
+                    <bit-field key="pendsta25" name="PENDSTA25" description="Interrupt 25 Pending Status" mask="0x02000000" access="R"/>
+                    <bit-field key="pendsta24" name="PENDSTA24" description="Interrupt 24 Pending Status" mask="0x01000000" access="R"/>
+                    <bit-field key="pendsta23" name="PENDSTA23" description="Interrupt 23 Pending Status" mask="0x00800000" access="R"/>
+                    <bit-field key="pendsta22" name="PENDSTA22" description="Interrupt 22 Pending Status" mask="0x00400000" access="R"/>
+                    <bit-field key="pendsta21" name="PENDSTA21" description="Interrupt 21 Pending Status" mask="0x00200000" access="R"/>
+                    <bit-field key="pendsta20" name="PENDSTA20" description="Interrupt 20 Pending Status" mask="0x00100000" access="R"/>
+                    <bit-field key="pendsta19" name="PENDSTA19" description="Interrupt 19 Pending Status" mask="0x00080000" access="R"/>
+                    <bit-field key="pendsta18" name="PENDSTA18" description="Interrupt 18 Pending Status" mask="0x00040000" access="R"/>
+                    <bit-field key="pendsta17" name="PENDSTA17" description="Interrupt 17 Pending Status" mask="0x00020000" access="R"/>
+                    <bit-field key="pendsta16" name="PENDSTA16" description="Interrupt 16 Pending Status" mask="0x00010000" access="R"/>
+                    <bit-field key="pendsta14" name="PENDSTA14" description="Interrupt 14 Pending Status" mask="0x00004000" access="R"/>
+                    <bit-field key="pendsta12" name="PENDSTA12" description="Interrupt 12 Pending Status" mask="0x00001000" access="R"/>
+                    <bit-field key="pendsta3" name="PENDSTA3" description="Interrupt 3 Pending Status" mask="0x00000008" access="R"/>
+                    <bit-field key="pendsta2" name="PENDSTA2" description="Interrupt 2 Pending Status" mask="0x00000004" access="R"/>
+                </register>
+                <register key="ipr2" name="IPR2" description="Interrupt Pending Status 2" offset="0x24" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="pendsta38" name="PENDSTA38" description="Interrupt 38 Pending Status" mask="0x00000040" access="R"/>
+                    <bit-field key="pendsta37" name="PENDSTA37" description="Interrupt 37 Pending Status" mask="0x00000020" access="R"/>
+                    <bit-field key="pendsta36" name="PENDSTA36" description="Interrupt 36 Pending Status" mask="0x00000010" access="R"/>
+                    <bit-field key="pendsta35" name="PENDSTA35" description="Interrupt 35 Pending Status" mask="0x00000008" access="R"/>
+                    <bit-field key="pendsta34" name="PENDSTA34" description="Interrupt 34 Pending Status" mask="0x00000004" access="R"/>
+                    <bit-field key="pendsta33" name="PENDSTA33" description="Interrupt 33 Pending Status" mask="0x00000002" access="R"/>
+                    <bit-field key="pendsta32" name="PENDSTA32" description="Interrupt 32 Pending Status" mask="0x00000001" access="R"/>
+                </register>
+                <register key="ithresdr" name="ITHRESDR" description="Interrupt Priority Threshold Configuration" offset="0x40" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="threshold" name="THRESHOLD" description="Interrupt Priority Threshold Value" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="cfgr" name="CFGR" description="Interrupt Configuration" offset="0x48" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="keycode" name="KEYCODE" mask="0xFFFF0000" access="W"/>
+                    <bit-field key="sysrst" name="SYSRST" description="System Reset" mask="0x00000080" access="W"/>
+                </register>
+                <register key="gisr" name="GISR" description="Interrupt Global Status" offset="0x4C" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="gpendsta" name="GPENDSTA" description="Pending Interrupts Flag" mask="0x00000200" access="R"/>
+                    <bit-field key="gactsta" name="GACTSTA" description="Executing Interrupts Flag" mask="0x00000100" access="R"/>
+                    <bit-field key="neststa" name="NESTSTA" description="Interrupt Nesting Status" mask="0x000000FF" access="R"/>
+                </register>
+                <register key="vtfidr" name="VTFIDR" description="VTF Interrupt ID Configuration" offset="0x50" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="vtfid1" name="VTFID1" description="Number Configuration for VTF Interrupt 1" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="vtfid0" name="VTFID0" description="Number Configuration for VTF Interrupt 0" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="vtfaddrr0" name="VTFADDRR0" description="VTF Interrupt 0 Address" offset="0x60" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="addr0" name="ADDR0" description="VTF Interrupt 0 Service Program Address" mask="0xFFFFFFFE" access="RW"/>
+                    <bit-field key="vtf0en" name="VTF0EN" description="VTF Interrupt 0 Enable" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="vtfaddrr1" name="VTFADDRR1" description="VTF Interrupt 1 Address" offset="0x64" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="addr1" name="ADDR1" description="VTF Interrupt 1 Service Program Address" mask="0xFFFFFFFE" access="RW"/>
+                    <bit-field key="vtf1en" name="VTF1EN" description="VTF Interrupt 1 Enable" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="ienr1" name="IENR1" description="Interrupt Enable 1" offset="0x100" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="inten31" name="INTEN31" description="Interrupt 31 Enable" mask="0x80000000" access="W"/>
+                    <bit-field key="inten30" name="INTEN30" description="Interrupt 30 Enable" mask="0x40000000" access="W"/>
+                    <bit-field key="inten29" name="INTEN29" description="Interrupt 29 Enable" mask="0x20000000" access="W"/>
+                    <bit-field key="inten28" name="INTEN28" description="Interrupt 28 Enable" mask="0x10000000" access="W"/>
+                    <bit-field key="inten27" name="INTEN27" description="Interrupt 27 Enable" mask="0x08000000" access="W"/>
+                    <bit-field key="inten26" name="INTEN26" description="Interrupt 26 Enable" mask="0x04000000" access="W"/>
+                    <bit-field key="inten25" name="INTEN25" description="Interrupt 25 Enable" mask="0x02000000" access="W"/>
+                    <bit-field key="inten24" name="INTEN24" description="Interrupt 24 Enable" mask="0x01000000" access="W"/>
+                    <bit-field key="inten23" name="INTEN23" description="Interrupt 23 Enable" mask="0x00800000" access="W"/>
+                    <bit-field key="inten22" name="INTEN22" description="Interrupt 22 Enable" mask="0x00400000" access="W"/>
+                    <bit-field key="inten21" name="INTEN21" description="Interrupt 21 Enable" mask="0x00200000" access="W"/>
+                    <bit-field key="inten20" name="INTEN20" description="Interrupt 20 Enable" mask="0x00100000" access="W"/>
+                    <bit-field key="inten19" name="INTEN19" description="Interrupt 19 Enable" mask="0x00080000" access="W"/>
+                    <bit-field key="inten18" name="INTEN18" description="Interrupt 18 Enable" mask="0x00040000" access="W"/>
+                    <bit-field key="inten17" name="INTEN17" description="Interrupt 17 Enable" mask="0x00020000" access="W"/>
+                    <bit-field key="inten16" name="INTEN16" description="Interrupt 16 Enable" mask="0x00010000" access="W"/>
+                    <bit-field key="inten14" name="INTEN14" description="Interrupt 14 Enable" mask="0x00004000" access="W"/>
+                    <bit-field key="inten12" name="INTEN12" description="Interrupt 12 Enable" mask="0x00001000" access="W"/>
+                </register>
+                <register key="ienr2" name="IENR2" description="Interrupt Enable 2" offset="0x104" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="inten38" name="INTEN38" description="Interrupt 38 Enable" mask="0x00000040" access="W"/>
+                    <bit-field key="inten37" name="INTEN37" description="Interrupt 37 Enable" mask="0x00000020" access="W"/>
+                    <bit-field key="inten36" name="INTEN36" description="Interrupt 36 Enable" mask="0x00000010" access="W"/>
+                    <bit-field key="inten35" name="INTEN35" description="Interrupt 35 Enable" mask="0x00000008" access="W"/>
+                    <bit-field key="inten34" name="INTEN34" description="Interrupt 34 Enable" mask="0x00000004" access="W"/>
+                    <bit-field key="inten33" name="INTEN33" description="Interrupt 33 Enable" mask="0x00000002" access="W"/>
+                    <bit-field key="inten32" name="INTEN32" description="Interrupt 32 Enable" mask="0x00000001" access="W"/>
+                </register>
+                <register key="irer1" name="IRER1" description="Interrupt Enable Clear 1" offset="0x180" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="intrset31" name="INTRSET31" description="Interrupt 31 Disable" mask="0x80000000" access="W"/>
+                    <bit-field key="intrset30" name="INTRSET30" description="Interrupt 30 Disable" mask="0x40000000" access="W"/>
+                    <bit-field key="intrset29" name="INTRSET29" description="Interrupt 29 Disable" mask="0x20000000" access="W"/>
+                    <bit-field key="intrset28" name="INTRSET28" description="Interrupt 28 Disable" mask="0x10000000" access="W"/>
+                    <bit-field key="intrset27" name="INTRSET27" description="Interrupt 27 Disable" mask="0x08000000" access="W"/>
+                    <bit-field key="intrset26" name="INTRSET26" description="Interrupt 26 Disable" mask="0x04000000" access="W"/>
+                    <bit-field key="intrset25" name="INTRSET25" description="Interrupt 25 Disable" mask="0x02000000" access="W"/>
+                    <bit-field key="intrset24" name="INTRSET24" description="Interrupt 24 Disable" mask="0x01000000" access="W"/>
+                    <bit-field key="intrset23" name="INTRSET23" description="Interrupt 23 Disable" mask="0x00800000" access="W"/>
+                    <bit-field key="intrset22" name="INTRSET22" description="Interrupt 22 Disable" mask="0x00400000" access="W"/>
+                    <bit-field key="intrset21" name="INTRSET21" description="Interrupt 21 Disable" mask="0x00200000" access="W"/>
+                    <bit-field key="intrset20" name="INTRSET20" description="Interrupt 20 Disable" mask="0x00100000" access="W"/>
+                    <bit-field key="intrset19" name="INTRSET19" description="Interrupt 19 Disable" mask="0x00080000" access="W"/>
+                    <bit-field key="intrset18" name="INTRSET18" description="Interrupt 18 Disable" mask="0x00040000" access="W"/>
+                    <bit-field key="intrset17" name="INTRSET17" description="Interrupt 17 Disable" mask="0x00020000" access="W"/>
+                    <bit-field key="intrset16" name="INTRSET16" description="Interrupt 16 Disable" mask="0x00010000" access="W"/>
+                    <bit-field key="intrset14" name="INTRSET14" description="Interrupt 14 Disable" mask="0x00004000" access="W"/>
+                    <bit-field key="intrset12" name="INTRSET12" description="Interrupt 12 Disable" mask="0x00001000" access="W"/>
+                </register>
+                <register key="irer2" name="IRER2" description="Interrupt Enable Clear 2" offset="0x184" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="intrset38" name="INTRSET38" description="Interrupt 38 Disable" mask="0x00000040" access="W"/>
+                    <bit-field key="intrset37" name="INTRSET37" description="Interrupt 37 Disable" mask="0x00000020" access="W"/>
+                    <bit-field key="intrset36" name="INTRSET36" description="Interrupt 36 Disable" mask="0x00000010" access="W"/>
+                    <bit-field key="intrset35" name="INTRSET35" description="Interrupt 35 Disable" mask="0x00000008" access="W"/>
+                    <bit-field key="intrset34" name="INTRSET34" description="Interrupt 34 Disable" mask="0x00000004" access="W"/>
+                    <bit-field key="intrset33" name="INTRSET33" description="Interrupt 33 Disable" mask="0x00000002" access="W"/>
+                    <bit-field key="intrset32" name="INTRSET32" description="Interrupt 32 Disable" mask="0x00000001" access="W"/>
+                </register>
+                <register key="ipsr1" name="IPSR1" description="Interrupt Pending Setting 1" offset="0x200" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="pendset31" name="PENDSET31" description="Interrupt 31 Pending Setting" mask="0x80000000" access="W"/>
+                    <bit-field key="pendset30" name="PENDSET30" description="Interrupt 30 Pending Setting" mask="0x40000000" access="W"/>
+                    <bit-field key="pendset29" name="PENDSET29" description="Interrupt 29 Pending Setting" mask="0x20000000" access="W"/>
+                    <bit-field key="pendset28" name="PENDSET28" description="Interrupt 28 Pending Setting" mask="0x10000000" access="W"/>
+                    <bit-field key="pendset27" name="PENDSET27" description="Interrupt 27 Pending Setting" mask="0x08000000" access="W"/>
+                    <bit-field key="pendset26" name="PENDSET26" description="Interrupt 26 Pending Setting" mask="0x04000000" access="W"/>
+                    <bit-field key="pendset25" name="PENDSET25" description="Interrupt 25 Pending Setting" mask="0x02000000" access="W"/>
+                    <bit-field key="pendset24" name="PENDSET24" description="Interrupt 24 Pending Setting" mask="0x01000000" access="W"/>
+                    <bit-field key="pendset23" name="PENDSET23" description="Interrupt 23 Pending Setting" mask="0x00800000" access="W"/>
+                    <bit-field key="pendset22" name="PENDSET22" description="Interrupt 22 Pending Setting" mask="0x00400000" access="W"/>
+                    <bit-field key="pendset21" name="PENDSET21" description="Interrupt 21 Pending Setting" mask="0x00200000" access="W"/>
+                    <bit-field key="pendset20" name="PENDSET20" description="Interrupt 20 Pending Setting" mask="0x00100000" access="W"/>
+                    <bit-field key="pendset19" name="PENDSET19" description="Interrupt 19 Pending Setting" mask="0x00080000" access="W"/>
+                    <bit-field key="pendset18" name="PENDSET18" description="Interrupt 18 Pending Setting" mask="0x00040000" access="W"/>
+                    <bit-field key="pendset17" name="PENDSET17" description="Interrupt 17 Pending Setting" mask="0x00020000" access="W"/>
+                    <bit-field key="pendset16" name="PENDSET16" description="Interrupt 16 Pending Setting" mask="0x00010000" access="W"/>
+                    <bit-field key="pendset14" name="PENDSET14" description="Interrupt 14 Pending Setting" mask="0x00004000" access="W"/>
+                    <bit-field key="pendset12" name="PENDSET12" description="Interrupt 12 Pending Setting" mask="0x00001000" access="W"/>
+                    <bit-field key="pendset3" name="PENDSET3" description="Interrupt 3 Pending Setting" mask="0x00000008" access="W"/>
+                    <bit-field key="pendset2" name="PENDSET2" description="Interrupt 2 Pending Setting" mask="0x00000004" access="W"/>
+                </register>
+                <register key="ipsr2" name="IPSR2" description="Interrupt Pending Setting 2" offset="0x204" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="pendset38" name="PENDSET38" description="Interrupt 38 Pending Setting" mask="0x00000040" access="W"/>
+                    <bit-field key="pendset37" name="PENDSET37" description="Interrupt 37 Pending Setting" mask="0x00000020" access="W"/>
+                    <bit-field key="pendset36" name="PENDSET36" description="Interrupt 36 Pending Setting" mask="0x00000010" access="W"/>
+                    <bit-field key="pendset35" name="PENDSET35" description="Interrupt 35 Pending Setting" mask="0x00000008" access="W"/>
+                    <bit-field key="pendset34" name="PENDSET34" description="Interrupt 34 Pending Setting" mask="0x00000004" access="W"/>
+                    <bit-field key="pendset33" name="PENDSET33" description="Interrupt 33 Pending Setting" mask="0x00000002" access="W"/>
+                    <bit-field key="pendset32" name="PENDSET32" description="Interrupt 32 Pending Setting" mask="0x00000001" access="W"/>
+                </register>
+                <register key="iprr1" name="IPRR1" description="Interrupt Pending Clear 1" offset="0x280" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="pendrst31" name="PENDRST31" description="Interrupt 31 Pending Clear" mask="0x80000000" access="W"/>
+                    <bit-field key="pendrst30" name="PENDRST30" description="Interrupt 30 Pending Clear" mask="0x40000000" access="W"/>
+                    <bit-field key="pendrst29" name="PENDRST29" description="Interrupt 29 Pending Clear" mask="0x20000000" access="W"/>
+                    <bit-field key="pendrst28" name="PENDRST28" description="Interrupt 28 Pending Clear" mask="0x10000000" access="W"/>
+                    <bit-field key="pendrst27" name="PENDRST27" description="Interrupt 27 Pending Clear" mask="0x08000000" access="W"/>
+                    <bit-field key="pendrst26" name="PENDRST26" description="Interrupt 26 Pending Clear" mask="0x04000000" access="W"/>
+                    <bit-field key="pendrst25" name="PENDRST25" description="Interrupt 25 Pending Clear" mask="0x02000000" access="W"/>
+                    <bit-field key="pendrst24" name="PENDRST24" description="Interrupt 24 Pending Clear" mask="0x01000000" access="W"/>
+                    <bit-field key="pendrst23" name="PENDRST23" description="Interrupt 23 Pending Clear" mask="0x00800000" access="W"/>
+                    <bit-field key="pendrst22" name="PENDRST22" description="Interrupt 22 Pending Clear" mask="0x00400000" access="W"/>
+                    <bit-field key="pendrst21" name="PENDRST21" description="Interrupt 21 Pending Clear" mask="0x00200000" access="W"/>
+                    <bit-field key="pendrst20" name="PENDRST20" description="Interrupt 20 Pending Clear" mask="0x00100000" access="W"/>
+                    <bit-field key="pendrst19" name="PENDRST19" description="Interrupt 19 Pending Clear" mask="0x00080000" access="W"/>
+                    <bit-field key="pendrst18" name="PENDRST18" description="Interrupt 18 Pending Clear" mask="0x00040000" access="W"/>
+                    <bit-field key="pendrst17" name="PENDRST17" description="Interrupt 17 Pending Clear" mask="0x00020000" access="W"/>
+                    <bit-field key="pendrst16" name="PENDRST16" description="Interrupt 16 Pending Clear" mask="0x00010000" access="W"/>
+                    <bit-field key="pendrst14" name="PENDRST14" description="Interrupt 14 Pending Clear" mask="0x00004000" access="W"/>
+                    <bit-field key="pendrst12" name="PENDRST12" description="Interrupt 12 Pending Clear" mask="0x00001000" access="W"/>
+                    <bit-field key="pendrst3" name="PENDRST3" description="Interrupt 3 Pending Clear" mask="0x00000008" access="W"/>
+                    <bit-field key="pendrst2" name="PENDRST2" description="Interrupt 2 Pending Clear" mask="0x00000004" access="W"/>
+                </register>
+                <register key="iprr2" name="IPRR2" description="Interrupt Pending Clear 2" offset="0x284" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="pendrst38" name="PENDRST38" description="Interrupt 38 Pending Clear" mask="0x00000040" access="W"/>
+                    <bit-field key="pendrst37" name="PENDRST37" description="Interrupt 37 Pending Clear" mask="0x00000020" access="W"/>
+                    <bit-field key="pendrst36" name="PENDRST36" description="Interrupt 36 Pending Clear" mask="0x00000010" access="W"/>
+                    <bit-field key="pendrst35" name="PENDRST35" description="Interrupt 35 Pending Clear" mask="0x00000008" access="W"/>
+                    <bit-field key="pendrst34" name="PENDRST34" description="Interrupt 34 Pending Clear" mask="0x00000004" access="W"/>
+                    <bit-field key="pendrst33" name="PENDRST33" description="Interrupt 33 Pending Clear" mask="0x00000002" access="W"/>
+                    <bit-field key="pendrst32" name="PENDRST32" description="Interrupt 32 Pending Clear" mask="0x00000001" access="W"/>
+                </register>
+                <register key="iactr1" name="IACTR1" description="Interrupt Activation Status 1" offset="0x300" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="iacts31" name="IACTS31" description="Interrupt 31 Execution Status" mask="0x80000000" access="R"/>
+                    <bit-field key="iacts30" name="IACTS30" description="Interrupt 30 Execution Status" mask="0x40000000" access="R"/>
+                    <bit-field key="iacts29" name="IACTS29" description="Interrupt 29 Execution Status" mask="0x20000000" access="R"/>
+                    <bit-field key="iacts28" name="IACTS28" description="Interrupt 28 Execution Status" mask="0x10000000" access="R"/>
+                    <bit-field key="iacts27" name="IACTS27" description="Interrupt 27 Execution Status" mask="0x08000000" access="R"/>
+                    <bit-field key="iacts26" name="IACTS26" description="Interrupt 26 Execution Status" mask="0x04000000" access="R"/>
+                    <bit-field key="iacts25" name="IACTS25" description="Interrupt 25 Execution Status" mask="0x02000000" access="R"/>
+                    <bit-field key="iacts24" name="IACTS24" description="Interrupt 24 Execution Status" mask="0x01000000" access="R"/>
+                    <bit-field key="iacts23" name="IACTS23" description="Interrupt 23 Execution Status" mask="0x00800000" access="R"/>
+                    <bit-field key="iacts22" name="IACTS22" description="Interrupt 22 Execution Status" mask="0x00400000" access="R"/>
+                    <bit-field key="iacts21" name="IACTS21" description="Interrupt 21 Execution Status" mask="0x00200000" access="R"/>
+                    <bit-field key="iacts20" name="IACTS20" description="Interrupt 20 Execution Status" mask="0x00100000" access="R"/>
+                    <bit-field key="iacts19" name="IACTS19" description="Interrupt 19 Execution Status" mask="0x00080000" access="R"/>
+                    <bit-field key="iacts18" name="IACTS18" description="Interrupt 18 Execution Status" mask="0x00040000" access="R"/>
+                    <bit-field key="iacts17" name="IACTS17" description="Interrupt 17 Execution Status" mask="0x00020000" access="R"/>
+                    <bit-field key="iacts16" name="IACTS16" description="Interrupt 16 Execution Status" mask="0x00010000" access="R"/>
+                    <bit-field key="iacts14" name="IACTS14" description="Interrupt 14 Execution Status" mask="0x00004000" access="R"/>
+                    <bit-field key="iacts12" name="IACTS12" description="Interrupt 12 Execution Status" mask="0x00001000" access="R"/>
+                    <bit-field key="iacts3" name="IACTS3" description="Interrupt 3 Execution Status" mask="0x00000008" access="R"/>
+                    <bit-field key="iacts2" name="IACTS2" description="Interrupt 2 Execution Status" mask="0x00000004" access="R"/>
+                </register>
+                <register key="iactr2" name="IACTR2" description="Interrupt Activation Status 2" offset="0x304" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="iacts38" name="IACTS38" description="Interrupt 38 Execution Status" mask="0x00000040" access="R"/>
+                    <bit-field key="iacts37" name="IACTS37" description="Interrupt 37 Execution Status" mask="0x00000020" access="R"/>
+                    <bit-field key="iacts36" name="IACTS36" description="Interrupt 36 Execution Status" mask="0x00000010" access="R"/>
+                    <bit-field key="iacts35" name="IACTS35" description="Interrupt 35 Execution Status" mask="0x00000008" access="R"/>
+                    <bit-field key="iacts34" name="IACTS34" description="Interrupt 34 Execution Status" mask="0x00000004" access="R"/>
+                    <bit-field key="iacts33" name="IACTS33" description="Interrupt 33 Execution Status" mask="0x00000002" access="R"/>
+                    <bit-field key="iacts32" name="IACTS32" description="Interrupt 32 Execution Status" mask="0x00000001" access="R"/>
+                </register>
+                <register key="iprior0" name="IPRIOR0" description="Interrupt Priority Configuration 0" offset="0x400" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_3" name="IP_3" description="Interrupt 3 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_2" name="IP_2" description="Interrupt 2 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_1" name="IP_1" description="Interrupt 1 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_0" name="IP_0" description="Interrupt 0 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior1" name="IPRIOR1" description="Interrupt Priority Configuration 1" offset="0x404" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_7" name="IP_7" description="Interrupt 7 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_6" name="IP_6" description="Interrupt 6 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_5" name="IP_5" description="Interrupt 5 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_4" name="IP_4" description="Interrupt 4 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior2" name="IPRIOR2" description="Interrupt Priority Configuration 2" offset="0x408" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_11" name="IP_11" description="Interrupt 11 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_10" name="IP_10" description="Interrupt 10 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_9" name="IP_9" description="Interrupt 9 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_8" name="IP_8" description="Interrupt 8 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior3" name="IPRIOR3" description="Interrupt Priority Configuration 3" offset="0x40C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_15" name="IP_15" description="Interrupt 15 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_14" name="IP_14" description="Interrupt 14 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_13" name="IP_13" description="Interrupt 13 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_12" name="IP_12" description="Interrupt 12 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior4" name="IPRIOR4" description="Interrupt Priority Configuration 4" offset="0x410" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_19" name="IP_19" description="Interrupt 19 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_18" name="IP_18" description="Interrupt 18 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_17" name="IP_17" description="Interrupt 17 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_16" name="IP_16" description="Interrupt 16 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior5" name="IPRIOR5" description="Interrupt Priority Configuration 5" offset="0x414" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_23" name="IP_23" description="Interrupt 23 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_22" name="IP_22" description="Interrupt 22 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_21" name="IP_21" description="Interrupt 21 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_20" name="IP_20" description="Interrupt 20 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior6" name="IPRIOR6" description="Interrupt Priority Configuration 6" offset="0x418" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_27" name="IP_27" description="Interrupt 27 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_26" name="IP_26" description="Interrupt 26 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_25" name="IP_25" description="Interrupt 25 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_24" name="IP_24" description="Interrupt 24 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior7" name="IPRIOR7" description="Interrupt Priority Configuration 7" offset="0x41C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_31" name="IP_31" description="Interrupt 31 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_30" name="IP_30" description="Interrupt 30 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_29" name="IP_29" description="Interrupt 29 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_28" name="IP_28" description="Interrupt 28 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior8" name="IPRIOR8" description="Interrupt Priority Configuration 8" offset="0x420" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_35" name="IP_35" description="Interrupt 35 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_34" name="IP_34" description="Interrupt 34 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_33" name="IP_33" description="Interrupt 33 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_32" name="IP_32" description="Interrupt 32 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior9" name="IPRIOR9" description="Interrupt Priority Configuration 9" offset="0x424" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_39" name="IP_39" description="Interrupt 39 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_38" name="IP_38" description="Interrupt 38 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_37" name="IP_37" description="Interrupt 37 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_36" name="IP_36" description="Interrupt 36 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior10" name="IPRIOR10" description="Interrupt Priority Configuration 10" offset="0x428" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_43" name="IP_43" description="Interrupt 43 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_42" name="IP_42" description="Interrupt 42 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_41" name="IP_41" description="Interrupt 41 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_40" name="IP_40" description="Interrupt 40 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior11" name="IPRIOR11" description="Interrupt Priority Configuration 11" offset="0x42C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_47" name="IP_47" description="Interrupt 47 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_46" name="IP_46" description="Interrupt 46 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_45" name="IP_45" description="Interrupt 45 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_44" name="IP_44" description="Interrupt 44 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior12" name="IPRIOR12" description="Interrupt Priority Configuration 12" offset="0x430" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_51" name="IP_51" description="Interrupt 51 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_50" name="IP_50" description="Interrupt 50 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_49" name="IP_49" description="Interrupt 49 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_48" name="IP_48" description="Interrupt 48 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior13" name="IPRIOR13" description="Interrupt Priority Configuration 13" offset="0x434" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_55" name="IP_55" description="Interrupt 55 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_54" name="IP_54" description="Interrupt 54 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_53" name="IP_53" description="Interrupt 53 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_52" name="IP_52" description="Interrupt 52 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior14" name="IPRIOR14" description="Interrupt Priority Configuration 14" offset="0x438" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_59" name="IP_59" description="Interrupt 59 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_58" name="IP_58" description="Interrupt 58 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_57" name="IP_57" description="Interrupt 57 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_56" name="IP_56" description="Interrupt 56 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior15" name="IPRIOR15" description="Interrupt Priority Configuration 15" offset="0x43C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_63" name="IP_63" description="Interrupt 63 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_62" name="IP_62" description="Interrupt 62 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_61" name="IP_61" description="Interrupt 61 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_60" name="IP_60" description="Interrupt 60 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior16" name="IPRIOR16" description="Interrupt Priority Configuration 16" offset="0x440" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_67" name="IP_67" description="Interrupt 67 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_66" name="IP_66" description="Interrupt 66 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_65" name="IP_65" description="Interrupt 65 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_64" name="IP_64" description="Interrupt 64 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior17" name="IPRIOR17" description="Interrupt Priority Configuration 17" offset="0x444" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_71" name="IP_71" description="Interrupt 71 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_70" name="IP_70" description="Interrupt 70 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_69" name="IP_69" description="Interrupt 69 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_68" name="IP_68" description="Interrupt 68 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior18" name="IPRIOR18" description="Interrupt Priority Configuration 18" offset="0x448" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_75" name="IP_75" description="Interrupt 75 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_74" name="IP_74" description="Interrupt 74 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_73" name="IP_73" description="Interrupt 73 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_72" name="IP_72" description="Interrupt 72 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior19" name="IPRIOR19" description="Interrupt Priority Configuration 19" offset="0x44C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_79" name="IP_79" description="Interrupt 79 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_78" name="IP_78" description="Interrupt 78 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_77" name="IP_77" description="Interrupt 77 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_76" name="IP_76" description="Interrupt 76 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior20" name="IPRIOR20" description="Interrupt Priority Configuration 20" offset="0x450" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_83" name="IP_83" description="Interrupt 83 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_82" name="IP_82" description="Interrupt 82 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_81" name="IP_81" description="Interrupt 81 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_80" name="IP_80" description="Interrupt 80 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior21" name="IPRIOR21" description="Interrupt Priority Configuration 21" offset="0x454" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_87" name="IP_87" description="Interrupt 87 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_86" name="IP_86" description="Interrupt 86 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_85" name="IP_85" description="Interrupt 85 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_84" name="IP_84" description="Interrupt 84 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior22" name="IPRIOR22" description="Interrupt Priority Configuration 22" offset="0x458" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_91" name="IP_91" description="Interrupt 91 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_90" name="IP_90" description="Interrupt 90 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_89" name="IP_89" description="Interrupt 89 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_88" name="IP_88" description="Interrupt 88 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior23" name="IPRIOR23" description="Interrupt Priority Configuration 23" offset="0x45C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_95" name="IP_95" description="Interrupt 95 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_94" name="IP_94" description="Interrupt 94 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_93" name="IP_93" description="Interrupt 93 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_92" name="IP_92" description="Interrupt 92 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior24" name="IPRIOR24" description="Interrupt Priority Configuration 24" offset="0x460" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_99" name="IP_99" description="Interrupt 99 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_98" name="IP_98" description="Interrupt 98 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_97" name="IP_97" description="Interrupt 97 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_96" name="IP_96" description="Interrupt 96 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior25" name="IPRIOR25" description="Interrupt Priority Configuration 25" offset="0x464" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_103" name="IP_103" description="Interrupt 103 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_102" name="IP_102" description="Interrupt 102 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_101" name="IP_101" description="Interrupt 101 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_100" name="IP_100" description="Interrupt 100 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior26" name="IPRIOR26" description="Interrupt Priority Configuration 26" offset="0x468" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_107" name="IP_107" description="Interrupt 107 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_106" name="IP_106" description="Interrupt 106 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_105" name="IP_105" description="Interrupt 105 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_104" name="IP_104" description="Interrupt 104 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior27" name="IPRIOR27" description="Interrupt Priority Configuration 27" offset="0x46C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_111" name="IP_111" description="Interrupt 111 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_110" name="IP_110" description="Interrupt 110 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_109" name="IP_109" description="Interrupt 109 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_108" name="IP_108" description="Interrupt 108 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior28" name="IPRIOR28" description="Interrupt Priority Configuration 28" offset="0x470" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_115" name="IP_115" description="Interrupt 115 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_114" name="IP_114" description="Interrupt 114 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_113" name="IP_113" description="Interrupt 113 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_112" name="IP_112" description="Interrupt 112 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior29" name="IPRIOR29" description="Interrupt Priority Configuration 29" offset="0x474" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_119" name="IP_119" description="Interrupt 119 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_118" name="IP_118" description="Interrupt 118 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_117" name="IP_117" description="Interrupt 117 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_116" name="IP_116" description="Interrupt 116 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior30" name="IPRIOR30" description="Interrupt Priority Configuration 30" offset="0x478" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_123" name="IP_123" description="Interrupt 123 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_122" name="IP_122" description="Interrupt 122 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_121" name="IP_121" description="Interrupt 121 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_120" name="IP_120" description="Interrupt 120 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior31" name="IPRIOR31" description="Interrupt Priority Configuration 31" offset="0x47C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_127" name="IP_127" description="Interrupt 127 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_126" name="IP_126" description="Interrupt 126 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_125" name="IP_125" description="Interrupt 125 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_124" name="IP_124" description="Interrupt 124 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior32" name="IPRIOR32" description="Interrupt Priority Configuration 32" offset="0x480" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_131" name="IP_131" description="Interrupt 131 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_130" name="IP_130" description="Interrupt 130 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_129" name="IP_129" description="Interrupt 129 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_128" name="IP_128" description="Interrupt 128 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior33" name="IPRIOR33" description="Interrupt Priority Configuration 33" offset="0x484" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_135" name="IP_135" description="Interrupt 135 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_134" name="IP_134" description="Interrupt 134 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_133" name="IP_133" description="Interrupt 133 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_132" name="IP_132" description="Interrupt 132 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior34" name="IPRIOR34" description="Interrupt Priority Configuration 34" offset="0x488" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_139" name="IP_139" description="Interrupt 139 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_138" name="IP_138" description="Interrupt 138 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_137" name="IP_137" description="Interrupt 137 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_136" name="IP_136" description="Interrupt 136 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior35" name="IPRIOR35" description="Interrupt Priority Configuration 35" offset="0x48C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_143" name="IP_143" description="Interrupt 143 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_142" name="IP_142" description="Interrupt 142 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_141" name="IP_141" description="Interrupt 141 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_140" name="IP_140" description="Interrupt 140 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior36" name="IPRIOR36" description="Interrupt Priority Configuration 36" offset="0x490" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_147" name="IP_147" description="Interrupt 147 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_146" name="IP_146" description="Interrupt 146 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_145" name="IP_145" description="Interrupt 145 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_144" name="IP_144" description="Interrupt 144 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior37" name="IPRIOR37" description="Interrupt Priority Configuration 37" offset="0x494" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_151" name="IP_151" description="Interrupt 151 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_150" name="IP_150" description="Interrupt 150 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_149" name="IP_149" description="Interrupt 149 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_148" name="IP_148" description="Interrupt 148 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior38" name="IPRIOR38" description="Interrupt Priority Configuration 38" offset="0x498" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_155" name="IP_155" description="Interrupt 155 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_154" name="IP_154" description="Interrupt 154 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_153" name="IP_153" description="Interrupt 153 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_152" name="IP_152" description="Interrupt 152 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior39" name="IPRIOR39" description="Interrupt Priority Configuration 39" offset="0x49C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_159" name="IP_159" description="Interrupt 159 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_158" name="IP_158" description="Interrupt 158 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_157" name="IP_157" description="Interrupt 157 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_156" name="IP_156" description="Interrupt 156 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior40" name="IPRIOR40" description="Interrupt Priority Configuration 40" offset="0x4A0" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_163" name="IP_163" description="Interrupt 163 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_162" name="IP_162" description="Interrupt 162 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_161" name="IP_161" description="Interrupt 161 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_160" name="IP_160" description="Interrupt 160 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior41" name="IPRIOR41" description="Interrupt Priority Configuration 41" offset="0x4A4" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_167" name="IP_167" description="Interrupt 167 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_166" name="IP_166" description="Interrupt 166 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_165" name="IP_165" description="Interrupt 165 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_164" name="IP_164" description="Interrupt 164 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior42" name="IPRIOR42" description="Interrupt Priority Configuration 42" offset="0x4A8" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_171" name="IP_171" description="Interrupt 171 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_170" name="IP_170" description="Interrupt 170 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_169" name="IP_169" description="Interrupt 169 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_168" name="IP_168" description="Interrupt 168 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior43" name="IPRIOR43" description="Interrupt Priority Configuration 43" offset="0x4AC" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_175" name="IP_175" description="Interrupt 175 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_174" name="IP_174" description="Interrupt 174 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_173" name="IP_173" description="Interrupt 173 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_172" name="IP_172" description="Interrupt 172 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior44" name="IPRIOR44" description="Interrupt Priority Configuration 44" offset="0x4B0" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_179" name="IP_179" description="Interrupt 179 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_178" name="IP_178" description="Interrupt 178 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_177" name="IP_177" description="Interrupt 177 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_176" name="IP_176" description="Interrupt 176 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior45" name="IPRIOR45" description="Interrupt Priority Configuration 45" offset="0x4B4" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_183" name="IP_183" description="Interrupt 183 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_182" name="IP_182" description="Interrupt 182 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_181" name="IP_181" description="Interrupt 181 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_180" name="IP_180" description="Interrupt 180 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior46" name="IPRIOR46" description="Interrupt Priority Configuration 46" offset="0x4B8" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_187" name="IP_187" description="Interrupt 187 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_186" name="IP_186" description="Interrupt 186 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_185" name="IP_185" description="Interrupt 185 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_184" name="IP_184" description="Interrupt 184 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior47" name="IPRIOR47" description="Interrupt Priority Configuration 47" offset="0x4BC" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_191" name="IP_191" description="Interrupt 191 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_190" name="IP_190" description="Interrupt 190 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_189" name="IP_189" description="Interrupt 189 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_188" name="IP_188" description="Interrupt 188 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior48" name="IPRIOR48" description="Interrupt Priority Configuration 48" offset="0x4C0" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_195" name="IP_195" description="Interrupt 195 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_194" name="IP_194" description="Interrupt 194 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_193" name="IP_193" description="Interrupt 193 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_192" name="IP_192" description="Interrupt 192 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior49" name="IPRIOR49" description="Interrupt Priority Configuration 49" offset="0x4C4" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_199" name="IP_199" description="Interrupt 199 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_198" name="IP_198" description="Interrupt 198 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_197" name="IP_197" description="Interrupt 197 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_196" name="IP_196" description="Interrupt 196 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior50" name="IPRIOR50" description="Interrupt Priority Configuration 50" offset="0x4C8" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_203" name="IP_203" description="Interrupt 203 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_202" name="IP_202" description="Interrupt 202 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_201" name="IP_201" description="Interrupt 201 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_200" name="IP_200" description="Interrupt 200 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior51" name="IPRIOR51" description="Interrupt Priority Configuration 51" offset="0x4CC" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_207" name="IP_207" description="Interrupt 207 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_206" name="IP_206" description="Interrupt 206 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_205" name="IP_205" description="Interrupt 205 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_204" name="IP_204" description="Interrupt 204 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior52" name="IPRIOR52" description="Interrupt Priority Configuration 52" offset="0x4D0" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_211" name="IP_211" description="Interrupt 211 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_210" name="IP_210" description="Interrupt 210 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_209" name="IP_209" description="Interrupt 209 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_208" name="IP_208" description="Interrupt 208 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior53" name="IPRIOR53" description="Interrupt Priority Configuration 53" offset="0x4D4" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_215" name="IP_215" description="Interrupt 215 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_214" name="IP_214" description="Interrupt 214 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_213" name="IP_213" description="Interrupt 213 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_212" name="IP_212" description="Interrupt 212 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior54" name="IPRIOR54" description="Interrupt Priority Configuration 54" offset="0x4D8" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_219" name="IP_219" description="Interrupt 219 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_218" name="IP_218" description="Interrupt 218 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_217" name="IP_217" description="Interrupt 217 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_216" name="IP_216" description="Interrupt 216 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior55" name="IPRIOR55" description="Interrupt Priority Configuration 55" offset="0x4DC" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_223" name="IP_223" description="Interrupt 223 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_222" name="IP_222" description="Interrupt 222 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_221" name="IP_221" description="Interrupt 221 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_220" name="IP_220" description="Interrupt 220 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior56" name="IPRIOR56" description="Interrupt Priority Configuration 56" offset="0x4E0" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_227" name="IP_227" description="Interrupt 227 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_226" name="IP_226" description="Interrupt 226 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_225" name="IP_225" description="Interrupt 225 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_224" name="IP_224" description="Interrupt 224 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior57" name="IPRIOR57" description="Interrupt Priority Configuration 57" offset="0x4E4" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_231" name="IP_231" description="Interrupt 231 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_230" name="IP_230" description="Interrupt 230 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_229" name="IP_229" description="Interrupt 229 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_228" name="IP_228" description="Interrupt 228 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior58" name="IPRIOR58" description="Interrupt Priority Configuration 58" offset="0x4E8" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_235" name="IP_235" description="Interrupt 235 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_234" name="IP_234" description="Interrupt 234 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_233" name="IP_233" description="Interrupt 233 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_232" name="IP_232" description="Interrupt 232 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior59" name="IPRIOR59" description="Interrupt Priority Configuration 59" offset="0x4EC" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_239" name="IP_239" description="Interrupt 239 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_238" name="IP_238" description="Interrupt 238 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_237" name="IP_237" description="Interrupt 237 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_236" name="IP_236" description="Interrupt 236 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior60" name="IPRIOR60" description="Interrupt Priority Configuration 60" offset="0x4F0" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_243" name="IP_243" description="Interrupt 243 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_242" name="IP_242" description="Interrupt 242 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_241" name="IP_241" description="Interrupt 241 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_240" name="IP_240" description="Interrupt 240 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior61" name="IPRIOR61" description="Interrupt Priority Configuration 61" offset="0x4F4" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_247" name="IP_247" description="Interrupt 247 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_246" name="IP_246" description="Interrupt 246 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_245" name="IP_245" description="Interrupt 245 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_244" name="IP_244" description="Interrupt 244 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior62" name="IPRIOR62" description="Interrupt Priority Configuration 62" offset="0x4F8" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_251" name="IP_251" description="Interrupt 251 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_250" name="IP_250" description="Interrupt 250 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_249" name="IP_249" description="Interrupt 249 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_248" name="IP_248" description="Interrupt 248 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="iprior63" name="IPRIOR63" description="Interrupt Priority Configuration 63" offset="0x4FC" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ip_255" name="IP_255" description="Interrupt 255 Priority Bits" mask="0xFF000000" access="RW"/>
+                    <bit-field key="ip_254" name="IP_254" description="Interrupt 254 Priority Bits" mask="0x00FF0000" access="RW"/>
+                    <bit-field key="ip_253" name="IP_253" description="Interrupt 253 Priority Bits" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="ip_252" name="IP_252" description="Interrupt 252 Priority Bits" mask="0x000000FF" access="RW"/>
+                </register>
+                <register key="sctrl" name="SCTRL" description="Interrupt Configuration" offset="0xD10" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="sysrst" name="SYSRST" mask="0x80000000" access="W"/>
+                    <bit-field key="setevent" name="SETEVENT" mask="0x00000020" access="W"/>
+                    <bit-field key="sevonpend" name="SEVONPEND" mask="0x00000010" access="RW"/>
+                    <bit-field key="wfitowfe" name="WFITOWFE" mask="0x00000008" access="RW"/>
+                    <bit-field key="sleepdeep" name="SLEEPDEEP" mask="0x00000004" access="RW"/>
+                    <bit-field key="sleeponexit" name="SLEEPONEXIT" mask="0x00000002" access="RW"/>
+                </register>
+            </register-group>
+            <register-group key="stk" name="STK">
+                <register key="ctrl" name="CTRL" description="System Count Control" offset="0x00" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="swie" name="SWIE" description="Software Interrupt (SWI) Trigger Enable" mask="0x80000000" access="RW"/>
+                    <bit-field key="stre" name="STRE" description="Auto-reload Count Enable" mask="0x00000008" access="RW"/>
+                    <bit-field key="stclk" name="STCLK" description="Counter Clock Source Selection" mask="0x00000004" access="RW"/>
+                    <bit-field key="stie" name="STIE" description="Counter Interrupt Enable" mask="0x00000002" access="RW"/>
+                    <bit-field key="ste" name="STE" description="System Counter Enable" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="sr" name="SR" description="System Count Status" offset="0x04" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="cntif" name="CNTIF" description="Count Value Comparison Flag" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="cntl" name="CNTL" description="System Counter" offset="0x08" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="cnt" name="CNT" description="Counter Value" mask="0xFFFFFFFF" access="RW"/>
+                </register>
+                <register key="cmplr" name="CMPLR" description="Counter Comparison Value" offset="0x10" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="cmp" name="CMP" description="Counter Comparison Value" mask="0xFFFFFFFF" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="gpio_port" name="GPIO" description="GPIO and Alternative Pin Functions">
+            <register-group key="port" name="PORT">
+                <register key="cfglr" name="CFGLR" description="Port Configuration Low" offset="0x00" size="4" initial-value="0x44444444" access="RW">
+                    <bit-field key="cnf7" name="CNF7" description="Pin 7 Configuration" mask="0xC0000000" access="RW"/>
+                    <bit-field key="mode7" name="MODE7" description="Pin 7 Mode" mask="0x30000000" access="RW"/>
+                    <bit-field key="cnf6" name="CNF6" description="Pin 6 Configuration" mask="0x0C000000" access="RW"/>
+                    <bit-field key="mode6" name="MODE6" description="Pin 6 Mode" mask="0x03000000" access="RW"/>
+                    <bit-field key="cnf5" name="CNF5" description="Pin 5 Configuration" mask="0x00C00000" access="RW"/>
+                    <bit-field key="mode5" name="MODE5" description="Pin 5 Mode" mask="0x00300000" access="RW"/>
+                    <bit-field key="cnf4" name="CNF4" description="Pin 4 Configuration" mask="0x000C0000" access="RW"/>
+                    <bit-field key="mode4" name="MODE4" description="Pin 4 Mode" mask="0x00030000" access="RW"/>
+                    <bit-field key="cnf3" name="CNF3" description="Pin 3 Configuration" mask="0x0000C000" access="RW"/>
+                    <bit-field key="mode3" name="MODE3" description="Pin 3 Mode" mask="0x00003000" access="RW"/>
+                    <bit-field key="cnf2" name="CNF2" description="Pin 2 Configuration" mask="0x00000C00" access="RW"/>
+                    <bit-field key="mode2" name="MODE2" description="Pin 2 Mode" mask="0x00000300" access="RW"/>
+                    <bit-field key="cnf1" name="CNF1" description="Pin 1 Configuration" mask="0x000000C0" access="RW"/>
+                    <bit-field key="mode1" name="MODE1" description="Pin 1 Mode" mask="0x00000030" access="RW"/>
+                    <bit-field key="cnf0" name="CNF0" description="Pin 0 Configuration" mask="0x0000000C" access="RW"/>
+                    <bit-field key="mode0" name="MODE0" description="Pin 0 Mode" mask="0x00000003" access="RW"/>
+                </register>
+                <register key="indr" name="INDR" description="Port Input" offset="0x08" size="4" access="R">
+                    <bit-field key="indr7" name="INDR7" description="Pin 7 Input" mask="0x00000080" access="R"/>
+                    <bit-field key="indr6" name="INDR6" description="Pin 6 Input" mask="0x00000040" access="R"/>
+                    <bit-field key="indr5" name="INDR5" description="Pin 5 Input" mask="0x00000020" access="R"/>
+                    <bit-field key="indr4" name="INDR4" description="Pin 4 Input" mask="0x00000010" access="R"/>
+                    <bit-field key="indr3" name="INDR3" description="Pin 3 Input" mask="0x00000008" access="R"/>
+                    <bit-field key="indr2" name="INDR2" description="Pin 2 Input" mask="0x00000004" access="R"/>
+                    <bit-field key="indr1" name="INDR1" description="Pin 1 Input" mask="0x00000002" access="R"/>
+                    <bit-field key="indr0" name="INDR0" description="Pin 0 Input" mask="0x00000001" access="R"/>
+                </register>
+                <register key="outdr" name="OUTDR" description="Port Output" offset="0x0C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="odr7" name="ODR7" description="Pin 7 Output" mask="0x00000080" access="RW"/>
+                    <bit-field key="odr6" name="ODR6" description="Pin 6 Output" mask="0x00000040" access="RW"/>
+                    <bit-field key="odr5" name="ODR5" description="Pin 5 Output" mask="0x00000020" access="RW"/>
+                    <bit-field key="odr4" name="ODR4" description="Pin 4 Output" mask="0x00000010" access="RW"/>
+                    <bit-field key="odr3" name="ODR3" description="Pin 3 Output" mask="0x00000008" access="RW"/>
+                    <bit-field key="odr2" name="ODR2" description="Pin 2 Output" mask="0x00000004" access="RW"/>
+                    <bit-field key="odr1" name="ODR1" description="Pin 1 Output" mask="0x00000002" access="RW"/>
+                    <bit-field key="odr0" name="ODR0" description="Pin 0 Output" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="bshr" name="BSHR" description="Port Set/Reset Low" offset="0x10" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="br7" name="BR7" description="Pin 7 Reset" mask="0x00800000" access="W"/>
+                    <bit-field key="br6" name="BR6" description="Pin 6 Reset" mask="0x00400000" access="W"/>
+                    <bit-field key="br5" name="BR5" description="Pin 5 Reset" mask="0x00200000" access="W"/>
+                    <bit-field key="br4" name="BR4" description="Pin 4 Reset" mask="0x00100000" access="W"/>
+                    <bit-field key="br3" name="BR3" description="Pin 3 Reset" mask="0x00080000" access="W"/>
+                    <bit-field key="br2" name="BR2" description="Pin 2 Reset" mask="0x00040000" access="W"/>
+                    <bit-field key="br1" name="BR1" description="Pin 1 Reset" mask="0x00020000" access="W"/>
+                    <bit-field key="br0" name="BR0" description="Pin 0 Reset" mask="0x00010000" access="W"/>
+                    <bit-field key="bs7" name="BS7" description="Pin 7 Set" mask="0x00000080" access="W"/>
+                    <bit-field key="bs6" name="BS6" description="Pin 6 Set" mask="0x00000040" access="W"/>
+                    <bit-field key="bs5" name="BS5" description="Pin 5 Set" mask="0x00000020" access="W"/>
+                    <bit-field key="bs4" name="BS4" description="Pin 4 Set" mask="0x00000010" access="W"/>
+                    <bit-field key="bs3" name="BS3" description="Pin 3 Set" mask="0x00000008" access="W"/>
+                    <bit-field key="bs2" name="BS2" description="Pin 2 Set" mask="0x00000004" access="W"/>
+                    <bit-field key="bs1" name="BS1" description="Pin 1 Set" mask="0x00000002" access="W"/>
+                    <bit-field key="bs0" name="BS0" description="Pin 0 Set" mask="0x00000001" access="W"/>
+                </register>
+                <register key="bcr" name="BCR" description="Port Reset" offset="0x14" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="br7" name="BR7" description="Pin 7 Reset" mask="0x00000080" access="W"/>
+                    <bit-field key="br6" name="BR6" description="Pin 6 Reset" mask="0x00000040" access="W"/>
+                    <bit-field key="br5" name="BR5" description="Pin 5 Reset" mask="0x00000020" access="W"/>
+                    <bit-field key="br4" name="BR4" description="Pin 4 Reset" mask="0x00000010" access="W"/>
+                    <bit-field key="br3" name="BR3" description="Pin 3 Reset" mask="0x00000008" access="W"/>
+                    <bit-field key="br2" name="BR2" description="Pin 2 Reset" mask="0x00000004" access="W"/>
+                    <bit-field key="br1" name="BR1" description="Pin 1 Reset" mask="0x00000002" access="W"/>
+                    <bit-field key="br0" name="BR0" description="Pin 0 Reset" mask="0x00000001" access="W"/>
+                </register>
+                <register key="lckr" name="LCKR" description="Port Lock Configuration" offset="0x18" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="lckk" name="LCKK" description="Lock activation bit (lock key)" mask="0x00000100" access="RW"/>
+                    <bit-field key="lck7" name="LCK7" description="Lock configuration bit 7" mask="0x00000080" access="RW"/>
+                    <bit-field key="lck6" name="LCK6" description="Lock configuration bit 6" mask="0x00000040" access="RW"/>
+                    <bit-field key="lck5" name="LCK5" description="Lock configuration bit 5" mask="0x00000020" access="RW"/>
+                    <bit-field key="lck4" name="LCK4" description="Lock configuration bit 4" mask="0x00000010" access="RW"/>
+                    <bit-field key="lck3" name="LCK3" description="Lock configuration bit 3" mask="0x00000008" access="RW"/>
+                    <bit-field key="lck2" name="LCK2" description="Lock configuration bit 2" mask="0x00000004" access="RW"/>
+                    <bit-field key="lck1" name="LCK1" description="Lock configuration bit 1" mask="0x00000002" access="RW"/>
+                    <bit-field key="lck0" name="LCK0" description="Lock configuration bit 0" mask="0x00000001" access="RW"/>
+                </register>
+            </register-group>
+            <register-group key="afio" name="AFIO">
+                <register key="pcfr1" name="PCFR1" description="Remap 1" offset="0x04" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="sw_cfg" name="SW_CFG" description="SWD (SDI) Debug Interface Enable" mask="0x07000000" access="RW"/>
+                    <bit-field key="tim1_iremap" name="TIM1_IREMAP" mask="0x00800000" access="RW"/>
+                    <bit-field key="adc_etrgreg_rm" name="ADC_ETRGREG_RM" mask="0x00040000" access="RW"/>
+                    <bit-field key="adc_etrginj_rm" name="ADC_ETRGINJ_RM" mask="0x00020000" access="RW"/>
+                    <bit-field key="pa12_rm" name="PA12_RM" description="PA1 and PA2 Remap" mask="0x00008000" access="RW"/>
+                    <bit-field key="tim2_rm" name="TIM2_RM" description="TIM2 Remap" mask="0x00000300" access="RW"/>
+                    <bit-field key="tim1_rm" name="TIM1_RM" description="TIM1 Remap" mask="0x000000C0" access="RW"/>
+                    <bit-field key="usart1_rm" name="USART1_RM" description="USART1 Remap" mask="0x00200004" access="RW"/>
+                    <bit-field key="i2c1_rm" name="I2C1_RM" description="I2C1 Remap" mask="0x00400002" access="RW"/>
+                    <bit-field key="spi1_rm" name="SPI1_RM" description="SPI1 Remap" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="exticr1" name="EXTICR1" description="External Interrupt Configuration 1" offset="0x08" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="exti7" name="EXTI7" description="External Interrupt 7 Port Select" mask="0x0000C000" access="RW"/>
+                    <bit-field key="exti6" name="EXTI6" description="External Interrupt 6 Port Select" mask="0x00003000" access="RW"/>
+                    <bit-field key="exti5" name="EXTI5" description="External Interrupt 5 Port Select" mask="0x00000C00" access="RW"/>
+                    <bit-field key="exti4" name="EXTI4" description="External Interrupt 4 Port Select" mask="0x00000300" access="RW"/>
+                    <bit-field key="exti3" name="EXTI3" description="External Interrupt 3 Port Select" mask="0x000000C0" access="RW"/>
+                    <bit-field key="exti2" name="EXTI2" description="External Interrupt 2 Port Select" mask="0x00000030" access="RW"/>
+                    <bit-field key="exti1" name="EXTI1" description="External Interrupt 1 Port Select" mask="0x0000000C" access="RW"/>
+                    <bit-field key="exti0" name="EXTI0" description="External Interrupt 0 Port Select" mask="0x00000003" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="dma" name="DMA" description="Direct Memory Access Controller">
+            <register-group key="dma" name="DMA">
+                <register key="intfr" name="INTFR" description="Interrupt Status" offset="0x00" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="teif7" name="TEIF7" description="Transmission Error Flag for Channel 7" mask="0x08000000" access="R"/>
+                    <bit-field key="htif7" name="HTIF7" description="Transmission Halfway Flag for Channel 7" mask="0x04000000" access="R"/>
+                    <bit-field key="tcif7" name="TCIF7" description="Transmission Completion Flag for Channel 7" mask="0x02000000" access="R"/>
+                    <bit-field key="gif7" name="GIF7" description="Global Interrupt Flag for Channel 7" mask="0x01000000" access="R"/>
+                    <bit-field key="teif6" name="TEIF6" description="Transmission Error Flag for Channel 6" mask="0x00800000" access="R"/>
+                    <bit-field key="htif6" name="HTIF6" description="Transmission Halfway Flag for Channel 6" mask="0x00400000" access="R"/>
+                    <bit-field key="tcif6" name="TCIF6" description="Transmission Completion Flag for Channel 6" mask="0x00200000" access="R"/>
+                    <bit-field key="gif6" name="GIF6" description="Global Interrupt Flag for Channel 6" mask="0x00100000" access="R"/>
+                    <bit-field key="teif5" name="TEIF5" description="Transmission Error Flag for Channel 5" mask="0x00080000" access="R"/>
+                    <bit-field key="htif5" name="HTIF5" description="Transmission Halfway Flag for Channel 5" mask="0x00040000" access="R"/>
+                    <bit-field key="tcif5" name="TCIF5" description="Transmission Completion Flag for Channel 5" mask="0x00020000" access="R"/>
+                    <bit-field key="gif5" name="GIF5" description="Global Interrupt Flag for Channel 5" mask="0x00010000" access="R"/>
+                    <bit-field key="teif4" name="TEIF4" description="Transmission Error Flag for Channel 4" mask="0x00008000" access="R"/>
+                    <bit-field key="htif4" name="HTIF4" description="Transmission Halfway Flag for Channel 4" mask="0x00004000" access="R"/>
+                    <bit-field key="tcif4" name="TCIF4" description="Transmission Completion Flag for Channel 4" mask="0x00002000" access="R"/>
+                    <bit-field key="gif4" name="GIF4" description="Global Interrupt Flag for Channel 4" mask="0x00001000" access="R"/>
+                    <bit-field key="teif3" name="TEIF3" description="Transmission Error Flag for Channel 3" mask="0x00000800" access="R"/>
+                    <bit-field key="htif3" name="HTIF3" description="Transmission Halfway Flag for Channel 3" mask="0x00000400" access="R"/>
+                    <bit-field key="tcif3" name="TCIF3" description="Transmission Completion Flag for Channel 3" mask="0x00000200" access="R"/>
+                    <bit-field key="gif3" name="GIF3" description="Global Interrupt Flag for Channel 3" mask="0x00000100" access="R"/>
+                    <bit-field key="teif2" name="TEIF2" description="Transmission Error Flag for Channel 2" mask="0x00000080" access="R"/>
+                    <bit-field key="htif2" name="HTIF2" description="Transmission Halfway Flag for Channel 2" mask="0x00000040" access="R"/>
+                    <bit-field key="tcif2" name="TCIF2" description="Transmission Completion Flag for Channel 2" mask="0x00000020" access="R"/>
+                    <bit-field key="gif2" name="GIF2" description="Global Interrupt Flag for Channel 2" mask="0x00000010" access="R"/>
+                    <bit-field key="teif1" name="TEIF1" description="Transmission Error Flag for Channel 1" mask="0x00000008" access="R"/>
+                    <bit-field key="htif1" name="HTIF1" description="Transmission Halfway Flag for Channel 1" mask="0x00000004" access="R"/>
+                    <bit-field key="tcif1" name="TCIF1" description="Transmission Completion Flag for Channel 1" mask="0x00000002" access="R"/>
+                    <bit-field key="gif1" name="GIF1" description="Global Interrupt Flag for Channel 1" mask="0x00000001" access="R"/>
+                </register>
+                <register key="intfcr" name="INTFCR" description="Interrupt Flag Clear" offset="0x04" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="cteif7" name="CTEIF7" description="Clear Transmission Error Flag for Channel 7" mask="0x08000000" access="W"/>
+                    <bit-field key="chtif7" name="CHTIF7" description="Clear Transmission Halfway Flag for Channel 7" mask="0x04000000" access="W"/>
+                    <bit-field key="ctcif7" name="CTCIF7" description="Clear Transmission Completion Flag for Channel 7" mask="0x02000000" access="W"/>
+                    <bit-field key="cgif7" name="CGIF7" description="Clear Global Interrupt Flag for Channel 7" mask="0x01000000" access="W"/>
+                    <bit-field key="cteif6" name="CTEIF6" description="Clear Transmission Error Flag for Channel 6" mask="0x00800000" access="W"/>
+                    <bit-field key="chtif6" name="CHTIF6" description="Clear Transmission Halfway Flag for Channel 6" mask="0x00400000" access="W"/>
+                    <bit-field key="ctcif6" name="CTCIF6" description="Clear Transmission Completion Flag for Channel 6" mask="0x00200000" access="W"/>
+                    <bit-field key="cgif6" name="CGIF6" description="Clear Global Interrupt Flag for Channel 6" mask="0x00100000" access="W"/>
+                    <bit-field key="cteif5" name="CTEIF5" description="Clear Transmission Error Flag for Channel 5" mask="0x00080000" access="W"/>
+                    <bit-field key="chtif5" name="CHTIF5" description="Clear Transmission Halfway Flag for Channel 5" mask="0x00040000" access="W"/>
+                    <bit-field key="ctcif5" name="CTCIF5" description="Clear Transmission Completion Flag for Channel 5" mask="0x00020000" access="W"/>
+                    <bit-field key="cgif5" name="CGIF5" description="Clear Global Interrupt Flag for Channel 5" mask="0x00010000" access="W"/>
+                    <bit-field key="cteif4" name="CTEIF4" description="Clear Transmission Error Flag for Channel 4" mask="0x00008000" access="W"/>
+                    <bit-field key="chtif4" name="CHTIF4" description="Clear Transmission Halfway Flag for Channel 4" mask="0x00004000" access="W"/>
+                    <bit-field key="ctcif4" name="CTCIF4" description="Clear Transmission Completion Flag for Channel 4" mask="0x00002000" access="W"/>
+                    <bit-field key="cgif4" name="CGIF4" description="Clear Global Interrupt Flag for Channel 4" mask="0x00001000" access="W"/>
+                    <bit-field key="cteif3" name="CTEIF3" description="Clear Transmission Error Flag for Channel 3" mask="0x00000800" access="W"/>
+                    <bit-field key="chtif3" name="CHTIF3" description="Clear Transmission Halfway Flag for Channel 3" mask="0x00000400" access="W"/>
+                    <bit-field key="ctcif3" name="CTCIF3" description="Clear Transmission Completion Flag for Channel 3" mask="0x00000200" access="W"/>
+                    <bit-field key="cgif3" name="CGIF3" description="Clear Global Interrupt Flag for Channel 3" mask="0x00000100" access="W"/>
+                    <bit-field key="cteif2" name="CTEIF2" description="Clear Transmission Error Flag for Channel 2" mask="0x00000080" access="W"/>
+                    <bit-field key="chtif2" name="CHTIF2" description="Clear Transmission Halfway Flag for Channel 2" mask="0x00000040" access="W"/>
+                    <bit-field key="ctcif2" name="CTCIF2" description="Clear Transmission Completion Flag for Channel 2" mask="0x00000020" access="W"/>
+                    <bit-field key="cgif2" name="CGIF2" description="Clear Global Interrupt Flag for Channel 2" mask="0x00000010" access="W"/>
+                    <bit-field key="cteif1" name="CTEIF1" description="Clear Transmission Error Flag for Channel 1" mask="0x00000008" access="W"/>
+                    <bit-field key="chtif1" name="CHTIF1" description="Clear Transmission Halfway Flag for Channel 1" mask="0x00000004" access="W"/>
+                    <bit-field key="ctcif1" name="CTCIF1" description="Clear Transmission Completion Flag for Channel 1" mask="0x00000002" access="W"/>
+                    <bit-field key="cgif1" name="CGIF1" description="Clear Global Interrupt Flag for Channel 1" mask="0x00000001" access="W"/>
+                </register>
+            </register-group>
+            <register-group key="channel" name="DMA Channel">
+                <register key="cfgr" name="CFGR" description="Configuration" offset="0x00" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="mem2mem" name="MEM2MEM" description="Memory-to-memory Mode Enable" mask="0x00004000" access="RW"/>
+                    <bit-field key="pl" name="PL" description="Priority" mask="0x00003000" access="RW"/>
+                    <bit-field key="msize" name="MSIZE" description="Memory Data Transfer Width" mask="0x00000C00" access="RW"/>
+                    <bit-field key="psize" name="PSIZE" description="Peripheral Data Transfer Width" mask="0x00000300" access="RW"/>
+                    <bit-field key="minc" name="MINC" description="Memory Address Increment Mode Enable" mask="0x00000080" access="RW"/>
+                    <bit-field key="pinc" name="PINC" description="Peripheral Address Increment Mode Enable" mask="0x00000040" access="RW"/>
+                    <bit-field key="circ" name="CIRC" description="Cyclic Mode Enable" mask="0x00000020" access="RW"/>
+                    <bit-field key="dir" name="DIR" description="Data Direction (Source)" mask="0x00000010" access="RW"/>
+                    <bit-field key="teie" name="TEIE" description="Transmission Error Interrupt Enable" mask="0x00000008" access="RW"/>
+                    <bit-field key="htie" name="HTIE" description="Transmission Halfway Interrupt Enable" mask="0x00000004" access="RW"/>
+                    <bit-field key="tcie" name="TCIE" description="Transmission Completion Interrupt Enable" mask="0x00000002" access="RW"/>
+                    <bit-field key="en" name="EN" description="Channel Enable" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="cntr" name="CNTR" description="Bytes Pending Transfer" offset="0x04" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ndt" name="NDT" description="Pending Bytes" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="paddr" name="PADDR" description="Peripheral Base Address" offset="0x08" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="pa" name="PA" description="Address" mask="0xFFFFFFFF" access="RW"/>
+                </register>
+                <register key="maddr" name="MADDR" description="Memory Base Address" offset="0x0C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ma" name="MA" description="Address" mask="0xFFFFFFFF" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="adc" name="ADC" description="Analog-to-Digital Converter">
+            <register-group key="adc" name="ADC">
+                <register key="statr" name="STATR" description="Status" offset="0x00" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="strt" name="STRT" mask="0x00000010" access="RW"/>
+                    <bit-field key="jstrt" name="JSTRT" mask="0x00000008" access="RW"/>
+                    <bit-field key="jeoc" name="JEOC" mask="0x00000004" access="RW"/>
+                    <bit-field key="eoc" name="EOC" description="Conversion Status" mask="0x00000002" access="RW"/>
+                    <bit-field key="awd" name="AWD" description="Analog Watchdog Flag" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="ctrl1" name="CTRL1" description="Control 1" offset="0x04" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="calvol" name="CALVOL" mask="0x06000000" access="RW"/>
+                    <bit-field key="awden" name="AWDEN" mask="0x00800000" access="RW"/>
+                    <bit-field key="jawden" name="JAWDEN" mask="0x00400000" access="RW"/>
+                    <bit-field key="discnum" name="DISCNUM" mask="0x0000E000" access="RW"/>
+                    <bit-field key="jdiscen" name="JDISCEN" mask="0x00001000" access="RW"/>
+                    <bit-field key="discen" name="DISCEN" mask="0x00000800" access="RW"/>
+                    <bit-field key="jauto" name="JAUTO" mask="0x00000400" access="RW"/>
+                    <bit-field key="awdsgl" name="AWDSGL" description="Single Channel Analog Watchdog Enable (Scan Mode)" mask="0x00000200" access="RW"/>
+                    <bit-field key="scan" name="SCAN" description="Scan Mode Enable" mask="0x00000100" access="RW"/>
+                    <bit-field key="jeocie" name="JEOCIE" mask="0x00000080" access="RW"/>
+                    <bit-field key="awdie" name="AWDIE" description="Analog Watchdog Interrupt Enable" mask="0x00000040" access="RW"/>
+                    <bit-field key="eocie" name="EOCIE" description="End-of-conversion Interrupt Enable" mask="0x00000020" access="RW"/>
+                    <bit-field key="awdch" name="AWDCH" description="Analog Watchdog Channel Selection" mask="0x0000001F" access="RW"/>
+                </register>
+                <register key="ctrl2" name="CTRL2" description="Control 2" offset="0x08" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="swstart" name="SWSTART" mask="0x00400000" access="RW"/>
+                    <bit-field key="jswstart" name="JSWSTART" mask="0x00200000" access="RW"/>
+                    <bit-field key="exttrig" name="EXTTRIG" mask="0x00100000" access="RW"/>
+                    <bit-field key="extsel" name="EXTSEL" mask="0x000E0000" access="RW"/>
+                    <bit-field key="jexttrig" name="JEXTTRIG" mask="0x00008000" access="RW"/>
+                    <bit-field key="jextsel" name="JEXTSEL" mask="0x00007000" access="RW"/>
+                    <bit-field key="align" name="ALIGN" description="Data Alignment" mask="0x00000800" access="RW"/>
+                    <bit-field key="dma" name="DMA" description="Direct Memory Access Mode Enable" mask="0x00000100" access="RW"/>
+                    <bit-field key="rstcal" name="RSTCAL" mask="0x00000008" access="RW"/>
+                    <bit-field key="cal" name="CAL" mask="0x00000004" access="RW"/>
+                    <bit-field key="cont" name="CONT" description="Continuous Conversion Mode Enable" mask="0x00000002" access="RW"/>
+                    <bit-field key="adon" name="ADON" description="ADC Power-up" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="samptr1" name="SAMPTR1" description="Sample Time Configuration 1" offset="0x0C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="smp15" name="SMP15" description="Channel 15 Sampling Time Configuration" mask="0x00038000" access="RW"/>
+                    <bit-field key="smp14" name="SMP14" description="Channel 14 Sampling Time Configuration" mask="0x00007000" access="RW"/>
+                    <bit-field key="smp13" name="SMP13" description="Channel 13 Sampling Time Configuration" mask="0x00000E00" access="RW"/>
+                    <bit-field key="smp12" name="SMP12" description="Channel 12 Sampling Time Configuration" mask="0x000001C0" access="RW"/>
+                    <bit-field key="smp11" name="SMP11" description="Channel 11 Sampling Time Configuration" mask="0x00000038" access="RW"/>
+                    <bit-field key="smp10" name="SMP10" description="Channel 10 Sampling Time Configuration" mask="0x00000007" access="RW"/>
+                </register>
+                <register key="samptr2" name="SAMPTR2" description="Sample Time Configuration 2" offset="0x10" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="smp9" name="SMP9" description="Channel 9 Sampling Time Configuration" mask="0x38000000" access="RW"/>
+                    <bit-field key="smp8" name="SMP8" description="Channel 8 Sampling Time Configuration" mask="0x07000000" access="RW"/>
+                    <bit-field key="smp7" name="SMP7" description="Channel 7 Sampling Time Configuration" mask="0x00E00000" access="RW"/>
+                    <bit-field key="smp6" name="SMP6" description="Channel 6 Sampling Time Configuration" mask="0x001C0000" access="RW"/>
+                    <bit-field key="smp5" name="SMP5" description="Channel 5 Sampling Time Configuration" mask="0x00038000" access="RW"/>
+                    <bit-field key="smp4" name="SMP4" description="Channel 4 Sampling Time Configuration" mask="0x00007000" access="RW"/>
+                    <bit-field key="smp3" name="SMP3" description="Channel 3 Sampling Time Configuration" mask="0x00000E00" access="RW"/>
+                    <bit-field key="smp2" name="SMP2" description="Channel 2 Sampling Time Configuration" mask="0x000001C0" access="RW"/>
+                    <bit-field key="smp1" name="SMP1" description="Channel 1 Sampling Time Configuration" mask="0x00000038" access="RW"/>
+                    <bit-field key="smp0" name="SMP0" description="Channel 0 Sampling Time Configuration" mask="0x00000007" access="RW"/>
+                </register>
+                <register key="iofr1" name="IOFR1" description="Injected Channel Data Offset" offset="0x14" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="joffset" name="JOFFSET" description="Data Offset Value" mask="0x00000FFF" access="RW"/>
+                </register>
+                <register key="iofr2" name="IOFR2" description="Injected Channel Data Offset" offset="0x18" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="joffset" name="JOFFSET" description="Data Offset Value" mask="0x00000FFF" access="RW"/>
+                </register>
+                <register key="iofr3" name="IOFR3" description="Injected Channel Data Offset" offset="0x1C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="joffset" name="JOFFSET" description="Data Offset Value" mask="0x00000FFF" access="RW"/>
+                </register>
+                <register key="iofr4" name="IOFR4" description="Injected Channel Data Offset" offset="0x20" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="joffset" name="JOFFSET" description="Data Offset Value" mask="0x00000FFF" access="RW"/>
+                </register>
+                <register key="wdhtr" name="WDHTR" description="Watchdog High Threshold" offset="0x24" size="4" initial-value="0x00000FFF" access="RW">
+                    <bit-field key="ht" name="HT" description="Threshold Value" mask="0x000003FF" access="RW"/>
+                </register>
+                <register key="wdltr" name="WDLTR" description="Watchdog Low Threshold" offset="0x28" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="lt" name="LT" description="Threshold Value" mask="0x000003FF" access="RW"/>
+                </register>
+                <register key="rsqr1" name="RSQR1" description="Regular Sequence 1" offset="0x2C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="l" name="L" mask="0x00F00000" access="RW"/>
+                    <bit-field key="sq16" name="SQ16" mask="0x000F8000" access="RW"/>
+                    <bit-field key="sq15" name="SQ15" mask="0x00007C00" access="RW"/>
+                    <bit-field key="sq14" name="SQ14" mask="0x000003E0" access="RW"/>
+                    <bit-field key="sq13" name="SQ13" mask="0x0000001F" access="RW"/>
+                </register>
+                <register key="rsqr2" name="RSQR2" description="Regular Sequence 2" offset="0x30" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="sq12" name="SQ12" mask="0x3E000000" access="RW"/>
+                    <bit-field key="sq11" name="SQ11" mask="0x01F00000" access="RW"/>
+                    <bit-field key="sq10" name="SQ10" mask="0x000F8000" access="RW"/>
+                    <bit-field key="sq9" name="SQ9" mask="0x00007C00" access="RW"/>
+                    <bit-field key="sq8" name="SQ8" mask="0x000003E0" access="RW"/>
+                    <bit-field key="sq7" name="SQ7" mask="0x0000001F" access="RW"/>
+                </register>
+                <register key="rsqr3" name="RSQR3" description="Regular Sequence 3" offset="0x34" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="sq6" name="SQ6" mask="0x3E000000" access="RW"/>
+                    <bit-field key="sq5" name="SQ5" mask="0x01F00000" access="RW"/>
+                    <bit-field key="sq4" name="SQ4" mask="0x000F8000" access="RW"/>
+                    <bit-field key="sq3" name="SQ3" mask="0x00007C00" access="RW"/>
+                    <bit-field key="sq2" name="SQ2" mask="0x000003E0" access="RW"/>
+                    <bit-field key="sq1" name="SQ1" mask="0x0000001F" access="RW"/>
+                </register>
+                <register key="isqr" name="ISQR" description="Injected Sequence" offset="0x38" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="jl" name="JL" mask="0x00300000" access="RW"/>
+                    <bit-field key="jsq4" name="JSQ4" mask="0x000F8000" access="RW"/>
+                    <bit-field key="jsq3" name="JSQ3" mask="0x00007C00" access="RW"/>
+                    <bit-field key="jsq2" name="JSQ2" mask="0x000003E0" access="RW"/>
+                    <bit-field key="jsq1" name="JSQ1" mask="0x0000001F" access="RW"/>
+                </register>
+                <register key="idatar1" name="IDATAR1" description="Injected Data 1" offset="0x3C" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="jdata" name="JDATA" mask="0x0000FFFF" access="R"/>
+                </register>
+                <register key="idatar2" name="IDATAR2" description="Injected Data 2" offset="0x40" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="jdata" name="JDATA" mask="0x0000FFFF" access="R"/>
+                </register>
+                <register key="idatar3" name="IDATAR3" description="Injected Data 3" offset="0x44" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="jdata" name="JDATA" mask="0x0000FFFF" access="R"/>
+                </register>
+                <register key="idatar4" name="IDATAR4" description="Injected Data 4" offset="0x48" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="jdata" name="JDATA" mask="0x0000FFFF" access="R"/>
+                </register>
+                <register key="rdatar" name="RDATAR" description="Regular Data" offset="0x4C" size="4" initial-value="0x00000000" access="R">
+                    <bit-field key="data" name="DATA" mask="0x0000FFFF" access="R"/>
+                </register>
+                <register key="dylr" name="DYLR" description="Delayed Data" offset="0x50" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="dlysrc" name="DLYSRC" mask="0x00000200" access="RW"/>
+                    <bit-field key="dlyvlu" name="DLYVLU" mask="0x000001FF" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="adtm" name="ADTM" description="Advanced Control Timer">
+            <register-group key="adtm" name="ADTM">
+                <register key="ctrl1" name="CTRL1" description="Control 1" offset="0x00" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="caplvl" name="CAPLVL" mask="0x8000" access="RW"/>
+                    <bit-field key="capov" name="CAPOV" mask="0x4000" access="RW"/>
+                    <bit-field key="ckd" name="CKD" mask="0x0300" access="RW"/>
+                    <bit-field key="arpe" name="ARPE" description="Auto-reload Enable" mask="0x0080" access="RW"/>
+                    <bit-field key="cms" name="CMS" description="Center-aligned Mode Selection" mask="0x0060" access="RW"/>
+                    <bit-field key="dir" name="DIR" description="Count Direction" mask="0x0010" access="RW"/>
+                    <bit-field key="opm" name="OPM" description="One-pulse Mode Enable" mask="0x0008" access="RW"/>
+                    <bit-field key="urs" name="URS" description="Update Request Source" mask="0x0004" access="RW"/>
+                    <bit-field key="udis" name="UDIS" description="Disable Update Events" mask="0x0002" access="RW"/>
+                    <bit-field key="cen" name="CEN" description="Counter Enable" mask="0x0001" access="RW"/>
+                </register>
+                <register key="ctrl2" name="CTRL2" description="Control 2" offset="0x04" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="ois4" name="OIS4" mask="0x4000" access="RW"/>
+                    <bit-field key="ois3n" name="OIS3N" mask="0x2000" access="RW"/>
+                    <bit-field key="ois3" name="OIS3" mask="0x1000" access="RW"/>
+                    <bit-field key="ois2n" name="OIS2N" mask="0x0800" access="RW"/>
+                    <bit-field key="ois2" name="OIS2" mask="0x0400" access="RW"/>
+                    <bit-field key="ois1n" name="OIS1N" mask="0x0200" access="RW"/>
+                    <bit-field key="ois1" name="OIS1" mask="0x0100" access="RW"/>
+                    <bit-field key="ti1s" name="TI1S" mask="0x0080" access="RW"/>
+                    <bit-field key="mms" name="MMS" mask="0x0070" access="RW"/>
+                    <bit-field key="ccds" name="CCDS" mask="0x0008" access="RW"/>
+                    <bit-field key="ccus" name="CCUS" mask="0x0004" access="RW"/>
+                    <bit-field key="ccpc" name="CCPC" mask="0x0001" access="RW"/>
+                </register>
+                <register key="smcfgr" name="SMCFGR" description="Slave Mode Control" offset="0x08" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="etp" name="ETP" mask="0x8000" access="RW"/>
+                    <bit-field key="ece" name="ECE" mask="0x4000" access="RW"/>
+                    <bit-field key="etps" name="ETPS" mask="0x3000" access="RW"/>
+                    <bit-field key="etf" name="ETF" mask="0x0F00" access="RW"/>
+                    <bit-field key="msm" name="MSM" mask="0x0080" access="RW"/>
+                    <bit-field key="ts" name="TS" mask="0x0070" access="RW"/>
+                    <bit-field key="sms" name="SMS" mask="0x0007" access="RW"/>
+                </register>
+                <register key="dmaintenr" name="DMAINTENR" description="DMA Interrupt Enable" offset="0x0C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="tde" name="TDE" mask="0x4000" access="RW"/>
+                    <bit-field key="comde" name="COMDE" mask="0x2000" access="RW"/>
+                    <bit-field key="cc4de" name="CC4DE" mask="0x1000" access="RW"/>
+                    <bit-field key="cc3de" name="CC3DE" mask="0x0800" access="RW"/>
+                    <bit-field key="cc2de" name="CC2DE" mask="0x0400" access="RW"/>
+                    <bit-field key="cc1de" name="CC1DE" mask="0x0200" access="RW"/>
+                    <bit-field key="ude" name="UDE" mask="0x0100" access="RW"/>
+                    <bit-field key="bie" name="BIE" mask="0x0080" access="RW"/>
+                    <bit-field key="tie" name="TIE" mask="0x0040" access="RW"/>
+                    <bit-field key="comie" name="COMIE" mask="0x0020" access="RW"/>
+                    <bit-field key="cc4ie" name="CC4IE" mask="0x0010" access="RW"/>
+                    <bit-field key="cc3ie" name="CC3IE" mask="0x0008" access="RW"/>
+                    <bit-field key="cc2ie" name="CC2IE" mask="0x0004" access="RW"/>
+                    <bit-field key="cc1ie" name="CC1IE" mask="0x0002" access="RW"/>
+                    <bit-field key="uie" name="UIE" mask="0x0001" access="RW"/>
+                </register>
+                <register key="intfr" name="INTFR" description="Interrupt Status" offset="0x10" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="cc4of" name="CC4OF" mask="0x1000" access="RW"/>
+                    <bit-field key="cc3of" name="CC3OF" mask="0x0800" access="RW"/>
+                    <bit-field key="cc2of" name="CC2OF" mask="0x0400" access="RW"/>
+                    <bit-field key="cc1of" name="CC1OF" mask="0x0200" access="RW"/>
+                    <bit-field key="bif" name="BIF" mask="0x0080" access="RW"/>
+                    <bit-field key="tif" name="TIF" mask="0x0040" access="RW"/>
+                    <bit-field key="comif" name="COMIF" mask="0x0020" access="RW"/>
+                    <bit-field key="cc4if" name="CC4IF" mask="0x0010" access="RW"/>
+                    <bit-field key="cc3if" name="CC3IF" mask="0x0008" access="RW"/>
+                    <bit-field key="cc2if" name="CC2IF" mask="0x0004" access="RW"/>
+                    <bit-field key="cc1if" name="CC1IF" mask="0x0002" access="RW"/>
+                    <bit-field key="uif" name="UIF" mask="0x0001" access="RW"/>
+                </register>
+                <register key="swevgr" name="SWEVGR" description="Event Generation" offset="0x14" size="2" initial-value="0x0000" access="W">
+                    <bit-field key="bg" name="BG" mask="0x0080" access="W"/>
+                    <bit-field key="tg" name="TG" mask="0x0040" access="W"/>
+                    <bit-field key="comg" name="COMG" mask="0x0020" access="W"/>
+                    <bit-field key="cc4g" name="CC4G" mask="0x0010" access="W"/>
+                    <bit-field key="cc3g" name="CC3G" mask="0x0008" access="W"/>
+                    <bit-field key="cc2g" name="CC2G" mask="0x0004" access="W"/>
+                    <bit-field key="cc1g" name="CC1G" mask="0x0002" access="W"/>
+                    <bit-field key="ug" name="UG" mask="0x0001" access="W"/>
+                </register>
+                <register key="compctrl1" name="COMPCTRL1" description="Compare Control 1" offset="0x18" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="oc2ce" name="OC2CE" mask="0x8000" access="RW"/>
+                    <bit-field key="oc2m" name="OC2M" mask="0x7000" access="RW"/>
+                    <bit-field key="oc2pe" name="OC2PE" mask="0x0800" access="RW"/>
+                    <bit-field key="oc2fe" name="OC2FE" mask="0x0400" access="RW"/>
+                    <bit-field key="cc2s" name="CC2S" mask="0x0300" access="RW"/>
+                    <bit-field key="oc1ce" name="OC1CE" mask="0x0080" access="RW"/>
+                    <bit-field key="oc1m" name="OC1M" mask="0x0070" access="RW"/>
+                    <bit-field key="oc1pe" name="OC1PE" mask="0x0008" access="RW"/>
+                    <bit-field key="oc1fe" name="OC1FE" mask="0x0004" access="RW"/>
+                    <bit-field key="cc1s" name="CC1S" mask="0x0003" access="RW"/>
+                </register>
+                <register key="capctrl1" name="CAPCTRL1" description="Capture Control 1" offset="0x18" size="2" initial-value="0x0000" access="RW" alternative="true">
+                    <bit-field key="ic2f" name="IC2F" mask="0xF000" access="RW"/>
+                    <bit-field key="ic2psc" name="IC2PSC" mask="0x0C00" access="RW"/>
+                    <bit-field key="cc2s" name="CC2S" mask="0x0300" access="RW"/>
+                    <bit-field key="ic1f" name="IC1F" mask="0x00F0" access="RW"/>
+                    <bit-field key="ic1psc" name="IC1PSC" mask="0x000C" access="RW"/>
+                    <bit-field key="cc1s" name="CC1S" mask="0x0003" access="RW"/>
+                </register>
+                <register key="compctrl2" name="COMPCTRL2" description="Compare Control 2" offset="0x1C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="oc4ce" name="OC4CE" mask="0x8000" access="RW"/>
+                    <bit-field key="oc4m" name="OC4M" mask="0x7000" access="RW"/>
+                    <bit-field key="oc4pe" name="OC4PE" mask="0x0800" access="RW"/>
+                    <bit-field key="oc4fe" name="OC4FE" mask="0x0400" access="RW"/>
+                    <bit-field key="cc4s" name="CC4S" mask="0x0300" access="RW"/>
+                    <bit-field key="oc3ce" name="OC3CE" mask="0x0080" access="RW"/>
+                    <bit-field key="oc3m" name="OC3M" mask="0x0070" access="RW"/>
+                    <bit-field key="oc3pe" name="OC3PE" mask="0x0008" access="RW"/>
+                    <bit-field key="oc3fe" name="OC3FE" mask="0x0004" access="RW"/>
+                    <bit-field key="cc3s" name="CC3S" mask="0x0003" access="RW"/>
+                </register>
+                <register key="capctrl2" name="CAPCTRL2" description="Capture Control 2" offset="0x1C" size="2" initial-value="0x0000" access="RW" alternative="true">
+                    <bit-field key="ic4f" name="IC4F" mask="0xF000" access="RW"/>
+                    <bit-field key="ic4psc" name="IC4PSC" mask="0x0C00" access="RW"/>
+                    <bit-field key="cc4s" name="CC4S" mask="0x0300" access="RW"/>
+                    <bit-field key="ic3f" name="IC3F" mask="0x00F0" access="RW"/>
+                    <bit-field key="ic3psc" name="IC3PSC" mask="0x000C" access="RW"/>
+                    <bit-field key="cc3s" name="CC3S" mask="0x0003" access="RW"/>
+                </register>
+                <register key="ccer" name="CCER" description="Compate/Capture Enable" offset="0x20" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="cc4p" name="CC4P" mask="0x2000" access="RW"/>
+                    <bit-field key="cc4e" name="CC4E" mask="0x1000" access="RW"/>
+                    <bit-field key="cc3np" name="CC3NP" mask="0x0800" access="RW"/>
+                    <bit-field key="cc3ne" name="CC3NE" mask="0x0400" access="RW"/>
+                    <bit-field key="cc3p" name="CC3P" mask="0x0200" access="RW"/>
+                    <bit-field key="cc3e" name="CC3E" mask="0x0100" access="RW"/>
+                    <bit-field key="cc2np" name="CC2NP" mask="0x0080" access="RW"/>
+                    <bit-field key="cc2ne" name="CC2NE" mask="0x0040" access="RW"/>
+                    <bit-field key="cc2p" name="CC2P" mask="0x0020" access="RW"/>
+                    <bit-field key="cc2e" name="CC2E" mask="0x0010" access="RW"/>
+                    <bit-field key="cc1np" name="CC1NP" mask="0x0008" access="RW"/>
+                    <bit-field key="cc1ne" name="CC1NE" mask="0x0004" access="RW"/>
+                    <bit-field key="cc1p" name="CC1P" mask="0x0002" access="RW"/>
+                    <bit-field key="cc1e" name="CC1E" mask="0x0001" access="RW"/>
+                </register>
+                <register key="cnt" name="CNT" description="Counter" offset="0x24" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="cnt" name="CNT" mask="0xFFFF" access="RW"/>
+                </register>
+                <register key="psc" name="PSC" description="Counting Clock Prescaler" offset="0x28" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="psc" name="PSC" mask="0xFFFF" access="RW"/>
+                </register>
+                <register key="atrlr" name="ATRLR" description="Auto-reload Value" offset="0x2C" size="2" initial-value="0xFFFF" access="RW">
+                    <bit-field key="atrlr" name="ATRLR" mask="0xFFFF" access="RW"/>
+                </register>
+                <register key="rptcr" name="RPTCR" description="Repeat Count Value" offset="0x30" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="rptcr" name="RPTCR" mask="0x00FF" access="RW"/>
+                </register>
+                <register key="ch1cvr" name="CH1CVR" description="Compare/Capture CH1" offset="0x34" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="level1" name="LEVEL1" mask="0x00010000" access="R"/>
+                    <bit-field key="ch1cvr" name="CH1CVR" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="ch2cvr" name="CH2CVR" description="Compare/Capture CH2" offset="0x38" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="level2" name="LEVEL2" mask="0x00010000" access="R"/>
+                    <bit-field key="ch2cvr" name="CH2CVR" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="ch3cvr" name="CH3CVR" description="Compare/Capture CH3" offset="0x3C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="level3" name="LEVEL3" mask="0x00010000" access="R"/>
+                    <bit-field key="ch3cvr" name="CH3CVR" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="ch4cvr" name="CH4CVR" description="Compare/Capture CH4" offset="0x40" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="level4" name="LEVEL4" mask="0x00010000" access="R"/>
+                    <bit-field key="ch4cvr" name="CH4CVR" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="bdtr" name="BDTR" description="Break and Dead-time" offset="0x44" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="moe" name="MOE" mask="0x8000" access="RW"/>
+                    <bit-field key="aoe" name="AOE" mask="0x4000" access="RW"/>
+                    <bit-field key="bkp" name="BKP" mask="0x2000" access="RW"/>
+                    <bit-field key="bke" name="BKE" mask="0x1000" access="RW"/>
+                    <bit-field key="ossr" name="OSSR" mask="0x0800" access="RW"/>
+                    <bit-field key="ossi" name="OSSI" mask="0x0400" access="RW"/>
+                    <bit-field key="lock" name="LOCK" mask="0x0300" access="RW"/>
+                    <bit-field key="dtg" name="DTG" mask="0x00FF" access="RW"/>
+                </register>
+                <register key="dmacfgr" name="DMACFGR" description="DMA Control" offset="0x48" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="dbl" name="DBL" mask="0x1F00" access="RW"/>
+                    <bit-field key="dba" name="DBA" mask="0x001F" access="RW"/>
+                </register>
+                <register key="dmaadr" name="DMAADR" description="DMA Address (continuous mode)" offset="0x4C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="dmab" name="DMAB" mask="0xFFFF" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="gptm" name="GPTM" description="General Purpose Timer">
+            <register-group key="gptm" name="GPTM">
+                <register key="ctrl1" name="CTRL1" description="Control 1" offset="0x00" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="caplvl" name="CAPLVL" mask="0x8000" access="RW"/>
+                    <bit-field key="capov" name="CAPOV" mask="0x4000" access="RW"/>
+                    <bit-field key="ckd" name="CKD" mask="0x0300" access="RW"/>
+                    <bit-field key="arpe" name="ARPE" description="Auto-reload Enable" mask="0x0080" access="RW"/>
+                    <bit-field key="opm" name="OPM" description="One-pulse Mode Enable" mask="0x0008" access="RW"/>
+                    <bit-field key="urs" name="URS" description="Update Request Source" mask="0x0004" access="RW"/>
+                    <bit-field key="udis" name="UDIS" description="Disable Update Events" mask="0x0002" access="RW"/>
+                    <bit-field key="cen" name="CEN" description="Counter Enable" mask="0x0001" access="RW"/>
+                </register>
+                <register key="ctrl2" name="CTRL2" description="Control 2" offset="0x04" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="ti1s" name="TI1S" mask="0x0080" access="RW"/>
+                    <bit-field key="mms" name="MMS" mask="0x0070" access="RW"/>
+                    <bit-field key="ccds" name="CCDS" mask="0x0008" access="RW"/>
+                </register>
+                <register key="smcfgr" name="SMCFGR" description="Slave Mode Control" offset="0x08" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="etp" name="ETP" mask="0x8000" access="RW"/>
+                    <bit-field key="ece" name="ECE" mask="0x4000" access="RW"/>
+                    <bit-field key="etps" name="ETPS" mask="0x3000" access="RW"/>
+                    <bit-field key="etf" name="ETF" mask="0x0F00" access="RW"/>
+                    <bit-field key="msm" name="MSM" mask="0x0080" access="RW"/>
+                    <bit-field key="ts" name="TS" mask="0x0070" access="RW"/>
+                    <bit-field key="sms" name="SMS" mask="0x0007" access="RW"/>
+                </register>
+                <register key="dmaintenr" name="DMAINTENR" description="DMA Interrupt Enable" offset="0x0C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="tde" name="TDE" mask="0x4000" access="RW"/>
+                    <bit-field key="cc4de" name="CC4DE" mask="0x1000" access="RW"/>
+                    <bit-field key="cc3de" name="CC3DE" mask="0x0800" access="RW"/>
+                    <bit-field key="cc2de" name="CC2DE" mask="0x0400" access="RW"/>
+                    <bit-field key="cc1de" name="CC1DE" mask="0x0200" access="RW"/>
+                    <bit-field key="ude" name="UDE" mask="0x0100" access="RW"/>
+                    <bit-field key="tie" name="TIE" mask="0x0040" access="RW"/>
+                    <bit-field key="cc4ie" name="CC4IE" mask="0x0010" access="RW"/>
+                    <bit-field key="cc3ie" name="CC3IE" mask="0x0008" access="RW"/>
+                    <bit-field key="cc2ie" name="CC2IE" mask="0x0004" access="RW"/>
+                    <bit-field key="cc1ie" name="CC1IE" mask="0x0002" access="RW"/>
+                    <bit-field key="uie" name="UIE" mask="0x0001" access="RW"/>
+                </register>
+                <register key="intfr" name="INTFR" description="Interrupt Status" offset="0x10" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="cc4of" name="CC4OF" mask="0x1000" access="RW"/>
+                    <bit-field key="cc3of" name="CC3OF" mask="0x0800" access="RW"/>
+                    <bit-field key="cc2of" name="CC2OF" mask="0x0400" access="RW"/>
+                    <bit-field key="cc1of" name="CC1OF" mask="0x0200" access="RW"/>
+                    <bit-field key="tif" name="TIF" mask="0x0040" access="RW"/>
+                    <bit-field key="cc4if" name="CC4IF" mask="0x0010" access="RW"/>
+                    <bit-field key="cc3if" name="CC3IF" mask="0x0008" access="RW"/>
+                    <bit-field key="cc2if" name="CC2IF" mask="0x0004" access="RW"/>
+                    <bit-field key="cc1if" name="CC1IF" mask="0x0002" access="RW"/>
+                    <bit-field key="uif" name="UIF" mask="0x0001" access="RW"/>
+                </register>
+                <register key="swevgr" name="SWEVGR" description="Event Generation" offset="0x14" size="2" initial-value="0x0000" access="W">
+                    <bit-field key="tg" name="TG" mask="0x0040" access="W"/>
+                    <bit-field key="cc4g" name="CC4G" mask="0x0010" access="W"/>
+                    <bit-field key="cc3g" name="CC3G" mask="0x0008" access="W"/>
+                    <bit-field key="cc2g" name="CC2G" mask="0x0004" access="W"/>
+                    <bit-field key="cc1g" name="CC1G" mask="0x0002" access="W"/>
+                    <bit-field key="ug" name="UG" mask="0x0001" access="W"/>
+                </register>
+                <register key="compctrl1" name="COMPCTRL1" description="Compare Control 1" offset="0x18" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="oc2ce" name="OC2CE" mask="0x8000" access="RW"/>
+                    <bit-field key="oc2m" name="OC2M" mask="0x7000" access="RW"/>
+                    <bit-field key="oc2pe" name="OC2PE" mask="0x0800" access="RW"/>
+                    <bit-field key="oc2fe" name="OC2FE" mask="0x0400" access="RW"/>
+                    <bit-field key="cc2s" name="CC2S" mask="0x0300" access="RW"/>
+                    <bit-field key="oc1ce" name="OC1CE" mask="0x0080" access="RW"/>
+                    <bit-field key="oc1m" name="OC1M" mask="0x0070" access="RW"/>
+                    <bit-field key="oc1pe" name="OC1PE" mask="0x0008" access="RW"/>
+                    <bit-field key="oc1fe" name="OC1FE" mask="0x0004" access="RW"/>
+                    <bit-field key="cc1s" name="CC1S" mask="0x0003" access="RW"/>
+                </register>
+                <register key="capctrl1" name="CAPCTRL1" description="Capture Control 1" offset="0x18" size="2" initial-value="0x0000" access="RW" alternative="true">
+                    <bit-field key="ic2f" name="IC2F" mask="0xF000" access="RW"/>
+                    <bit-field key="ic2psc" name="IC2PSC" mask="0x0C00" access="RW"/>
+                    <bit-field key="cc2s" name="CC2S" mask="0x0300" access="RW"/>
+                    <bit-field key="ic1f" name="IC1F" mask="0x00F0" access="RW"/>
+                    <bit-field key="ic1psc" name="IC1PSC" mask="0x000C" access="RW"/>
+                    <bit-field key="cc1s" name="CC1S" mask="0x0003" access="RW"/>
+                </register>
+                <register key="compctrl2" name="COMPCTRL2" description="Compare Control 2" offset="0x1C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="oc4ce" name="OC4CE" mask="0x8000" access="RW"/>
+                    <bit-field key="oc4m" name="OC4M" mask="0x7000" access="RW"/>
+                    <bit-field key="oc4pe" name="OC4PE" mask="0x0800" access="RW"/>
+                    <bit-field key="oc4fe" name="OC4FE" mask="0x0400" access="RW"/>
+                    <bit-field key="cc4s" name="CC4S" mask="0x0300" access="RW"/>
+                    <bit-field key="oc3ce" name="OC3CE" mask="0x0080" access="RW"/>
+                    <bit-field key="oc3m" name="OC3M" mask="0x0070" access="RW"/>
+                    <bit-field key="oc3pe" name="OC3PE" mask="0x0008" access="RW"/>
+                    <bit-field key="oc3fe" name="OC3FE" mask="0x0004" access="RW"/>
+                    <bit-field key="cc3s" name="CC3S" mask="0x0003" access="RW"/>
+                </register>
+                <register key="capctrl2" name="CAPCTRL2" description="Capture Control 2" offset="0x1C" size="2" initial-value="0x0000" access="RW" alternative="true">
+                    <bit-field key="ic4f" name="IC4F" mask="0xF000" access="RW"/>
+                    <bit-field key="ic4psc" name="IC4PSC" mask="0x0C00" access="RW"/>
+                    <bit-field key="cc4s" name="CC4S" mask="0x0300" access="RW"/>
+                    <bit-field key="ic3f" name="IC3F" mask="0x00F0" access="RW"/>
+                    <bit-field key="ic3psc" name="IC3PSC" mask="0x000C" access="RW"/>
+                    <bit-field key="cc3s" name="CC3S" mask="0x0003" access="RW"/>
+                </register>
+                <register key="ccer" name="CCER" description="Compate/Capture Enable" offset="0x20" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="cc4p" name="CC4P" mask="0x2000" access="RW"/>
+                    <bit-field key="cc4e" name="CC4E" mask="0x1000" access="RW"/>
+                    <bit-field key="cc3p" name="CC3P" mask="0x0200" access="RW"/>
+                    <bit-field key="cc3e" name="CC3E" mask="0x0100" access="RW"/>
+                    <bit-field key="cc2p" name="CC2P" mask="0x0020" access="RW"/>
+                    <bit-field key="cc2e" name="CC2E" mask="0x0010" access="RW"/>
+                    <bit-field key="cc1p" name="CC1P" mask="0x0002" access="RW"/>
+                    <bit-field key="cc1e" name="CC1E" mask="0x0001" access="RW"/>
+                </register>
+                <register key="cnt" name="CNT" description="Counter" offset="0x24" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="cnt" name="CNT" mask="0xFFFF" access="RW"/>
+                </register>
+                <register key="psc" name="PSC" description="Counting Clock Prescaler" offset="0x28" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="psc" name="PSC" mask="0xFFFF" access="RW"/>
+                </register>
+                <register key="atrlr" name="ATRLR" description="Auto-reload Value" offset="0x2C" size="2" initial-value="0xFFFF" access="RW">
+                    <bit-field key="atrlr" name="ATRLR" mask="0xFFFF" access="RW"/>
+                </register>
+                <register key="ch1cvr" name="CH1CVR" description="Compare/Capture CH1" offset="0x34" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="level1" name="LEVEL1" mask="0x00010000" access="R"/>
+                    <bit-field key="ch1cvr" name="CH1CVR" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="ch2cvr" name="CH2CVR" description="Compare/Capture CH2" offset="0x38" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="level2" name="LEVEL2" mask="0x00010000" access="R"/>
+                    <bit-field key="ch2cvr" name="CH2CVR" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="ch3cvr" name="CH3CVR" description="Compare/Capture CH3" offset="0x3C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="level3" name="LEVEL3" mask="0x00010000" access="R"/>
+                    <bit-field key="ch3cvr" name="CH3CVR" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="ch4cvr" name="CH4CVR" description="Compare/Capture CH4" offset="0x40" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="level4" name="LEVEL4" mask="0x00010000" access="R"/>
+                    <bit-field key="ch4cvr" name="CH4CVR" mask="0x0000FFFF" access="RW"/>
+                </register>
+                <register key="dmacfgr" name="DMACFGR" description="DMA Control" offset="0x48" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="dbl" name="DBL" mask="0x1F00" access="RW"/>
+                    <bit-field key="dba" name="DBA" mask="0x001F" access="RW"/>
+                </register>
+                <register key="dmaadr" name="DMAADR" description="DMA Address (continuous mode)" offset="0x4C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="dmab" name="DMAB" mask="0xFFFF" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="usart" name="USART" description="Universal Synchronous Asynchronous Receiver Transmitter">
+            <register-group key="usart" name="USART">
+                <register key="statr" name="STATR" description="Status" offset="0x00" size="4" initial-value="0x000000C0" access="RW">
+                    <bit-field key="cts" name="CTS" mask="0x00000200" access="RW"/>
+                    <bit-field key="lbd" name="LBD" mask="0x00000100" access="RW"/>
+                    <bit-field key="txe" name="TXE" mask="0x00000080" access="R"/>
+                    <bit-field key="tc" name="TC" mask="0x00000040" access="RW"/>
+                    <bit-field key="rxne" name="RXNE" mask="0x00000020" access="RW"/>
+                    <bit-field key="idle" name="IDLE" mask="0x00000010" access="R"/>
+                    <bit-field key="ore" name="ORE" mask="0x00000008" access="R"/>
+                    <bit-field key="ne" name="NE" mask="0x00000004" access="R"/>
+                    <bit-field key="fe" name="FE" mask="0x00000002" access="R"/>
+                    <bit-field key="pe" name="PE" mask="0x00000001" access="R"/>
+                </register>
+                <register key="data" name="DATAR" description="Data" offset="0x04" size="4" access="RW">
+                    <bit-field key="dr" name="DR" mask="0x000001FF" access="RW"/>
+                </register>
+                <register key="brr" name="BRR" description="Baud Rate" offset="0x08" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="div_mantissa" name="DIV_MANTISSA" mask="0x0000FFF0" access="RW"/>
+                    <bit-field key="div_fraction" name="DIV_FRACTION" mask="0x0000000F" access="RW"/>
+                </register>
+                <register key="ctrl1" name="CTRL1" description="Control 1" offset="0x0C" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ue" name="UE" mask="0x00002000" access="RW"/>
+                    <bit-field key="m" name="M" mask="0x00001000" access="RW"/>
+                    <bit-field key="wake" name="WAKE" mask="0x00000800" access="RW"/>
+                    <bit-field key="pce" name="PCE" mask="0x00000400" access="RW"/>
+                    <bit-field key="ps" name="PS" mask="0x00000200" access="RW"/>
+                    <bit-field key="peie" name="PEIE" mask="0x00000100" access="RW"/>
+                    <bit-field key="txeie" name="TXEIE" mask="0x00000080" access="RW"/>
+                    <bit-field key="tcie" name="TCIE" mask="0x00000040" access="RW"/>
+                    <bit-field key="rxneie" name="RXNEIE" mask="0x00000020" access="RW"/>
+                    <bit-field key="idleie" name="IDLEIE" mask="0x00000010" access="RW"/>
+                    <bit-field key="te" name="TE" mask="0x00000008" access="RW"/>
+                    <bit-field key="re" name="RE" mask="0x00000004" access="RW"/>
+                    <bit-field key="rwu" name="RWU" mask="0x00000002" access="RW"/>
+                    <bit-field key="sbk" name="SBK" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="ctrl2" name="CTRL2" description="Control 2" offset="0x10" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="linen" name="LINEN" mask="0x00004000" access="RW"/>
+                    <bit-field key="stop" name="STOP" mask="0x00003000" access="RW"/>
+                    <bit-field key="clken" name="CLKEN" mask="0x00000800" access="RW"/>
+                    <bit-field key="cpol" name="CPOL" mask="0x00000400" access="RW"/>
+                    <bit-field key="chpa" name="CHPA" mask="0x00000200" access="RW"/>
+                    <bit-field key="lbcl" name="LBCL" mask="0x00000100" access="RW"/>
+                    <bit-field key="lbdie" name="LBDIE" mask="0x00000040" access="RW"/>
+                    <bit-field key="lbdl" name="LBDL" mask="0x00000020" access="RW"/>
+                    <bit-field key="add" name="ADD" mask="0x0000000F" access="RW"/>
+                </register>
+                <register key="ctrl3" name="CTRL3" description="Control 3" offset="0x14" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="ctsie" name="CTSIE" mask="0x00000400" access="RW"/>
+                    <bit-field key="ctse" name="CTSE" mask="0x00000200" access="RW"/>
+                    <bit-field key="rtse" name="RTSE" mask="0x00000100" access="RW"/>
+                    <bit-field key="dmat" name="DMAT" mask="0x00000080" access="RW"/>
+                    <bit-field key="dmar" name="DMAR" mask="0x00000040" access="RW"/>
+                    <bit-field key="scen" name="SCEN" mask="0x00000020" access="RW"/>
+                    <bit-field key="nack" name="NACK" mask="0x00000010" access="RW"/>
+                    <bit-field key="hdsel" name="HDSEL" mask="0x00000008" access="RW"/>
+                    <bit-field key="irlp" name="IRLP" mask="0x00000004" access="RW"/>
+                    <bit-field key="iren" name="IREN" mask="0x00000002" access="RW"/>
+                    <bit-field key="eie" name="EIE" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="gpr" name="GPR" description="Guard Time and Prescaler" offset="0x18" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="gt" name="GT" mask="0x0000FF00" access="RW"/>
+                    <bit-field key="psc" name="PSC" mask="0x000000FF" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="i2c" name="I2C" description="Inter-integrated Circuit Interface">
+            <register-group key="i2c" name="I2C">
+                <register key="ctrl1" name="CTRL1" description="Control 1" offset="0x00" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="swrst" name="SWRST" mask="0x8000" access="RW"/>
+                    <bit-field key="pec" name="PEC" mask="0x1000" access="RW"/>
+                    <bit-field key="pos" name="POS" mask="0x0800" access="RW"/>
+                    <bit-field key="ack" name="ACK" mask="0x0400" access="RW"/>
+                    <bit-field key="stop" name="STOP" mask="0x0200" access="RW"/>
+                    <bit-field key="start" name="START" mask="0x0100" access="RW"/>
+                    <bit-field key="nostretch" name="NOSTRETCH" mask="0x0080" access="RW"/>
+                    <bit-field key="engc" name="ENGC" mask="0x0040" access="RW"/>
+                    <bit-field key="enpec" name="ENPEC" mask="0x0020" access="RW"/>
+                    <bit-field key="pe" name="PE" mask="0x0001" access="RW"/>
+                </register>
+                <register key="ctrl2" name="CTRL2" description="Control 2" offset="0x04" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="last" name="LAST" mask="0x1000" access="RW"/>
+                    <bit-field key="dmaen" name="DMAEN" mask="0x0800" access="RW"/>
+                    <bit-field key="itbufen" name="ITBUFEN" mask="0x0400" access="RW"/>
+                    <bit-field key="itevten" name="ITEVTEN" mask="0x0200" access="RW"/>
+                    <bit-field key="iterren" name="ITERREN" mask="0x0100" access="RW"/>
+                    <bit-field key="freq" name="FREQ" mask="0x003F" access="RW"/>
+                </register>
+                <register key="oaddr1" name="OADDR1" description="Address 1" offset="0x08" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="addmode" name="ADDMODE" mask="0x8000" access="RW"/>
+                    <bit-field key="add2" name="ADD[9:8]" mask="0x0300" access="RW"/>
+                    <bit-field key="add1" name="ADD[7:1]" mask="0x00FE" access="RW"/>
+                    <bit-field key="add0" name="ADD[0:0]" mask="0x0001" access="RW"/>
+                </register>
+                <register key="oaddr2" name="OADDR2" description="Address 2" offset="0x0C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="add2" name="ADD2[7:1]" mask="0x00FE" access="RW"/>
+                    <bit-field key="endual" name="ENDUAL" mask="0x0001" access="RW"/>
+                </register>
+                <register key="datar" name="DATAR" description="Data" offset="0x10" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="dr" name="DR" mask="0x00FF" access="RW"/>
+                </register>
+                <register key="statr1" name="STATR1" description="Status 1" offset="0x14" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="pecerr" name="PECERR" mask="0x1000" access="RW"/>
+                    <bit-field key="ovr" name="OVR" mask="0x0800" access="RW"/>
+                    <bit-field key="af" name="AF" mask="0x0400" access="RW"/>
+                    <bit-field key="arlo" name="ARLO" mask="0x0200" access="RW"/>
+                    <bit-field key="berr" name="BERR" mask="0x0100" access="RW"/>
+                    <bit-field key="txe" name="TxE" mask="0x0080" access="R"/>
+                    <bit-field key="rxne" name="RxNE" mask="0x0040" access="R"/>
+                    <bit-field key="stopf" name="STOPF" mask="0x0010" access="R"/>
+                    <bit-field key="add10" name="ADD10" mask="0x0008" access="R"/>
+                    <bit-field key="btf" name="BTF" mask="0x0004" access="R"/>
+                    <bit-field key="addr" name="ADDR" mask="0x0002" access="RW"/>
+                    <bit-field key="sb" name="SB" mask="0x0001" access="R"/>
+                </register>
+                <register key="statr2" name="STATR2" description="Status 2" offset="0x18" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="pec" name="PEC" mask="0xFF00" access="R"/>
+                    <bit-field key="dualf" name="DUALF" mask="0x0080" access="R"/>
+                    <bit-field key="gencall" name="GENCALL" mask="0x0010" access="R"/>
+                    <bit-field key="tra" name="TRA" mask="0x0004" access="R"/>
+                    <bit-field key="busy" name="BUSY" mask="0x0002" access="R"/>
+                    <bit-field key="msl" name="MSL" mask="0x0001" access="R"/>
+                </register>
+                <register key="ckcfgr" name="CKCFGR" description="Clock" offset="0x1C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="fs" name="F/S" mask="0x8000" access="RW"/>
+                    <bit-field key="duty" name="DUTY" mask="0x4000" access="RW"/>
+                    <bit-field key="ccr" name="CCR" mask="0x0FFF" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="spi" name="SPI" description="Serial Peripheral Interface">
+            <register-group key="spi" name="SPI">
+                <register key="ctrl1" name="CTRL1" description="Control 1" offset="0x00" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="bidimode" name="BIDIMODE" mask="0x8000" access="RW"/>
+                    <bit-field key="bidioe" name="BIDIOE" mask="0x4000" access="RW"/>
+                    <bit-field key="crcen" name="CRCEN" mask="0x2000" access="RW"/>
+                    <bit-field key="crcnext" name="CRCNEXT" mask="0x1000" access="RW"/>
+                    <bit-field key="dff" name="DFF" mask="0x0800" access="RW"/>
+                    <bit-field key="rxonly" name="RXONLY" mask="0x0400" access="RW"/>
+                    <bit-field key="ssm" name="SSM" mask="0x0200" access="RW"/>
+                    <bit-field key="ssi" name="SSI" mask="0x0100" access="RW"/>
+                    <bit-field key="lsbfirst" name="LSBFIRST" mask="0x0080" access="RW"/>
+                    <bit-field key="spe" name="SPE" mask="0x0040" access="RW"/>
+                    <bit-field key="br" name="BR" mask="0x0038" access="RW"/>
+                    <bit-field key="mstr" name="MSTR" mask="0x0004" access="RW"/>
+                    <bit-field key="cpol" name="CPOL" mask="0x0002" access="RW"/>
+                    <bit-field key="cpha" name="CPHA" mask="0x0001" access="RW"/>
+                </register>
+                <register key="ctrl2" name="CTRL2" description="Control 2" offset="0x04" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="oden" name="ODEN" mask="0x8000" access="RW"/>
+                    <bit-field key="txeie" name="TXEIE" mask="0x0080" access="RW"/>
+                    <bit-field key="rxneie" name="RXNEIE" mask="0x0040" access="RW"/>
+                    <bit-field key="errie" name="ERRIE" mask="0x0020" access="RW"/>
+                    <bit-field key="ssoe" name="SSOE" mask="0x0004" access="RW"/>
+                    <bit-field key="txdmaen" name="TXDMAEN" mask="0x0002" access="RW"/>
+                    <bit-field key="rxdmaen" name="RXDMAEN" mask="0x0001" access="RW"/>
+                </register>
+                <register key="statr" name="STATR" description="Status" offset="0x08" size="2" initial-value="0x0002" access="RW">
+                    <bit-field key="bsy" name="BSY" mask="0x0080" access="R"/>
+                    <bit-field key="ovr" name="OVR" mask="0x0040" access="RW"/>
+                    <bit-field key="modf" name="MODF" mask="0x0020" access="R"/>
+                    <bit-field key="crcerr" name="CRCERR" mask="0x0010" access="RW"/>
+                    <bit-field key="udr" name="UDR" mask="0x0008" access="R"/>
+                    <bit-field key="chsid" name="CHSID" mask="0x0004" access="R"/>
+                    <bit-field key="txe" name="TXE" mask="0x0002" access="R"/>
+                    <bit-field key="rxne" name="RXNE" mask="0x0001" access="R"/>
+                </register>
+                <register key="datar" name="DATAR" description="Data" offset="0x0C" size="2" initial-value="0x0000" access="RW">
+                    <bit-field key="dr" name="DR" mask="0xFFFF" access="RW"/>
+                </register>
+                <register key="crcr" name="CRCR" description="CRC Polynomial" offset="0x10" size="2" initial-value="0x0007" access="RW">
+                    <bit-field key="crcpoly" name="CRCPOLY" mask="0xFFFF" access="RW"/>
+                </register>
+                <register key="rcrcr" name="RCRCR" description="Received Byte CRC Value" offset="0x14" size="2" initial-value="0x0000" access="R">
+                    <bit-field key="rxcrc" name="RXCRC" mask="0xFFFF" access="R"/>
+                </register>
+                <register key="tcrcr" name="TCRCR" description="Transmitted Byte CRC Value" offset="0x18" size="2" initial-value="0x0000" access="R">
+                    <bit-field key="txcrc" name="TXCRC" mask="0xFFFF" access="R"/>
+                </register>
+                <register key="hscr" name="HSCR" description="High Speed Control" offset="0x24" size="2" initial-value="0x0000" access="W">
+                    <bit-field key="hsrxen" name="HSRXEN" mask="0x0001" access="W"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="esig" name="ESIG" description="Electronic Signature">
+            <register-group key="esig" name="ESIG">
+                <register key="flacap" name="FLACAP" description="Flash Capacity" offset="0x00" size="2" access="R">
+                    <bit-field key="f_size" name="F_SIZE" mask="0xFFFF" access="R"/>
+                </register>
+                <register key="uniid1" name="UNIID1" description="UID 1" offset="0x08" size="4" access="R">
+                    <bit-field key="uid" name="UID[31:0]" mask="0xFFFFFFFF" access="R"/>
+                </register>
+                <register key="uniid2" name="UNIID2" description="UID 2" offset="0x0C" size="4" access="R">
+                    <bit-field key="uid" name="UID[63:32]" mask="0xFFFFFFFF" access="R"/>
+                </register>
+                <register key="uniid3" name="UNIID3" description="UID 3" offset="0x10" size="4" access="R">
+                    <bit-field key="uid" name="UID[95:64]" mask="0xFFFFFFFF" access="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="flash" name="FLASH" description="Flash Memory">
+            <register-group key="flash" name="FLASH">
+                <register key="actlr" name="ACTLR" description="Access Control" offset="0x00" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="latency" name="LATENCY" mask="0x00000003" access="RW"/>
+                </register>
+                <register key="keyr" name="KEYR" description="FPEC Key" offset="0x04" size="4" access="W">
+                    <bit-field key="keyr" name="KEYR" mask="0xFFFFFFFF" access="W"/>
+                </register>
+                <register key="obkeyr" name="OBKEYR" description="OBKEY" offset="0x08" size="4" access="W">
+                    <bit-field key="obkeyr" name="OBKEYR" mask="0xFFFFFFFF" access="W"/>
+                </register>
+                <register key="statr" name="STATR" description="Status" offset="0x0C" size="4" initial-value="0x0000B000" access="RW">
+                    <bit-field key="boot_lock" name="LOCK" description="Boot Mode Switch Lock Enable" mask="0x00008000" access="RW"/>
+                    <bit-field key="boot_mode" name="MODE" description="Boot Mode Enable" mask="0x00004000" access="RW"/>
+                    <bit-field key="eop" name="EOP" description="End-of-operation Flag" mask="0x00000020" access="RW"/>
+                    <bit-field key="wrprterr" name="WRPRTERR" description="Write Protected Error Flag" mask="0x00000010" access="RW"/>
+                    <bit-field key="bsy" name="BSY" description="Busy Status" mask="0x00000001" access="R"/>
+                </register>
+                <register key="ctlr" name="CTLR" description="Control" offset="0x10" size="4" initial-value="0x00008080" access="RW">
+                    <bit-field key="bufrst" name="BUFRST" description="Reset BUF Cache" mask="0x00080000" access="RW"/>
+                    <bit-field key="bufload" name="BUFLOAD" description="BUF Cache Enable" mask="0x00040000" access="RW"/>
+                    <bit-field key="fter" name="FTER" description="Select Fast Page Erase Operation" mask="0x00020000" access="RW"/>
+                    <bit-field key="ftpg" name="FTPG" description="Select Fast Page Programming Operation" mask="0x00010000" access="RW"/>
+                    <bit-field key="flock" name="FLOCK" description="Fast Programming Locked Flag" mask="0x00008000" access="RW"/>
+                    <bit-field key="eopie" name="EOPIE" description="End-of-operation Interrupt Enable" mask="0x00001000" access="RW"/>
+                    <bit-field key="errie" name="ERRIE" description="Error Interrupt Enable" mask="0x00000400" access="RW"/>
+                    <bit-field key="obwre" name="OBWRE" description="Flash Address Locked Flag" mask="0x00000200" access="RW"/>
+                    <bit-field key="lock" name="LOCK" description="FPEC and CTLR Write-lock Enable" mask="0x00000080" access="RW"/>
+                    <bit-field key="strt" name="STRT" description="Start Operation" mask="0x00000040" access="RW"/>
+                    <bit-field key="ober" name="OBER" description="Select Word Erase Operation" mask="0x00000020" access="RW"/>
+                    <bit-field key="obpg" name="OBPG" description="Select Word Programming Operation" mask="0x00000010" access="RW"/>
+                    <bit-field key="mer" name="MER" description="Select User Area Erase Operation" mask="0x00000004" access="RW"/>
+                    <bit-field key="per" name="PER" description="Select Sector Erase Operation" mask="0x00000002" access="RW"/>
+                    <bit-field key="pg" name="PG" description="Select Standard Programming Operation" mask="0x00000001" access="RW"/>
+                </register>
+                <register key="addr" name="ADDR" description="Flash Address" offset="0x14" size="4" initial-value="0x00000000" access="W">
+                    <bit-field key="far" name="FAR" description="Flash Programming Address/Erase Start Address" mask="0xFFFFFFFF" access="W"/>
+                </register>
+                <register key="obr" name="OBR" description="Option Byte" offset="0x1C" size="4" access="R">
+                    <bit-field key="data1" name="DATA1" description="Data Byte 1" mask="0x03FC0000" access="R"/>
+                    <bit-field key="data0" name="DATA0" description="Data Byte 0" mask="0x0003FC00" access="R"/>
+                    <bit-field key="statr_mode" name="STATR_MODE" mask="0x00000080" description="Default program area (boot/user)" access="R"/>
+                    <bit-field key="rst_mode" name="RST_MODE" mask="0x00000060" access="R"/>
+                    <bit-field key="standy_rst" name="STANDY_RST" description="Reset On Standby" mask="0x00000010" access="R"/>
+                    <bit-field key="iwdgsw" name="IWDGSW" description="Independent Watchdog Hardware Enable" mask="0x00000004" access="R"/>
+                    <bit-field key="rdprt" name="RDPRT" description="Read Protection Status" mask="0x00000002" access="R"/>
+                    <bit-field key="oberr" name="OBERR" description="Selected Word Error Flag" mask="0x00000001" access="R"/>
+                </register>
+                <register key="wpr" name="WPR" description="Write Protection" offset="0x20" size="4" initial-value="0xFFFFFFFF" access="R">
+                    <bit-field key="wpr" name="WPR" description="Flash Memory Write Protection Status" mask="0x0000FFFF" access="R"/>
+                </register >
+                <register key="flash_modekeyr" name="FLASH_MODEKEYR" description="Flash Fast Programming/Erase Mode Unlock" offset="0x24" size="4" access="W">
+                    <bit-field key="modekeyr" name="MODEKEYR" description="Flash Fast Programming/Erase Mode Unlock" mask="0xFFFFFFFF" access="W"/>
+                </register>
+                <register key="boot_modekeyr" name="BOOT_MODEKEYR" description="Boot Area Unlock" offset="0x28" size="4" access="W">
+                    <bit-field key="modekeyr" name="MODEKEYR" description="Boot Area Unlock" mask="0xFFFFFFFF" access="W"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="extend" name="EXTEND" description="Extended Configuration">
+            <register-group key="extend" name="EXTEND">
+                <register key="exten_ctr" name="EXTEN_CTR" description="Configure Extended Control" offset="0x00" size="4" access="RW">
+                    <bit-field key="opa_psel" name="OPA_PSEL" mask="0x00040000" access="RW"/>
+                    <bit-field key="opa_nsel" name="OPA_NSEL" mask="0x00020000" access="RW"/>
+                    <bit-field key="opa_en" name="OPA_EN" mask="0x00010000" access="RW"/>
+                    <bit-field key="ldotrim" name="LDOTRIM" mask="0x00000400" access="RW"/>
+                    <bit-field key="lkuprst" name="LKUPRST" mask="0x00000080" access="RW"/>
+                    <bit-field key="lkupen" name="LKUPEN" mask="0x00000040" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module key="debug" name="DEBUG" description="Debug Support">
+            <register-group key="debug" name="DEBUG">
+                <register key="dbgmcu" name="DBGMCU" description="Debug MCU Configuration" offset="0x00" size="4" initial-value="0x00000000" access="RW">
+                    <bit-field key="tim2_stop" name="TIM2_STOP" mask="0x00002000" access="RW"/>
+                    <bit-field key="tim1_stop" name="TIM1_STOP" mask="0x00001000" access="RW"/>
+                    <bit-field key="wwdg_stop" name="WWDG_STOP" mask="0x00000200" access="RW"/>
+                    <bit-field key="iwdg_stop" name="IWDG_STOP" mask="0x00000100" access="RW"/>
+                    <bit-field key="standby" name="STANDBY" mask="0x00000004" access="RW"/>
+                    <bit-field key="sleep" name="SLEEP" mask="0x00000001" access="RW"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pads>
+        <pad key="gnd" name="GND"/>
+        <pad key="pa1" name="PA1"/>
+        <pad key="pa2" name="PA2"/>
+        <pad key="pc0" name="PC0"/>
+        <pad key="pc1" name="PC1"/>
+        <pad key="pc2" name="PC2"/>
+        <pad key="pc3" name="PC3"/>
+        <pad key="pc4" name="PC4"/>
+        <pad key="pc5" name="PC5"/>
+        <pad key="pc6" name="PC6"/>
+        <pad key="pc7" name="PC7"/>
+        <pad key="pd0" name="PD0"/>
+        <pad key="pd1" name="PD1"/>
+        <pad key="pd2" name="PD2"/>
+        <pad key="pd3" name="PD3"/>
+        <pad key="pd4" name="PD4"/>
+        <pad key="pd5" name="PD5"/>
+        <pad key="pd6" name="PD6"/>
+        <pad key="pd7" name="PD7"/>
+        <pad key="vdd" name="VDD"/>
+        <pad key="vss" name="VSS"/>
+    </pads>
+    <pinouts>
+        <pinout key="tssop20" name="TSSOP20" type="ssop">
+            <pin position="1" pad-key="pd4"/>
+            <pin position="2" pad-key="pd5"/>
+            <pin position="3" pad-key="pd6"/>
+            <pin position="4" pad-key="pd7"/>
+            <pin position="5" pad-key="pa1"/>
+            <pin position="6" pad-key="pa2"/>
+            <pin position="7" pad-key="vss"/>
+            <pin position="8" pad-key="pd0"/>
+            <pin position="9" pad-key="vdd"/>
+            <pin position="10" pad-key="pc0"/>
+            <pin position="11" pad-key="pc1"/>
+            <pin position="12" pad-key="pc2"/>
+            <pin position="13" pad-key="pc3"/>
+            <pin position="14" pad-key="pc4"/>
+            <pin position="15" pad-key="pc5"/>
+            <pin position="16" pad-key="pc6"/>
+            <pin position="17" pad-key="pc7"/>
+            <pin position="18" pad-key="pd1"/>
+            <pin position="19" pad-key="pd2"/>
+            <pin position="20" pad-key="pd3"/>
+        </pinout>
+        <pinout key="qfn20" name="QFN20" type="qfn">
+            <pin position="1" pad-key="pd7"/>
+            <pin position="2" pad-key="pa1"/>
+            <pin position="3" pad-key="pa2"/>
+            <pin position="4" pad-key="vss"/>
+            <pin position="5" pad-key="pd0"/>
+            <pin position="6" pad-key="vdd"/>
+            <pin position="7" pad-key="pc0"/>
+            <pin position="8" pad-key="pc1"/>
+            <pin position="9" pad-key="pc2"/>
+            <pin position="10" pad-key="pc3"/>
+            <pin position="11" pad-key="pc4"/>
+            <pin position="12" pad-key="pc5"/>
+            <pin position="13" pad-key="pc6"/>
+            <pin position="14" pad-key="pc7"/>
+            <pin position="15" pad-key="pd1"/>
+            <pin position="16" pad-key="pd2"/>
+            <pin position="17" pad-key="pd3"/>
+            <pin position="18" pad-key="pd4"/>
+            <pin position="19" pad-key="pd5"/>
+            <pin position="20" pad-key="pd6"/>
+        </pinout>
+        <pinout key="sop16" name="SOP16" type="ssop">
+            <pin position="1" pad-key="pc1"/>
+            <pin position="2" pad-key="pc2"/>
+            <pin position="3" pad-key="pc3"/>
+            <pin position="4" pad-key="pc4"/>
+            <pin position="5" pad-key="pc6"/>
+            <pin position="6" pad-key="pc5"/>
+            <pin position="7" pad-key="pd1"/>
+            <pin position="8" pad-key="pd4"/>
+            <pin position="9" pad-key="pd5"/>
+            <pin position="10" pad-key="pd6"/>
+            <pin position="11" pad-key="pd7"/>
+            <pin position="12" pad-key="pa1"/>
+            <pin position="13" pad-key="pa2"/>
+            <pin position="14" pad-key="vss"/>
+            <pin position="15" pad-key="vdd"/>
+            <pin position="16" pad-key="pc0"/>
+        </pinout>
+        <pinout key="sop8" name="SOP8" type="ssop">
+            <pin position="1" pad-key="pd6"/>
+            <pin position="2" pad-key="vss"/>
+            <pin position="3" pad-key="pa2"/>
+            <pin position="4" pad-key="vdd"/>
+            <pin position="5" pad-key="pc1"/>
+            <pin position="6" pad-key="pc2"/>
+            <pin position="7" pad-key="pc4"/>
+            <pin position="8" pad-key="pd1"/>
+        </pinout>
+    </pinouts>
+    <variants>
+        <variant key="ch32v003f4p6" name="CH32V003F4P6" pinout-key="tssop20">
+            <property-groups>
+                <property-group key="vendor">
+                    <property key="variant_id" value="0x00300500"/>
+                </property-group>
+            </property-groups>
+        </variant>
+        <variant key="ch32v003f4u6" name="CH32V003F4U6" pinout-key="qfn20">
+            <property-groups>
+                <property-group key="vendor">
+                    <property key="variant_id" value="0x00310500"/>
+                </property-group>
+            </property-groups>
+        </variant>
+        <variant key="ch32v003a4m6" name="CH32V003A4M6" pinout-key="sop16">
+            <property-groups>
+                <property-group key="vendor">
+                    <property key="variant_id" value="0x00320500"/>
+                </property-group>
+            </property-groups>
+        </variant>
+        <variant key="ch32v003j4m6" name="CH32V003J4M6" pinout-key="sop8">
+            <property-groups>
+                <property-group key="vendor">
+                    <property key="variant_id" value="0x00330500"/>
+                </property-group>
+            </property-groups>
+        </variant>
+    </variants>
+</device>