Tidying

2024-12-16 21:38:09 +00:00
parent 9486cc0163
commit 36abea6ce1
3 changed files with 14 additions and 3 deletions
--- a/src/Targets/RiscV/RiscV.cpp
+++ b/src/Targets/RiscV/RiscV.cpp
@@ -390,7 +390,7 @@ namespace Targets::RiscV

    TargetAddressSpaceDescriptor RiscV::generateCpuRegisterAddressSpaceDescriptor() {
        auto addressSpace = TargetAddressSpaceDescriptor{
-            "debug_module",
+            "csr",
            {0x0000, 0xFFFF},
            TargetMemoryEndianness::LITTLE,
            {},